1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (C) 2012-2013 Intel Corporation
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include "nvme_private.h"
31
32 void
nvme_ctrlr_cmd_identify_controller(struct nvme_controller * ctrlr,void * payload,nvme_cb_fn_t cb_fn,void * cb_arg)33 nvme_ctrlr_cmd_identify_controller(struct nvme_controller *ctrlr, void *payload,
34 nvme_cb_fn_t cb_fn, void *cb_arg)
35 {
36 struct nvme_request *req;
37 struct nvme_command *cmd;
38
39 req = nvme_allocate_request_vaddr(payload,
40 sizeof(struct nvme_controller_data), M_WAITOK, cb_fn, cb_arg);
41
42 cmd = &req->cmd;
43 cmd->opc = NVME_OPC_IDENTIFY;
44
45 /*
46 * TODO: create an identify command data structure, which
47 * includes this CNS bit in cdw10.
48 */
49 cmd->cdw10 = htole32(1);
50
51 nvme_ctrlr_submit_admin_request(ctrlr, req);
52 }
53
54 void
nvme_ctrlr_cmd_identify_namespace(struct nvme_controller * ctrlr,uint32_t nsid,void * payload,nvme_cb_fn_t cb_fn,void * cb_arg)55 nvme_ctrlr_cmd_identify_namespace(struct nvme_controller *ctrlr, uint32_t nsid,
56 void *payload, nvme_cb_fn_t cb_fn, void *cb_arg)
57 {
58 struct nvme_request *req;
59 struct nvme_command *cmd;
60
61 req = nvme_allocate_request_vaddr(payload,
62 sizeof(struct nvme_namespace_data), M_WAITOK, cb_fn, cb_arg);
63
64 cmd = &req->cmd;
65 cmd->opc = NVME_OPC_IDENTIFY;
66
67 /*
68 * TODO: create an identify command data structure
69 */
70 cmd->nsid = htole32(nsid);
71
72 nvme_ctrlr_submit_admin_request(ctrlr, req);
73 }
74
75 void
nvme_ctrlr_cmd_create_io_cq(struct nvme_controller * ctrlr,struct nvme_qpair * io_que,nvme_cb_fn_t cb_fn,void * cb_arg)76 nvme_ctrlr_cmd_create_io_cq(struct nvme_controller *ctrlr,
77 struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
78 {
79 struct nvme_request *req;
80 struct nvme_command *cmd;
81
82 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
83
84 cmd = &req->cmd;
85 cmd->opc = NVME_OPC_CREATE_IO_CQ;
86
87 /*
88 * TODO: create a create io completion queue command data
89 * structure.
90 */
91 cmd->cdw10 = htole32(((io_que->num_entries-1) << 16) | io_que->id);
92 /* 0x3 = interrupts enabled | physically contiguous */
93 cmd->cdw11 = htole32((io_que->vector << 16) | 0x3);
94 cmd->prp1 = htole64(io_que->cpl_bus_addr);
95
96 nvme_ctrlr_submit_admin_request(ctrlr, req);
97 }
98
99 void
nvme_ctrlr_cmd_create_io_sq(struct nvme_controller * ctrlr,struct nvme_qpair * io_que,nvme_cb_fn_t cb_fn,void * cb_arg)100 nvme_ctrlr_cmd_create_io_sq(struct nvme_controller *ctrlr,
101 struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
102 {
103 struct nvme_request *req;
104 struct nvme_command *cmd;
105
106 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
107
108 cmd = &req->cmd;
109 cmd->opc = NVME_OPC_CREATE_IO_SQ;
110
111 /*
112 * TODO: create a create io submission queue command data
113 * structure.
114 */
115 cmd->cdw10 = htole32(((io_que->num_entries-1) << 16) | io_que->id);
116 /* 0x1 = physically contiguous */
117 cmd->cdw11 = htole32((io_que->id << 16) | 0x1);
118 cmd->prp1 = htole64(io_que->cmd_bus_addr);
119
120 nvme_ctrlr_submit_admin_request(ctrlr, req);
121 }
122
123 void
nvme_ctrlr_cmd_delete_io_cq(struct nvme_controller * ctrlr,struct nvme_qpair * io_que,nvme_cb_fn_t cb_fn,void * cb_arg)124 nvme_ctrlr_cmd_delete_io_cq(struct nvme_controller *ctrlr,
125 struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
126 {
127 struct nvme_request *req;
128 struct nvme_command *cmd;
129
130 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
131
132 cmd = &req->cmd;
133 cmd->opc = NVME_OPC_DELETE_IO_CQ;
134
135 /*
136 * TODO: create a delete io completion queue command data
137 * structure.
138 */
139 cmd->cdw10 = htole32(io_que->id);
140
141 nvme_ctrlr_submit_admin_request(ctrlr, req);
142 }
143
144 void
nvme_ctrlr_cmd_delete_io_sq(struct nvme_controller * ctrlr,struct nvme_qpair * io_que,nvme_cb_fn_t cb_fn,void * cb_arg)145 nvme_ctrlr_cmd_delete_io_sq(struct nvme_controller *ctrlr,
146 struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
147 {
148 struct nvme_request *req;
149 struct nvme_command *cmd;
150
151 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
152
153 cmd = &req->cmd;
154 cmd->opc = NVME_OPC_DELETE_IO_SQ;
155
156 /*
157 * TODO: create a delete io submission queue command data
158 * structure.
159 */
160 cmd->cdw10 = htole32(io_que->id);
161
162 nvme_ctrlr_submit_admin_request(ctrlr, req);
163 }
164
165 void
nvme_ctrlr_cmd_set_feature(struct nvme_controller * ctrlr,uint8_t feature,uint32_t cdw11,uint32_t cdw12,uint32_t cdw13,uint32_t cdw14,uint32_t cdw15,void * payload,uint32_t payload_size,nvme_cb_fn_t cb_fn,void * cb_arg)166 nvme_ctrlr_cmd_set_feature(struct nvme_controller *ctrlr, uint8_t feature,
167 uint32_t cdw11, uint32_t cdw12, uint32_t cdw13, uint32_t cdw14,
168 uint32_t cdw15, void *payload, uint32_t payload_size,
169 nvme_cb_fn_t cb_fn, void *cb_arg)
170 {
171 struct nvme_request *req;
172 struct nvme_command *cmd;
173
174 if (payload != NULL)
175 req = nvme_allocate_request_vaddr(payload, payload_size,
176 M_WAITOK, cb_fn, cb_arg);
177 else
178 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
179
180 cmd = &req->cmd;
181 cmd->opc = NVME_OPC_SET_FEATURES;
182 cmd->cdw10 = htole32(feature);
183 cmd->cdw11 = htole32(cdw11);
184 cmd->cdw12 = htole32(cdw12);
185 cmd->cdw13 = htole32(cdw13);
186 cmd->cdw14 = htole32(cdw14);
187 cmd->cdw15 = htole32(cdw15);
188
189 nvme_ctrlr_submit_admin_request(ctrlr, req);
190 }
191
192 void
nvme_ctrlr_cmd_get_feature(struct nvme_controller * ctrlr,uint8_t feature,uint32_t cdw11,void * payload,uint32_t payload_size,nvme_cb_fn_t cb_fn,void * cb_arg)193 nvme_ctrlr_cmd_get_feature(struct nvme_controller *ctrlr, uint8_t feature,
194 uint32_t cdw11, void *payload, uint32_t payload_size,
195 nvme_cb_fn_t cb_fn, void *cb_arg)
196 {
197 struct nvme_request *req;
198 struct nvme_command *cmd;
199
200 if (payload != NULL)
201 req = nvme_allocate_request_vaddr(payload, payload_size,
202 M_WAITOK, cb_fn, cb_arg);
203 else
204 req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
205
206 cmd = &req->cmd;
207 cmd->opc = NVME_OPC_GET_FEATURES;
208 cmd->cdw10 = htole32(feature);
209 cmd->cdw11 = htole32(cdw11);
210
211 nvme_ctrlr_submit_admin_request(ctrlr, req);
212 }
213
214 void
nvme_ctrlr_cmd_set_num_queues(struct nvme_controller * ctrlr,uint32_t num_queues,nvme_cb_fn_t cb_fn,void * cb_arg)215 nvme_ctrlr_cmd_set_num_queues(struct nvme_controller *ctrlr,
216 uint32_t num_queues, nvme_cb_fn_t cb_fn, void *cb_arg)
217 {
218 uint32_t cdw11;
219
220 cdw11 = ((num_queues - 1) << 16) | (num_queues - 1);
221 nvme_ctrlr_cmd_set_feature(ctrlr, NVME_FEAT_NUMBER_OF_QUEUES, cdw11,
222 0, 0, 0, 0, NULL, 0, cb_fn, cb_arg);
223 }
224
225 void
nvme_ctrlr_cmd_set_async_event_config(struct nvme_controller * ctrlr,uint32_t state,nvme_cb_fn_t cb_fn,void * cb_arg)226 nvme_ctrlr_cmd_set_async_event_config(struct nvme_controller *ctrlr,
227 uint32_t state, nvme_cb_fn_t cb_fn, void *cb_arg)
228 {
229 uint32_t cdw11;
230
231 cdw11 = state;
232 nvme_ctrlr_cmd_set_feature(ctrlr,
233 NVME_FEAT_ASYNC_EVENT_CONFIGURATION, cdw11, 0, 0, 0, 0, NULL, 0,
234 cb_fn, cb_arg);
235 }
236
237 void
nvme_ctrlr_cmd_set_interrupt_coalescing(struct nvme_controller * ctrlr,uint32_t microseconds,uint32_t threshold,nvme_cb_fn_t cb_fn,void * cb_arg)238 nvme_ctrlr_cmd_set_interrupt_coalescing(struct nvme_controller *ctrlr,
239 uint32_t microseconds, uint32_t threshold, nvme_cb_fn_t cb_fn, void *cb_arg)
240 {
241 uint32_t cdw11;
242
243 if ((microseconds/100) >= 0x100) {
244 nvme_printf(ctrlr, "invalid coal time %d, disabling\n",
245 microseconds);
246 microseconds = 0;
247 threshold = 0;
248 }
249
250 if (threshold >= 0x100) {
251 nvme_printf(ctrlr, "invalid threshold %d, disabling\n",
252 threshold);
253 threshold = 0;
254 microseconds = 0;
255 }
256
257 cdw11 = ((microseconds/100) << 8) | threshold;
258 nvme_ctrlr_cmd_set_feature(ctrlr, NVME_FEAT_INTERRUPT_COALESCING, cdw11,
259 0, 0, 0, 0, NULL, 0, cb_fn, cb_arg);
260 }
261
262 void
nvme_ctrlr_cmd_get_log_page(struct nvme_controller * ctrlr,uint8_t log_page,uint32_t nsid,void * payload,uint32_t payload_size,nvme_cb_fn_t cb_fn,void * cb_arg)263 nvme_ctrlr_cmd_get_log_page(struct nvme_controller *ctrlr, uint8_t log_page,
264 uint32_t nsid, void *payload, uint32_t payload_size, nvme_cb_fn_t cb_fn,
265 void *cb_arg)
266 {
267 struct nvme_request *req;
268 struct nvme_command *cmd;
269
270 /*
271 * XXX-MJ this should be M_WAITOK but we might be called from AER
272 * completion processing, which is a non-sleepable context.
273 */
274 req = nvme_allocate_request_vaddr(payload, payload_size,
275 M_NOWAIT, cb_fn, cb_arg);
276
277 cmd = &req->cmd;
278 cmd->opc = NVME_OPC_GET_LOG_PAGE;
279 cmd->nsid = htole32(nsid);
280 cmd->cdw10 = ((payload_size/sizeof(uint32_t)) - 1) << 16;
281 cmd->cdw10 |= log_page;
282 cmd->cdw10 = htole32(cmd->cdw10);
283
284 nvme_ctrlr_submit_admin_request(ctrlr, req);
285 }
286
287 void
nvme_ctrlr_cmd_get_error_page(struct nvme_controller * ctrlr,struct nvme_error_information_entry * payload,uint32_t num_entries,nvme_cb_fn_t cb_fn,void * cb_arg)288 nvme_ctrlr_cmd_get_error_page(struct nvme_controller *ctrlr,
289 struct nvme_error_information_entry *payload, uint32_t num_entries,
290 nvme_cb_fn_t cb_fn, void *cb_arg)
291 {
292 KASSERT(num_entries > 0, ("%s called with num_entries==0\n", __func__));
293
294 /* Controller's error log page entries is 0-based. */
295 KASSERT(num_entries <= (ctrlr->cdata.elpe + 1),
296 ("%s called with num_entries=%d but (elpe+1)=%d\n", __func__,
297 num_entries, ctrlr->cdata.elpe + 1));
298
299 if (num_entries > (ctrlr->cdata.elpe + 1))
300 num_entries = ctrlr->cdata.elpe + 1;
301
302 nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_ERROR,
303 NVME_GLOBAL_NAMESPACE_TAG, payload, sizeof(*payload) * num_entries,
304 cb_fn, cb_arg);
305 }
306
307 void
nvme_ctrlr_cmd_get_health_information_page(struct nvme_controller * ctrlr,uint32_t nsid,struct nvme_health_information_page * payload,nvme_cb_fn_t cb_fn,void * cb_arg)308 nvme_ctrlr_cmd_get_health_information_page(struct nvme_controller *ctrlr,
309 uint32_t nsid, struct nvme_health_information_page *payload,
310 nvme_cb_fn_t cb_fn, void *cb_arg)
311 {
312 nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_HEALTH_INFORMATION,
313 nsid, payload, sizeof(*payload), cb_fn, cb_arg);
314 }
315
316 void
nvme_ctrlr_cmd_get_firmware_page(struct nvme_controller * ctrlr,struct nvme_firmware_page * payload,nvme_cb_fn_t cb_fn,void * cb_arg)317 nvme_ctrlr_cmd_get_firmware_page(struct nvme_controller *ctrlr,
318 struct nvme_firmware_page *payload, nvme_cb_fn_t cb_fn, void *cb_arg)
319 {
320 nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_FIRMWARE_SLOT,
321 NVME_GLOBAL_NAMESPACE_TAG, payload, sizeof(*payload), cb_fn,
322 cb_arg);
323 }
324
325 void
nvme_ctrlr_cmd_abort(struct nvme_controller * ctrlr,uint16_t cid,uint16_t sqid,nvme_cb_fn_t cb_fn,void * cb_arg)326 nvme_ctrlr_cmd_abort(struct nvme_controller *ctrlr, uint16_t cid,
327 uint16_t sqid, nvme_cb_fn_t cb_fn, void *cb_arg)
328 {
329 struct nvme_request *req;
330 struct nvme_command *cmd;
331
332 /*
333 * XXX-MJ this should be M_WAITOK, we do reset from non-sleepable
334 * context and abort commands as part of that.
335 */
336 req = nvme_allocate_request_null(M_NOWAIT, cb_fn, cb_arg);
337
338 cmd = &req->cmd;
339 cmd->opc = NVME_OPC_ABORT;
340 cmd->cdw10 = htole32((cid << 16) | sqid);
341
342 nvme_ctrlr_submit_admin_request(ctrlr, req);
343 }
344