xref: /freebsd/sys/contrib/device-tree/src/powerpc/fsl/mpc8560ads.dts (revision 7ef62cebc2f965b0f640263e179276928885e33d) 
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * MPC8560 ADS Device Tree Source
4 *
5 * Copyright 2006, 2008 Freescale Semiconductor Inc.
6 */
7
8/dts-v1/;
9
10/include/ "e500v1_power_isa.dtsi"
11
12/ {
13	model = "MPC8560ADS";
14	compatible = "MPC8560ADS", "MPC85xxADS";
15	#address-cells = <1>;
16	#size-cells = <1>;
17
18	aliases {
19		ethernet0 = &enet0;
20		ethernet1 = &enet1;
21		ethernet2 = &enet2;
22		ethernet3 = &enet3;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26	};
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		PowerPC,8560@0 {
33			device_type = "cpu";
34			reg = <0x0>;
35			d-cache-line-size = <32>;	// 32 bytes
36			i-cache-line-size = <32>;	// 32 bytes
37			d-cache-size = <0x8000>;		// L1, 32K
38			i-cache-size = <0x8000>;		// L1, 32K
39			timebase-frequency = <82500000>;
40			bus-frequency = <330000000>;
41			clock-frequency = <825000000>;
42		};
43	};
44
45	memory {
46		device_type = "memory";
47		reg = <0x0 0x10000000>;
48	};
49
50	soc8560@e0000000 {
51		#address-cells = <1>;
52		#size-cells = <1>;
53		device_type = "soc";
54		compatible = "simple-bus";
55		ranges = <0x0 0xe0000000 0x100000>;
56		bus-frequency = <330000000>;
57
58		ecm-law@0 {
59			compatible = "fsl,ecm-law";
60			reg = <0x0 0x1000>;
61			fsl,num-laws = <8>;
62		};
63
64		ecm@1000 {
65			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
66			reg = <0x1000 0x1000>;
67			interrupts = <17 2>;
68			interrupt-parent = <&mpic>;
69		};
70
71		memory-controller@2000 {
72			compatible = "fsl,mpc8540-memory-controller";
73			reg = <0x2000 0x1000>;
74			interrupt-parent = <&mpic>;
75			interrupts = <18 2>;
76		};
77
78		L2: l2-cache-controller@20000 {
79			compatible = "fsl,mpc8540-l2-cache-controller";
80			reg = <0x20000 0x1000>;
81			cache-line-size = <32>;	// 32 bytes
82			cache-size = <0x40000>;	// L2, 256K
83			interrupt-parent = <&mpic>;
84			interrupts = <16 2>;
85		};
86
87		dma@21300 {
88			#address-cells = <1>;
89			#size-cells = <1>;
90			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
91			reg = <0x21300 0x4>;
92			ranges = <0x0 0x21100 0x200>;
93			cell-index = <0>;
94			dma-channel@0 {
95				compatible = "fsl,mpc8560-dma-channel",
96						"fsl,eloplus-dma-channel";
97				reg = <0x0 0x80>;
98				cell-index = <0>;
99				interrupt-parent = <&mpic>;
100				interrupts = <20 2>;
101			};
102			dma-channel@80 {
103				compatible = "fsl,mpc8560-dma-channel",
104						"fsl,eloplus-dma-channel";
105				reg = <0x80 0x80>;
106				cell-index = <1>;
107				interrupt-parent = <&mpic>;
108				interrupts = <21 2>;
109			};
110			dma-channel@100 {
111				compatible = "fsl,mpc8560-dma-channel",
112						"fsl,eloplus-dma-channel";
113				reg = <0x100 0x80>;
114				cell-index = <2>;
115				interrupt-parent = <&mpic>;
116				interrupts = <22 2>;
117			};
118			dma-channel@180 {
119				compatible = "fsl,mpc8560-dma-channel",
120						"fsl,eloplus-dma-channel";
121				reg = <0x180 0x80>;
122				cell-index = <3>;
123				interrupt-parent = <&mpic>;
124				interrupts = <23 2>;
125			};
126		};
127
128		enet0: ethernet@24000 {
129			#address-cells = <1>;
130			#size-cells = <1>;
131			cell-index = <0>;
132			device_type = "network";
133			model = "TSEC";
134			compatible = "gianfar";
135			reg = <0x24000 0x1000>;
136			ranges = <0x0 0x24000 0x1000>;
137			local-mac-address = [ 00 00 00 00 00 00 ];
138			interrupts = <29 2 30 2 34 2>;
139			interrupt-parent = <&mpic>;
140			tbi-handle = <&tbi0>;
141			phy-handle = <&phy0>;
142
143			mdio@520 {
144				#address-cells = <1>;
145				#size-cells = <0>;
146				compatible = "fsl,gianfar-mdio";
147				reg = <0x520 0x20>;
148
149				phy0: ethernet-phy@0 {
150					interrupt-parent = <&mpic>;
151					interrupts = <5 1>;
152					reg = <0x0>;
153				};
154				phy1: ethernet-phy@1 {
155					interrupt-parent = <&mpic>;
156					interrupts = <5 1>;
157					reg = <0x1>;
158				};
159				phy2: ethernet-phy@2 {
160					interrupt-parent = <&mpic>;
161					interrupts = <7 1>;
162					reg = <0x2>;
163				};
164				phy3: ethernet-phy@3 {
165					interrupt-parent = <&mpic>;
166					interrupts = <7 1>;
167					reg = <0x3>;
168				};
169				tbi0: tbi-phy@11 {
170					reg = <0x11>;
171					device_type = "tbi-phy";
172				};
173			};
174		};
175
176		enet1: ethernet@25000 {
177			#address-cells = <1>;
178			#size-cells = <1>;
179			cell-index = <1>;
180			device_type = "network";
181			model = "TSEC";
182			compatible = "gianfar";
183			reg = <0x25000 0x1000>;
184			ranges = <0x0 0x25000 0x1000>;
185			local-mac-address = [ 00 00 00 00 00 00 ];
186			interrupts = <35 2 36 2 40 2>;
187			interrupt-parent = <&mpic>;
188			tbi-handle = <&tbi1>;
189			phy-handle = <&phy1>;
190
191			mdio@520 {
192				#address-cells = <1>;
193				#size-cells = <0>;
194				compatible = "fsl,gianfar-tbi";
195				reg = <0x520 0x20>;
196
197				tbi1: tbi-phy@11 {
198					reg = <0x11>;
199					device_type = "tbi-phy";
200				};
201			};
202		};
203
204		mpic: pic@40000 {
205			interrupt-controller;
206			#address-cells = <0>;
207			#interrupt-cells = <2>;
208			reg = <0x40000 0x40000>;
209			compatible = "chrp,open-pic";
210			device_type = "open-pic";
211		};
212
213		cpm@919c0 {
214			#address-cells = <1>;
215			#size-cells = <1>;
216			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
217			reg = <0x919c0 0x30>;
218			ranges;
219
220			muram@80000 {
221				#address-cells = <1>;
222				#size-cells = <1>;
223				ranges = <0x0 0x80000 0x10000>;
224
225				data@0 {
226					compatible = "fsl,cpm-muram-data";
227					reg = <0x0 0x4000 0x9000 0x2000>;
228				};
229			};
230
231			brg@919f0 {
232				compatible = "fsl,mpc8560-brg",
233				             "fsl,cpm2-brg",
234				             "fsl,cpm-brg";
235				reg = <0x919f0 0x10 0x915f0 0x10>;
236				clock-frequency = <165000000>;
237			};
238
239			cpmpic: pic@90c00 {
240				interrupt-controller;
241				#address-cells = <0>;
242				#interrupt-cells = <2>;
243				interrupts = <46 2>;
244				interrupt-parent = <&mpic>;
245				reg = <0x90c00 0x80>;
246				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
247			};
248
249			serial0: serial@91a00 {
250				device_type = "serial";
251				compatible = "fsl,mpc8560-scc-uart",
252				             "fsl,cpm2-scc-uart";
253				reg = <0x91a00 0x20 0x88000 0x100>;
254				fsl,cpm-brg = <1>;
255				fsl,cpm-command = <0x800000>;
256				current-speed = <115200>;
257				interrupts = <40 8>;
258				interrupt-parent = <&cpmpic>;
259			};
260
261			serial1: serial@91a20 {
262				device_type = "serial";
263				compatible = "fsl,mpc8560-scc-uart",
264				             "fsl,cpm2-scc-uart";
265				reg = <0x91a20 0x20 0x88100 0x100>;
266				fsl,cpm-brg = <2>;
267				fsl,cpm-command = <0x4a00000>;
268				current-speed = <115200>;
269				interrupts = <41 8>;
270				interrupt-parent = <&cpmpic>;
271			};
272
273			enet2: ethernet@91320 {
274				device_type = "network";
275				compatible = "fsl,mpc8560-fcc-enet",
276				             "fsl,cpm2-fcc-enet";
277				reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
278				local-mac-address = [ 00 00 00 00 00 00 ];
279				fsl,cpm-command = <0x16200300>;
280				interrupts = <33 8>;
281				interrupt-parent = <&cpmpic>;
282				phy-handle = <&phy2>;
283			};
284
285			enet3: ethernet@91340 {
286				device_type = "network";
287				compatible = "fsl,mpc8560-fcc-enet",
288				             "fsl,cpm2-fcc-enet";
289				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
290				local-mac-address = [ 00 00 00 00 00 00 ];
291				fsl,cpm-command = <0x1a400300>;
292				interrupts = <34 8>;
293				interrupt-parent = <&cpmpic>;
294				phy-handle = <&phy3>;
295			};
296		};
297	};
298
299	pci0: pci@e0008000 {
300		#interrupt-cells = <1>;
301		#size-cells = <2>;
302		#address-cells = <3>;
303		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
304		device_type = "pci";
305		reg = <0xe0008000 0x1000>;
306		clock-frequency = <66666666>;
307		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
308		interrupt-map = <
309
310				/* IDSEL 0x2 */
311				 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
312				 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
313				 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
314				 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
315
316				/* IDSEL 0x3 */
317				 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
318				 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
319				 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
320				 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
321
322				/* IDSEL 0x4 */
323				 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
324				 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
325				 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
326				 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
327
328				/* IDSEL 0x5  */
329				 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
330				 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
331				 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
332				 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
333
334				/* IDSEL 12 */
335				 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
336				 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
337				 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
338				 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
339
340				/* IDSEL 13 */
341				 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
342				 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
343				 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
344				 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
345
346				/* IDSEL 14*/
347				 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
348				 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
349				 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
350				 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
351
352				/* IDSEL 15 */
353				 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
354				 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
355				 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
356				 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
357
358				/* IDSEL 18 */
359				 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
360				 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
361				 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
362				 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
363
364				/* IDSEL 19 */
365				 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
366				 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
367				 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
368				 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
369
370				/* IDSEL 20 */
371				 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
372				 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
373				 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
374				 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
375
376				/* IDSEL 21 */
377				 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
378				 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
379				 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
380				 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
381
382		interrupt-parent = <&mpic>;
383		interrupts = <24 2>;
384		bus-range = <0 0>;
385		ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
386			  0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
387	};
388};
389