1 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains enumerations and support routines for ARM build attributes 10 // as defined in ARM ABI addenda document (ABI release 2.08). 11 // 12 // ELF for the ARM Architecture r2.09 - November 30, 2012 13 // 14 // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf 15 // 16 //===----------------------------------------------------------------------===// 17 18 #ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 19 #define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 20 21 #include "llvm/Support/Compiler.h" 22 #include "llvm/Support/ELFAttributes.h" 23 24 namespace llvm { 25 namespace ARMBuildAttrs { 26 27 LLVM_ABI const TagNameMap &getARMAttributeTags(); 28 29 enum SpecialAttr { 30 // This is for the .cpu asm attr. It translates into one or more 31 // AttrType (below) entries in the .ARM.attributes section in the ELF. 32 SEL_CPU 33 }; 34 35 enum AttrType : unsigned { 36 // Rest correspond to ELF/.ARM.attributes 37 File = 1, 38 CPU_raw_name = 4, 39 CPU_name = 5, 40 CPU_arch = 6, 41 CPU_arch_profile = 7, 42 ARM_ISA_use = 8, 43 THUMB_ISA_use = 9, 44 FP_arch = 10, 45 WMMX_arch = 11, 46 Advanced_SIMD_arch = 12, 47 PCS_config = 13, 48 ABI_PCS_R9_use = 14, 49 ABI_PCS_RW_data = 15, 50 ABI_PCS_RO_data = 16, 51 ABI_PCS_GOT_use = 17, 52 ABI_PCS_wchar_t = 18, 53 ABI_FP_rounding = 19, 54 ABI_FP_denormal = 20, 55 ABI_FP_exceptions = 21, 56 ABI_FP_user_exceptions = 22, 57 ABI_FP_number_model = 23, 58 ABI_align_needed = 24, 59 ABI_align_preserved = 25, 60 ABI_enum_size = 26, 61 ABI_HardFP_use = 27, 62 ABI_VFP_args = 28, 63 ABI_WMMX_args = 29, 64 ABI_optimization_goals = 30, 65 ABI_FP_optimization_goals = 31, 66 compatibility = 32, 67 CPU_unaligned_access = 34, 68 FP_HP_extension = 36, 69 ABI_FP_16bit_format = 38, 70 MPextension_use = 42, // recoded from 70 (ABI r2.08) 71 DIV_use = 44, 72 DSP_extension = 46, 73 MVE_arch = 48, 74 PAC_extension = 50, 75 BTI_extension = 52, 76 also_compatible_with = 65, 77 conformance = 67, 78 Virtualization_use = 68, 79 BTI_use = 74, 80 PACRET_use = 76, 81 82 /// Legacy Tags 83 Section = 2, // deprecated (ABI r2.09) 84 Symbol = 3, // deprecated (ABI r2.09) 85 ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09) 86 ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09) 87 nodefaults = 64, // deprecated (ABI r2.09) 88 T2EE_use = 66, // deprecated (ABI r2.09) 89 MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08) 90 }; 91 92 // Legal Values for CPU_arch, (=6), uleb128 93 enum CPUArch { 94 Pre_v4 = 0, 95 v4 = 1, // e.g. SA110 96 v4T = 2, // e.g. ARM7TDMI 97 v5T = 3, // e.g. ARM9TDMI 98 v5TE = 4, // e.g. ARM946E_S 99 v5TEJ = 5, // e.g. ARM926EJ_S 100 v6 = 6, // e.g. ARM1136J_S 101 v6KZ = 7, // e.g. ARM1176JZ_S 102 v6T2 = 8, // e.g. ARM1156T2_S 103 v6K = 9, // e.g. ARM1176JZ_S 104 v7 = 10, // e.g. Cortex A8, Cortex M3 105 v6_M = 11, // e.g. Cortex M1 106 v6S_M = 12, // v6_M with the System extensions 107 v7E_M = 13, // v7_M with DSP extensions 108 v8_A = 14, // v8_A AArch32 109 v8_R = 15, // e.g. Cortex R52 110 v8_M_Base = 16, // v8_M_Base AArch32 111 v8_M_Main = 17, // v8_M_Main AArch32 112 v8_1_M_Main = 21, // v8_1_M_Main AArch32 113 v9_A = 22, // v9_A AArch32 114 }; 115 116 enum CPUArchProfile { // (=7), uleb128 117 Not_Applicable = 0, // pre v7, or cross-profile code 118 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) 119 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) 120 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) 121 SystemProfile = (0x53) // 'S' Application or real-time profile 122 }; 123 124 // The following have a lot of common use cases 125 enum { 126 Not_Allowed = 0, 127 Allowed = 1, 128 129 // Tag_ARM_ISA_use (=8), uleb128 130 131 // Tag_THUMB_ISA_use, (=9), uleb128 132 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) 133 AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile 134 135 // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) 136 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) 137 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) 138 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 139 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 140 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 141 AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted 142 AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only 143 // D0-D15, S0-S31 144 145 // Tag_WMMX_arch, (=11), uleb128 146 AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1 147 AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2 148 149 // Tag_Advanced_SIMD_arch, (=12), uleb128 150 AllowNeon = 1, // SIMDv1 was permitted 151 AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) 152 AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted 153 AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA) 154 155 // Tag_MVE_arch, (=48), uleb128 156 AllowMVEInteger = 1, // integer-only MVE was permitted 157 AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted 158 159 // Tag_ABI_PCS_R9_use, (=14), uleb128 160 R9IsGPR = 0, // R9 used as v6 (just another callee-saved register) 161 R9IsSB = 1, // R9 used as a global static base rgister 162 R9IsTLSPointer = 2, // R9 used as a thread local storage pointer 163 R9Reserved = 3, // R9 not used by code associated with attributed entity 164 165 // Tag_ABI_PCS_RW_data, (=15), uleb128 166 AddressRWPCRel = 1, // Address RW static data PC-relative 167 AddressRWSBRel = 2, // Address RW static data SB-relative 168 AddressRWNone = 3, // No RW static data permitted 169 170 // Tag_ABI_PCS_RO_data, (=14), uleb128 171 AddressROPCRel = 1, // Address RO static data PC-relative 172 AddressRONone = 2, // No RO static data permitted 173 174 // Tag_ABI_PCS_GOT_use, (=17), uleb128 175 AddressDirect = 1, // Address imported data directly 176 AddressGOT = 2, // Address imported data indirectly (via GOT) 177 178 // Tag_ABI_PCS_wchar_t, (=18), uleb128 179 WCharProhibited = 0, // wchar_t is not used 180 WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2 181 WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4 182 183 // Tag_ABI_align_needed, (=24), uleb128 184 Align8Byte = 1, 185 Align4Byte = 2, 186 AlignReserved = 3, 187 188 // Tag_ABI_align_needed, (=25), uleb128 189 AlignNotPreserved = 0, 190 AlignPreserve8Byte = 1, 191 AlignPreserveAll = 2, 192 193 // Tag_ABI_FP_denormal, (=20), uleb128 194 PositiveZero = 0, 195 IEEEDenormals = 1, 196 PreserveFPSign = 2, // sign when flushed-to-zero is preserved 197 198 // Tag_ABI_FP_number_model, (=23), uleb128 199 AllowIEEENormal = 1, 200 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) 201 AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings 202 203 // Tag_ABI_enum_size, (=26), uleb128 204 EnumProhibited = 0, // The user prohibited the use of enums when building 205 // this entity. 206 EnumSmallest = 1, // Enum is smallest container big enough to hold all 207 // values. 208 Enum32Bit = 2, // Enum is at least 32 bits. 209 Enum32BitABI = 3, // Every enumeration visible across an ABI-complying 210 // interface contains a value needing 32 bits to encode 211 // it; other enums can be containerized. 212 213 // Tag_ABI_HardFP_use, (=27), uleb128 214 HardFPImplied = 0, // FP use should be implied by Tag_FP_arch 215 HardFPSinglePrecision = 1, // Single-precision only 216 217 // Tag_ABI_VFP_args, (=28), uleb128 218 BaseAAPCS = 0, 219 HardFPAAPCS = 1, 220 ToolChainFPPCS = 2, 221 CompatibleFPAAPCS = 3, 222 223 // Tag_FP_HP_extension, (=36), uleb128 224 AllowHPFP = 1, // Allow use of Half Precision FP 225 226 // Tag_FP_16bit_format, (=38), uleb128 227 FP16FormatIEEE = 1, 228 FP16VFP3 = 2, 229 230 // Tag_MPextension_use, (=42), uleb128 231 AllowMP = 1, // Allow use of MP extensions 232 233 // Tag_DIV_use, (=44), uleb128 234 // Note: AllowDIVExt must be emitted if and only if the permission to use 235 // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV 236 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no 237 // info exists. 238 DisallowDIV = 1, // Hardware divide explicitly disallowed. 239 AllowDIVExt = 2, // Allow hardware divide as optional architecture 240 // extension above the base arch specified by 241 // Tag_CPU_arch and Tag_CPU_arch_profile. 242 243 // Tag_Virtualization_use, (=68), uleb128 244 AllowTZ = 1, 245 AllowVirtualization = 2, 246 AllowTZVirtualization = 3, 247 248 // Tag_PAC_extension, (=50), uleb128 249 DisallowPAC = 0, 250 AllowPACInNOPSpace = 1, 251 AllowPAC = 2, 252 253 // Tag_BTI_extension, (=52), uleb128 254 DisallowBTI = 0, 255 AllowBTIInNOPSpace = 1, 256 AllowBTI = 2, 257 258 // Tag_BTI_use, (=74), uleb128 259 BTINotUsed = 0, 260 BTIUsed = 1, 261 262 // Tag_PACRET_use, (=76), uleb128 263 PACRETNotUsed = 0, 264 PACRETUsed = 1 265 }; 266 267 } // namespace ARMBuildAttrs 268 } // namespace llvm 269 270 #endif 271