1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2025, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 35 #ifndef _IXGBE_E610_H_ 36 #define _IXGBE_E610_H_ 37 38 #include "ixgbe_type.h" 39 40 void ixgbe_init_aci(struct ixgbe_hw *hw); 41 void ixgbe_shutdown_aci(struct ixgbe_hw *hw); 42 s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, 43 void *buf, u16 buf_size); 44 bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw); 45 s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e, 46 bool *pending); 47 48 void ixgbe_fill_dflt_direct_cmd_desc(struct ixgbe_aci_desc *desc, u16 opcode); 49 50 s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw); 51 s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv); 52 s32 ixgbe_aci_set_pf_context(struct ixgbe_hw *hw, u8 pf_id); 53 54 s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, 55 enum ixgbe_aci_res_access_type access, u32 timeout); 56 void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res); 57 s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size, 58 u32 *cap_count, enum ixgbe_aci_opc opc); 59 s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw, 60 struct ixgbe_hw_dev_caps *dev_caps); 61 s32 ixgbe_discover_func_caps(struct ixgbe_hw* hw, 62 struct ixgbe_hw_func_caps* func_caps); 63 s32 ixgbe_get_caps(struct ixgbe_hw *hw); 64 s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw); 65 s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode, 66 struct ixgbe_aci_cmd_get_phy_caps_data *pcaps); 67 bool ixgbe_phy_caps_equals_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, 68 struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 69 void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, 70 struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 71 s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, 72 struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 73 s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link); 74 s32 ixgbe_update_link_info(struct ixgbe_hw *hw); 75 s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up); 76 s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse, 77 struct ixgbe_link_status *link); 78 s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask); 79 s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask); 80 81 s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw, 82 struct ixgbe_aci_cmd_get_link_topo *cmd, 83 u8 *node_part_number, u16 *node_handle); 84 s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx, 85 u8 node_part_number, u16 *node_handle); 86 s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw, 87 struct ixgbe_aci_cmd_link_topo_addr topo_addr, 88 u16 bus_addr, __le16 addr, u8 params, u8 *data); 89 s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw, 90 struct ixgbe_aci_cmd_link_topo_addr topo_addr, 91 u16 bus_addr, __le16 addr, u8 params, u8 *data); 92 93 s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode); 94 s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 95 bool value); 96 s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 97 bool *value); 98 s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr, 99 u16 mem_addr, u8 page, u8 page_bank_ctrl, u8 *data, 100 u8 length, bool write); 101 s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw, 102 struct ixgbe_aci_cmd_link_topo_params *topo_params); 103 s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw, 104 struct ixgbe_aci_cmd_link_topo_params *topo_params, 105 u32 start_address, u8 *data, u8 data_size); 106 107 s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw, 108 enum ixgbe_aci_res_access_type access); 109 void ixgbe_release_nvm(struct ixgbe_hw *hw); 110 111 s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset, 112 u16 length, void *data, bool last_command, 113 bool read_shadow_ram); 114 115 s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid); 116 s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid, 117 u32 offset, u16 length, void *data, 118 bool last_command, u8 command_flags); 119 120 s32 ixgbe_aci_read_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags, 121 u16 field_id, void *data, u16 buf_size, 122 u16 *elem_count); 123 s32 ixgbe_aci_write_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags, 124 void *data, u16 buf_size, u16 elem_count); 125 126 s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw); 127 s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw); 128 129 s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags, 130 u8 *response_flags); 131 132 s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); 133 s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); 134 135 s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); 136 s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); 137 138 s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, struct ixgbe_netlist_info *netlist); 139 s32 ixgbe_init_nvm(struct ixgbe_hw *hw); 140 141 s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw); 142 s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values); 143 144 s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data); 145 s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data); 146 s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length, 147 u8 *data, bool read_shadow_ram); 148 149 s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data); 150 s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, const u16 *data); 151 152 s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0, 153 u32 reg_val0, u32 reg_addr1, u32 reg_val1); 154 s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0, 155 u32 *reg_val0, u32 reg_addr1, u32 *reg_val1); 156 s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode, 157 bool *reset_needed); 158 s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw); 159 160 s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id, 161 u16 table_id, u32 start, void *buf, 162 u16 buf_size, u16 *ret_buf_size, 163 u16 *ret_next_cluster, u16 *ret_next_table, 164 u32 *ret_next_index); 165 166 s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw, 167 struct ixgbe_nvm_access_cmd *cmd, 168 struct ixgbe_nvm_access_data *data); 169 170 s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source); 171 172 /* E610 operations */ 173 s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw); 174 s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw); 175 s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw); 176 enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw); 177 u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw); 178 s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed, 179 bool autoneg_wait); 180 s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 181 bool *link_up, bool link_up_wait_to_complete); 182 s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw, 183 ixgbe_link_speed *speed, 184 bool *autoneg); 185 s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw, 186 struct ixgbe_aci_cmd_set_phy_cfg_data *cfg, 187 enum ixgbe_fc_mode req_mode); 188 s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw); 189 void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw); 190 s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 191 u8 sub, u16 len, const char *driver_ver); 192 void ixgbe_disable_rx_E610(struct ixgbe_hw *hw); 193 s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee); 194 bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw); 195 bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw); 196 bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw); 197 s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw); 198 s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw); 199 s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw); 200 s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw); 201 s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw, 202 u16 *firmware_version); 203 s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset, 204 u8 *sff8472_data); 205 s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, 206 u8 *eeprom_data); 207 s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, 208 u8 eeprom_data); 209 s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw); 210 s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on); 211 s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw); 212 s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw); 213 s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data); 214 s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, 215 u16 words, u16 *data); 216 s32 ixgbe_write_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 data); 217 s32 ixgbe_write_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, 218 u16 words, u16 *data); 219 s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw); 220 s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw); 221 s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val); 222 s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); 223 224 #endif /* _IXGBE_E610_H_ */ 225