xref: /linux/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c (revision 1a9239bb4253f9076b5b4b2a1a4e8d7defd77a95)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * StarFive DWMAC platform driver
4  *
5  * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
6  * Copyright (C) 2022 StarFive Technology Co., Ltd.
7  *
8  */
9 
10 #include <linux/mod_devicetable.h>
11 #include <linux/platform_device.h>
12 #include <linux/property.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/regmap.h>
15 
16 #include "stmmac_platform.h"
17 
18 #define STARFIVE_DWMAC_PHY_INFT_RGMII		0x1
19 #define STARFIVE_DWMAC_PHY_INFT_RMII		0x4
20 #define STARFIVE_DWMAC_PHY_INFT_FIELD		0x7U
21 
22 #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN	0xc8
23 
24 struct starfive_dwmac_data {
25 	unsigned int gtxclk_dlychain;
26 };
27 
28 struct starfive_dwmac {
29 	struct device *dev;
30 	const struct starfive_dwmac_data *data;
31 };
32 
starfive_dwmac_set_mode(struct plat_stmmacenet_data * plat_dat)33 static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
34 {
35 	struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
36 	struct regmap *regmap;
37 	unsigned int args[2];
38 	unsigned int mode;
39 	int err;
40 
41 	switch (plat_dat->mac_interface) {
42 	case PHY_INTERFACE_MODE_RMII:
43 		mode = STARFIVE_DWMAC_PHY_INFT_RMII;
44 		break;
45 
46 	case PHY_INTERFACE_MODE_RGMII:
47 	case PHY_INTERFACE_MODE_RGMII_ID:
48 	case PHY_INTERFACE_MODE_RGMII_RXID:
49 	case PHY_INTERFACE_MODE_RGMII_TXID:
50 		mode = STARFIVE_DWMAC_PHY_INFT_RGMII;
51 		break;
52 
53 	default:
54 		dev_err(dwmac->dev, "unsupported interface %d\n",
55 			plat_dat->mac_interface);
56 		return -EINVAL;
57 	}
58 
59 	regmap = syscon_regmap_lookup_by_phandle_args(dwmac->dev->of_node,
60 						      "starfive,syscon",
61 						      2, args);
62 	if (IS_ERR(regmap))
63 		return dev_err_probe(dwmac->dev, PTR_ERR(regmap), "getting the regmap failed\n");
64 
65 	/* args[0]:offset  args[1]: shift */
66 	err = regmap_update_bits(regmap, args[0],
67 				 STARFIVE_DWMAC_PHY_INFT_FIELD << args[1],
68 				 mode << args[1]);
69 	if (err)
70 		return dev_err_probe(dwmac->dev, err, "error setting phy mode\n");
71 
72 	if (dwmac->data) {
73 		err = regmap_write(regmap, JH7100_SYSMAIN_REGISTER49_DLYCHAIN,
74 				   dwmac->data->gtxclk_dlychain);
75 		if (err)
76 			return dev_err_probe(dwmac->dev, err,
77 					     "error selecting gtxclk delay chain\n");
78 	}
79 
80 	return 0;
81 }
82 
starfive_dwmac_probe(struct platform_device * pdev)83 static int starfive_dwmac_probe(struct platform_device *pdev)
84 {
85 	struct plat_stmmacenet_data *plat_dat;
86 	struct stmmac_resources stmmac_res;
87 	struct starfive_dwmac *dwmac;
88 	struct clk *clk_gtx;
89 	int err;
90 
91 	err = stmmac_get_platform_resources(pdev, &stmmac_res);
92 	if (err)
93 		return dev_err_probe(&pdev->dev, err,
94 				     "failed to get resources\n");
95 
96 	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
97 	if (IS_ERR(plat_dat))
98 		return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
99 				     "dt configuration failed\n");
100 
101 	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
102 	if (!dwmac)
103 		return -ENOMEM;
104 
105 	dwmac->data = device_get_match_data(&pdev->dev);
106 
107 	plat_dat->clk_tx_i = devm_clk_get_enabled(&pdev->dev, "tx");
108 	if (IS_ERR(plat_dat->clk_tx_i))
109 		return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat->clk_tx_i),
110 				     "error getting tx clock\n");
111 
112 	clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
113 	if (IS_ERR(clk_gtx))
114 		return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx),
115 				     "error getting gtx clock\n");
116 
117 	/* Generally, the rgmii_tx clock is provided by the internal clock,
118 	 * which needs to match the corresponding clock frequency according
119 	 * to different speeds. If the rgmii_tx clock is provided by the
120 	 * external rgmii_rxin, there is no need to configure the clock
121 	 * internally, because rgmii_rxin will be adaptively adjusted.
122 	 */
123 	if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
124 		plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
125 
126 	dwmac->dev = &pdev->dev;
127 	plat_dat->flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP;
128 	plat_dat->bsp_priv = dwmac;
129 	plat_dat->dma_cfg->dche = true;
130 
131 	err = starfive_dwmac_set_mode(plat_dat);
132 	if (err)
133 		return err;
134 
135 	return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
136 }
137 
138 static const struct starfive_dwmac_data jh7100_data = {
139 	.gtxclk_dlychain = 4,
140 };
141 
142 static const struct of_device_id starfive_dwmac_match[] = {
143 	{ .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data },
144 	{ .compatible = "starfive,jh7110-dwmac" },
145 	{ /* sentinel */ }
146 };
147 MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
148 
149 static struct platform_driver starfive_dwmac_driver = {
150 	.probe  = starfive_dwmac_probe,
151 	.remove = stmmac_pltfr_remove,
152 	.driver = {
153 		.name = "starfive-dwmac",
154 		.pm = &stmmac_pltfr_pm_ops,
155 		.of_match_table = starfive_dwmac_match,
156 	},
157 };
158 module_platform_driver(starfive_dwmac_driver);
159 
160 MODULE_LICENSE("GPL");
161 MODULE_DESCRIPTION("StarFive DWMAC platform driver");
162 MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
163 MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
164