xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h (revision 4db102dcb0396a4ccf89b1eac0f4eb3fd167a080)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
3  */
4 
5 #ifndef _DPU_HW_MERGE3D_H
6 #define _DPU_HW_MERGE3D_H
7 
8 #include "dpu_hw_catalog.h"
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
11 
12 struct dpu_hw_merge_3d;
13 
14 /**
15  *
16  * struct dpu_hw_merge_3d_ops : Interface to the merge_3d Hw driver functions
17  *  Assumption is these functions will be called after clocks are enabled
18  *  @setup_3d_mode : enable 3D merge
19  */
20 struct dpu_hw_merge_3d_ops {
21 	void (*setup_3d_mode)(struct dpu_hw_merge_3d *merge_3d,
22 			enum dpu_3d_blend_mode mode_3d);
23 
24 };
25 
26 struct dpu_hw_merge_3d {
27 	struct dpu_hw_blk base;
28 	struct dpu_hw_blk_reg_map hw;
29 
30 	/* merge_3d */
31 	enum dpu_merge_3d idx;
32 	const struct dpu_merge_3d_cfg *caps;
33 
34 	/* ops */
35 	struct dpu_hw_merge_3d_ops ops;
36 };
37 
38 /**
39  * to_dpu_hw_merge_3d - convert base object dpu_hw_base to container
40  * @hw: Pointer to base hardware block
41  * return: Pointer to hardware block container
42  */
to_dpu_hw_merge_3d(struct dpu_hw_blk * hw)43 static inline struct dpu_hw_merge_3d *to_dpu_hw_merge_3d(struct dpu_hw_blk *hw)
44 {
45 	return container_of(hw, struct dpu_hw_merge_3d, base);
46 }
47 
48 /**
49  * dpu_hw_merge_3d_init() - Initializes the merge_3d driver for the passed
50  * merge3d catalog entry.
51  * @dev:  Corresponding device for devres management
52  * @cfg:  Pingpong catalog entry for which driver object is required
53  * @addr: Mapped register io address of MDP
54  * Return: Error code or allocated dpu_hw_merge_3d context
55  */
56 struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(struct drm_device *dev,
57 					     const struct dpu_merge_3d_cfg *cfg,
58 					     void __iomem *addr);
59 
60 #endif /*_DPU_HW_MERGE3D_H */
61