1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_HDMI_H__ 7 #define __INTEL_HDMI_H__ 8 9 #include <linux/types.h> 10 11 enum hdmi_infoframe_type; 12 enum intel_output_format; 13 enum port; 14 struct drm_connector; 15 struct drm_connector_state; 16 struct drm_encoder; 17 struct intel_connector; 18 struct intel_crtc_state; 19 struct intel_digital_port; 20 struct intel_encoder; 21 struct intel_hdmi; 22 union hdmi_infoframe; 23 24 bool intel_hdmi_init_connector(struct intel_digital_port *dig_port, 25 struct intel_connector *intel_connector); 26 bool intel_hdmi_compute_has_hdmi_sink(struct intel_encoder *encoder, 27 const struct intel_crtc_state *crtc_state, 28 const struct drm_connector_state *conn_state); 29 int intel_hdmi_compute_config(struct intel_encoder *encoder, 30 struct intel_crtc_state *pipe_config, 31 struct drm_connector_state *conn_state); 32 void intel_hdmi_encoder_shutdown(struct intel_encoder *encoder); 33 bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, 34 struct drm_connector *connector, 35 bool high_tmds_clock_ratio, 36 bool scrambling); 37 void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable); 38 void intel_infoframe_init(struct intel_digital_port *dig_port); 39 u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder, 40 const struct intel_crtc_state *crtc_state); 41 u32 intel_hdmi_infoframe_enable(unsigned int type); 42 void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder, 43 struct intel_crtc_state *crtc_state); 44 void intel_hdmi_fastset_infoframes(struct intel_encoder *encoder, 45 const struct intel_crtc_state *crtc_state, 46 const struct drm_connector_state *conn_state); 47 void intel_read_infoframe(struct intel_encoder *encoder, 48 const struct intel_crtc_state *crtc_state, 49 enum hdmi_infoframe_type type, 50 union hdmi_infoframe *frame); 51 bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state, 52 const struct drm_connector_state *conn_state); 53 bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state, 54 int bpc, bool has_hdmi_sink); 55 int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format); 56 int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, 57 int num_slices, int output_format, bool hdmi_all_bpp, 58 int hdmi_max_chunk_bytes); 59 int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state, 60 int src_max_slices, int src_max_slice_width, 61 int hdmi_max_slices, int hdmi_throughput); 62 int intel_hdmi_dsc_get_slice_height(int vactive); 63 64 void hsw_write_infoframe(struct intel_encoder *encoder, 65 const struct intel_crtc_state *crtc_state, 66 unsigned int type, 67 const void *frame, ssize_t len); 68 void hsw_read_infoframe(struct intel_encoder *encoder, 69 const struct intel_crtc_state *crtc_state, 70 unsigned int type, 71 void *frame, ssize_t len); 72 73 #endif /* __INTEL_HDMI_H__ */ 74