1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_DP_H__ 7 #define __INTEL_DP_H__ 8 9 #include <linux/types.h> 10 11 enum intel_output_format; 12 enum pipe; 13 enum port; 14 struct drm_connector_state; 15 struct drm_encoder; 16 struct drm_i915_private; 17 struct drm_modeset_acquire_ctx; 18 struct drm_dp_vsc_sdp; 19 struct intel_atomic_state; 20 struct intel_connector; 21 struct intel_crtc_state; 22 struct intel_digital_port; 23 struct intel_dp; 24 struct intel_encoder; 25 26 struct link_config_limits { 27 int min_rate, max_rate; 28 int min_lane_count, max_lane_count; 29 struct { 30 /* Uncompressed DSC input or link output bpp in 1 bpp units */ 31 int min_bpp, max_bpp; 32 } pipe; 33 struct { 34 /* Compressed or uncompressed link output bpp in 1/16 bpp units */ 35 int min_bpp_x16, max_bpp_x16; 36 } link; 37 }; 38 39 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 40 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, 41 struct intel_crtc_state *pipe_config, 42 struct link_config_limits *limits); 43 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state, 44 const struct drm_connector_state *conn_state); 45 int intel_dp_min_bpp(enum intel_output_format output_format); 46 void intel_dp_init_modeset_retry_work(struct intel_connector *connector); 47 void 48 intel_dp_queue_modeset_retry_for_link(struct intel_atomic_state *state, 49 struct intel_encoder *encoder, 50 const struct intel_crtc_state *crtc_state); 51 bool intel_dp_init_connector(struct intel_digital_port *dig_port, 52 struct intel_connector *intel_connector); 53 void intel_dp_connector_sync_state(struct intel_connector *connector, 54 const struct intel_crtc_state *crtc_state); 55 void intel_dp_set_link_params(struct intel_dp *intel_dp, 56 int link_rate, int lane_count); 57 int intel_dp_get_active_pipes(struct intel_dp *intel_dp, 58 struct drm_modeset_acquire_ctx *ctx, 59 u8 *pipe_mask); 60 void intel_dp_link_check(struct intel_encoder *encoder); 61 void intel_dp_check_link_state(struct intel_dp *intel_dp); 62 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode); 63 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, 64 const struct intel_crtc_state *crtc_state); 65 void intel_dp_sink_enable_decompression(struct intel_atomic_state *state, 66 struct intel_connector *connector, 67 const struct intel_crtc_state *new_crtc_state); 68 void intel_dp_sink_disable_decompression(struct intel_atomic_state *state, 69 struct intel_connector *connector, 70 const struct intel_crtc_state *old_crtc_state); 71 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); 72 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder); 73 void intel_dp_encoder_flush_work(struct drm_encoder *encoder); 74 int intel_dp_compute_config(struct intel_encoder *encoder, 75 struct intel_crtc_state *pipe_config, 76 struct drm_connector_state *conn_state); 77 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, 78 struct intel_crtc_state *pipe_config, 79 struct drm_connector_state *conn_state, 80 struct link_config_limits *limits, 81 int timeslots, 82 bool recompute_pipe_bpp); 83 void intel_dp_audio_compute_config(struct intel_encoder *encoder, 84 struct intel_crtc_state *pipe_config, 85 struct drm_connector_state *conn_state); 86 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); 87 bool intel_dp_is_edp(struct intel_dp *intel_dp); 88 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); 89 bool intel_dp_has_dsc(const struct intel_connector *connector); 90 int intel_dp_link_symbol_size(int rate); 91 int intel_dp_link_symbol_clock(int rate); 92 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); 93 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, 94 bool long_hpd); 95 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, 96 const struct drm_connector_state *conn_state); 97 void intel_edp_backlight_off(const struct drm_connector_state *conn_state); 98 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 99 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv); 100 void intel_dp_mst_resume(struct drm_i915_private *dev_priv); 101 int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port); 102 int intel_dp_max_link_rate(struct intel_dp *intel_dp); 103 int intel_dp_max_lane_count(struct intel_dp *intel_dp); 104 int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state); 105 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); 106 int intel_dp_max_common_rate(struct intel_dp *intel_dp); 107 int intel_dp_max_common_lane_count(struct intel_dp *intel_dp); 108 int intel_dp_common_rate(struct intel_dp *intel_dp, int index); 109 int intel_dp_rate_index(const int *rates, int len, int rate); 110 int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lane_count); 111 void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx, int *link_rate, int *lane_count); 112 void intel_dp_update_sink_caps(struct intel_dp *intel_dp); 113 void intel_dp_reset_link_params(struct intel_dp *intel_dp); 114 115 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, 116 u8 *link_bw, u8 *rate_select); 117 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915); 118 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915); 119 120 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); 121 int intel_dp_link_required(int pixel_clock, int bpp); 122 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, 123 int bw_overhead); 124 int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, 125 int max_dprx_rate, int max_dprx_lanes); 126 bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner); 127 bool intel_dp_has_joiner(struct intel_dp *intel_dp); 128 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, 129 const struct drm_connector_state *conn_state); 130 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, 131 const struct intel_crtc_state *crtc_state, 132 const struct drm_connector_state *conn_state); 133 void intel_read_dp_sdp(struct intel_encoder *encoder, 134 struct intel_crtc_state *crtc_state, 135 unsigned int type); 136 void intel_digital_port_lock(struct intel_encoder *encoder); 137 void intel_digital_port_unlock(struct intel_encoder *encoder); 138 bool intel_digital_port_connected(struct intel_encoder *encoder); 139 bool intel_digital_port_connected_locked(struct intel_encoder *encoder); 140 int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, 141 u8 dsc_max_bpc); 142 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, 143 u32 link_clock, u32 lane_count, 144 u32 mode_clock, u32 mode_hdisplay, 145 bool bigjoiner, 146 enum intel_output_format output_format, 147 u32 pipe_bpp, 148 u32 timeslots); 149 int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config); 150 int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, 151 struct intel_crtc_state *pipe_config, 152 int bpc); 153 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, 154 int mode_clock, int mode_hdisplay, 155 bool bigjoiner); 156 bool intel_dp_need_joiner(struct intel_dp *intel_dp, 157 struct intel_connector *connector, 158 int hdisplay, int clock); 159 160 static inline unsigned int intel_dp_unused_lane_mask(int lane_count) 161 { 162 return ~((1 << lane_count) - 1) & 0xf; 163 } 164 165 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 166 const struct intel_connector *connector, 167 const struct intel_crtc_state *pipe_config); 168 u32 intel_dp_mode_to_fec_clock(u32 mode_clock); 169 int intel_dp_bw_fec_overhead(bool fec_enabled); 170 171 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 172 const struct intel_connector *connector, 173 const struct intel_crtc_state *pipe_config); 174 175 bool intel_dp_supports_dsc(const struct intel_connector *connector, 176 const struct intel_crtc_state *crtc_state); 177 178 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp); 179 180 void intel_ddi_update_pipe(struct intel_atomic_state *state, 181 struct intel_encoder *encoder, 182 const struct intel_crtc_state *crtc_state, 183 const struct drm_connector_state *conn_state); 184 185 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, 186 struct intel_crtc_state *crtc_state); 187 void intel_dp_sync_state(struct intel_encoder *encoder, 188 const struct intel_crtc_state *crtc_state); 189 190 void intel_dp_check_frl_training(struct intel_dp *intel_dp); 191 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, 192 const struct intel_crtc_state *crtc_state); 193 void intel_dp_phy_test(struct intel_encoder *encoder); 194 195 void intel_dp_wait_source_oui(struct intel_dp *intel_dp); 196 int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); 197 198 bool 199 intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, 200 const struct intel_crtc_state *crtc_state, 201 bool dsc, 202 struct link_config_limits *limits); 203 204 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); 205 bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder); 206 207 #endif /* __INTEL_DP_H__ */ 208