1 /*
2 * Copyright (C) 2016 Cavium Inc.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28 #include "opt_platform.h"
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/resource.h>
36 #include <sys/rman.h>
37 #include <sys/socket.h>
38 #include <sys/queue.h>
39
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/fdt/simplebus.h>
43
44 #include <machine/bus.h>
45 #include <machine/resource.h>
46
47 static MALLOC_DEFINE(M_MRMLB, "MRML bridge", "Cavium MRML bridge");
48
49 static device_probe_t mrmlb_fdt_probe;
50 static device_attach_t mrmlb_fdt_attach;
51
52 static struct resource * mrmlb_ofw_bus_alloc_res(device_t, device_t, int, int *,
53 rman_res_t, rman_res_t, rman_res_t, u_int);
54
55 static const struct ofw_bus_devinfo * mrmlb_ofw_get_devinfo(device_t, device_t);
56
57 static device_method_t mrmlbus_fdt_methods[] = {
58 /* Device interface */
59 DEVMETHOD(device_probe, mrmlb_fdt_probe),
60 DEVMETHOD(device_attach, mrmlb_fdt_attach),
61
62 /* Bus interface */
63 DEVMETHOD(bus_alloc_resource, mrmlb_ofw_bus_alloc_res),
64 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
65 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
66
67 /* ofw_bus interface */
68 DEVMETHOD(ofw_bus_get_devinfo, mrmlb_ofw_get_devinfo),
69 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
70 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
71 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
72 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
73 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
74
75 DEVMETHOD_END
76 };
77
78 DEFINE_CLASS_0(mrmlbus, mrmlbus_fdt_driver, mrmlbus_fdt_methods,
79 sizeof(struct simplebus_softc));
80
81 EARLY_DRIVER_MODULE(mrmlbus, pcib, mrmlbus_fdt_driver, 0, 0,
82 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
83 MODULE_VERSION(mrmlbus, 1);
84
85 static int mrmlb_ofw_fill_ranges(phandle_t, struct simplebus_softc *);
86 static int mrmlb_ofw_bus_attach(device_t);
87
88 static int
mrmlb_fdt_probe(device_t dev)89 mrmlb_fdt_probe(device_t dev)
90 {
91
92 if (!ofw_bus_status_okay(dev))
93 return (ENXIO);
94
95 if (!ofw_bus_is_compatible(dev, "cavium,thunder-8890-mrml-bridge"))
96 return (ENXIO);
97
98 device_set_desc(dev, "Cavium ThunderX MRML bridge");
99 return (BUS_PROBE_SPECIFIC);
100 }
101
102 static int
mrmlb_fdt_attach(device_t dev)103 mrmlb_fdt_attach(device_t dev)
104 {
105 int err;
106
107 err = mrmlb_ofw_bus_attach(dev);
108 if (err != 0)
109 return (err);
110
111 bus_attach_children(dev);
112 return (0);
113 }
114
115 /* OFW bus interface */
116 struct mrmlb_ofw_devinfo {
117 struct ofw_bus_devinfo di_dinfo;
118 struct resource_list di_rl;
119 };
120
121 static const struct ofw_bus_devinfo *
mrmlb_ofw_get_devinfo(device_t bus __unused,device_t child)122 mrmlb_ofw_get_devinfo(device_t bus __unused, device_t child)
123 {
124 struct mrmlb_ofw_devinfo *di;
125
126 di = device_get_ivars(child);
127 return (&di->di_dinfo);
128 }
129
130 static struct resource *
mrmlb_ofw_bus_alloc_res(device_t bus,device_t child,int type,int * rid,rman_res_t start,rman_res_t end,rman_res_t count,u_int flags)131 mrmlb_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
132 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
133 {
134 struct simplebus_softc *sc;
135 struct mrmlb_ofw_devinfo *di;
136 struct resource_list_entry *rle;
137 int i;
138
139 if (RMAN_IS_DEFAULT_RANGE(start, end)) {
140 if ((di = device_get_ivars(child)) == NULL)
141 return (NULL);
142 if (type == SYS_RES_IOPORT)
143 type = SYS_RES_MEMORY;
144
145 /* Find defaults for this rid */
146 rle = resource_list_find(&di->di_rl, type, *rid);
147 if (rle == NULL)
148 return (NULL);
149
150 start = rle->start;
151 end = rle->end;
152 count = rle->count;
153 }
154
155 sc = device_get_softc(bus);
156
157 if (type == SYS_RES_MEMORY) {
158 /* Remap through ranges property */
159 for (i = 0; i < sc->nranges; i++) {
160 if (start >= sc->ranges[i].bus && end <
161 sc->ranges[i].bus + sc->ranges[i].size) {
162 start -= sc->ranges[i].bus;
163 start += sc->ranges[i].host;
164 end -= sc->ranges[i].bus;
165 end += sc->ranges[i].host;
166 break;
167 }
168 }
169
170 if (i == sc->nranges && sc->nranges != 0) {
171 device_printf(bus, "Could not map resource "
172 "%#lx-%#lx\n", start, end);
173 return (NULL);
174 }
175 }
176
177 return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
178 count, flags));
179 }
180
181 /* Helper functions */
182
183 static int
mrmlb_ofw_fill_ranges(phandle_t node,struct simplebus_softc * sc)184 mrmlb_ofw_fill_ranges(phandle_t node, struct simplebus_softc *sc)
185 {
186 int host_address_cells;
187 cell_t *base_ranges;
188 ssize_t nbase_ranges;
189 int err;
190 int i, j, k;
191
192 err = OF_searchencprop(OF_parent(node), "#address-cells",
193 &host_address_cells, sizeof(host_address_cells));
194 if (err <= 0)
195 return (-1);
196
197 nbase_ranges = OF_getproplen(node, "ranges");
198 if (nbase_ranges < 0)
199 return (-1);
200 sc->nranges = nbase_ranges / sizeof(cell_t) /
201 (sc->acells + host_address_cells + sc->scells);
202 if (sc->nranges == 0)
203 return (0);
204
205 sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
206 M_MRMLB, M_WAITOK);
207 base_ranges = malloc(nbase_ranges, M_MRMLB, M_WAITOK);
208 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
209
210 for (i = 0, j = 0; i < sc->nranges; i++) {
211 sc->ranges[i].bus = 0;
212 for (k = 0; k < sc->acells; k++) {
213 sc->ranges[i].bus <<= 32;
214 sc->ranges[i].bus |= base_ranges[j++];
215 }
216 sc->ranges[i].host = 0;
217 for (k = 0; k < host_address_cells; k++) {
218 sc->ranges[i].host <<= 32;
219 sc->ranges[i].host |= base_ranges[j++];
220 }
221 sc->ranges[i].size = 0;
222 for (k = 0; k < sc->scells; k++) {
223 sc->ranges[i].size <<= 32;
224 sc->ranges[i].size |= base_ranges[j++];
225 }
226 }
227
228 free(base_ranges, M_MRMLB);
229 return (sc->nranges);
230 }
231
232 static int
mrmlb_ofw_bus_attach(device_t dev)233 mrmlb_ofw_bus_attach(device_t dev)
234 {
235 struct simplebus_softc *sc;
236 struct mrmlb_ofw_devinfo *di;
237 device_t child;
238 phandle_t parent, node;
239
240 parent = ofw_bus_get_node(dev);
241 simplebus_init(dev, parent);
242
243 sc = device_get_softc(dev);
244
245 if (mrmlb_ofw_fill_ranges(parent, sc) < 0) {
246 device_printf(dev, "could not get ranges\n");
247 return (ENXIO);
248 }
249 /* Iterate through all bus subordinates */
250 for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
251 /* Allocate and populate devinfo. */
252 di = malloc(sizeof(*di), M_MRMLB, M_WAITOK | M_ZERO);
253 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
254 free(di, M_MRMLB);
255 continue;
256 }
257
258 /* Initialize and populate resource list. */
259 resource_list_init(&di->di_rl);
260 ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
261 &di->di_rl);
262 ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
263
264 /* Add newbus device for this FDT node */
265 child = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
266 if (child == NULL) {
267 resource_list_free(&di->di_rl);
268 ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
269 free(di, M_MRMLB);
270 continue;
271 }
272
273 device_set_ivars(child, di);
274 }
275
276 return (0);
277 }
278