1 /*-
2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
3 *
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include "opt_wlan.h"
18
19 #include <sys/param.h>
20 #include <sys/sockio.h>
21 #include <sys/sysctl.h>
22 #include <sys/lock.h>
23 #include <sys/mutex.h>
24 #include <sys/mbuf.h>
25 #include <sys/kernel.h>
26 #include <sys/socket.h>
27 #include <sys/systm.h>
28 #include <sys/malloc.h>
29 #include <sys/module.h>
30 #include <sys/bus.h>
31 #include <sys/endian.h>
32 #include <sys/kdb.h>
33
34 #include <net/if.h>
35 #include <net/if_var.h>
36 #include <net/if_arp.h>
37 #include <net/ethernet.h>
38 #include <net/if_dl.h>
39 #include <net/if_media.h>
40 #include <net/if_types.h>
41
42 #ifdef INET
43 #include <netinet/in.h>
44 #include <netinet/in_systm.h>
45 #include <netinet/in_var.h>
46 #include <netinet/if_ether.h>
47 #include <netinet/ip.h>
48 #endif
49
50 #include <net80211/ieee80211_var.h>
51 #include <net80211/ieee80211_regdomain.h>
52 #include <net80211/ieee80211_radiotap.h>
53
54 #include <dev/usb/usb.h>
55 #include <dev/usb/usbdi.h>
56 #include "usbdevs.h"
57
58 #include <dev/usb/wlan/if_urtwreg.h>
59 #include <dev/usb/wlan/if_urtwvar.h>
60
61 /* copy some rate indices from if_rtwn_ridx.h */
62 #define URTW_RIDX_CCK5 2
63 #define URTW_RIDX_CCK11 3
64 #define URTW_RIDX_OFDM6 4
65 #define URTW_RIDX_OFDM24 8
66
67 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
68 "USB Realtek 8187L");
69 #ifdef URTW_DEBUG
70 int urtw_debug = 0;
71 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0,
72 "control debugging printfs");
73 enum {
74 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
75 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */
76 URTW_DEBUG_RESET = 0x00000004, /* reset processing */
77 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */
78 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */
79 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */
80 URTW_DEBUG_STAT = 0x00000040, /* statistic */
81 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */
82 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */
83 URTW_DEBUG_ANY = 0xffffffff
84 };
85 #define DPRINTF(sc, m, fmt, ...) do { \
86 if (sc->sc_debug & (m)) \
87 printf(fmt, __VA_ARGS__); \
88 } while (0)
89 #else
90 #define DPRINTF(sc, m, fmt, ...) do { \
91 (void) sc; \
92 } while (0)
93 #endif
94 static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG;
95 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN,
96 &urtw_preamble_mode, 0, "set the preable mode (long or short)");
97
98 /* recognized device vendors/products */
99 #define urtw_lookup(v, p) \
100 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p))
101 #define URTW_DEV_B(v,p) \
102 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) }
103 #define URTW_DEV_L(v,p) \
104 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) }
105 #define URTW_REV_RTL8187B 0
106 #define URTW_REV_RTL8187L 1
107 static const STRUCT_USB_HOST_ID urtw_devs[] = {
108 URTW_DEV_B(NETGEAR, WG111V3),
109 URTW_DEV_B(REALTEK, RTL8187B_0),
110 URTW_DEV_B(REALTEK, RTL8187B_1),
111 URTW_DEV_B(REALTEK, RTL8187B_2),
112 URTW_DEV_B(SITECOMEU, WL168V4),
113 URTW_DEV_L(ASUS, P5B_WIFI),
114 URTW_DEV_L(BELKIN, F5D7050E),
115 URTW_DEV_L(LINKSYS4, WUSB54GCV2),
116 URTW_DEV_L(NETGEAR, WG111V2),
117 URTW_DEV_L(REALTEK, RTL8187),
118 URTW_DEV_L(SITECOMEU, WL168V1),
119 URTW_DEV_L(SURECOM, EP9001G2A),
120 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) },
121 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) },
122 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) },
123 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) },
124 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) },
125 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) },
126 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) },
127 #undef URTW_DEV_L
128 #undef URTW_DEV_B
129 };
130
131 #define urtw_read8_m(sc, val, data) do { \
132 error = urtw_read8_c(sc, val, data); \
133 if (error != 0) \
134 goto fail; \
135 } while (0)
136 #define urtw_write8_m(sc, val, data) do { \
137 error = urtw_write8_c(sc, val, data); \
138 if (error != 0) \
139 goto fail; \
140 } while (0)
141 #define urtw_read16_m(sc, val, data) do { \
142 error = urtw_read16_c(sc, val, data); \
143 if (error != 0) \
144 goto fail; \
145 } while (0)
146 #define urtw_write16_m(sc, val, data) do { \
147 error = urtw_write16_c(sc, val, data); \
148 if (error != 0) \
149 goto fail; \
150 } while (0)
151 #define urtw_read32_m(sc, val, data) do { \
152 error = urtw_read32_c(sc, val, data); \
153 if (error != 0) \
154 goto fail; \
155 } while (0)
156 #define urtw_write32_m(sc, val, data) do { \
157 error = urtw_write32_c(sc, val, data); \
158 if (error != 0) \
159 goto fail; \
160 } while (0)
161 #define urtw_8187_write_phy_ofdm(sc, val, data) do { \
162 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \
163 if (error != 0) \
164 goto fail; \
165 } while (0)
166 #define urtw_8187_write_phy_cck(sc, val, data) do { \
167 error = urtw_8187_write_phy_cck_c(sc, val, data); \
168 if (error != 0) \
169 goto fail; \
170 } while (0)
171 #define urtw_8225_write(sc, val, data) do { \
172 error = urtw_8225_write_c(sc, val, data); \
173 if (error != 0) \
174 goto fail; \
175 } while (0)
176
177 struct urtw_pair {
178 uint32_t reg;
179 uint32_t val;
180 };
181
182 static uint8_t urtw_8225_agc[] = {
183 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b,
184 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90,
185 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85,
186 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a,
187 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f,
188 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24,
189 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19,
190 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
191 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03,
192 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
193 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
194 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
195 };
196
197 static uint8_t urtw_8225z2_agc[] = {
198 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51,
199 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b,
200 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25,
201 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f,
202 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01,
203 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19,
204 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23,
205 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a,
206 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
207 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31,
208 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
209 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31
210 };
211
212 static uint32_t urtw_8225_channel[] = {
213 0x0000, /* dummy channel 0 */
214 0x085c, /* 1 */
215 0x08dc, /* 2 */
216 0x095c, /* 3 */
217 0x09dc, /* 4 */
218 0x0a5c, /* 5 */
219 0x0adc, /* 6 */
220 0x0b5c, /* 7 */
221 0x0bdc, /* 8 */
222 0x0c5c, /* 9 */
223 0x0cdc, /* 10 */
224 0x0d5c, /* 11 */
225 0x0ddc, /* 12 */
226 0x0e5c, /* 13 */
227 0x0f72, /* 14 */
228 };
229
230 static uint8_t urtw_8225_gain[] = {
231 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */
232 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */
233 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */
234 0x33, 0x80, 0x79, 0xc5, /* -78dbm */
235 0x43, 0x78, 0x76, 0xc5, /* -74dbm */
236 0x53, 0x60, 0x73, 0xc5, /* -70dbm */
237 0x63, 0x58, 0x70, 0xc5, /* -66dbm */
238 };
239
240 static struct urtw_pair urtw_8225_rf_part1[] = {
241 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
242 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a },
243 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 },
244 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 },
245 };
246
247 static struct urtw_pair urtw_8225_rf_part2[] = {
248 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
249 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
250 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 },
251 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 },
252 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 },
253 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef },
254 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 },
255 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 },
256 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 },
257 { 0x27, 0x88 }
258 };
259
260 static struct urtw_pair urtw_8225_rf_part3[] = {
261 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
262 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b },
263 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 },
264 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d },
265 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e },
266 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a },
267 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 }
268 };
269
270 static uint16_t urtw_8225_rxgain[] = {
271 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
272 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
273 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
274 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
275 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
276 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
277 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
278 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
279 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
280 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
281 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
282 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
283 };
284
285 static uint8_t urtw_8225_threshold[] = {
286 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
287 };
288
289 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = {
290 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
291 };
292
293 static uint8_t urtw_8225_txpwr_cck[] = {
294 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
295 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
296 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
297 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
298 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
299 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
300 };
301
302 static uint8_t urtw_8225_txpwr_cck_ch14[] = {
303 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
304 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
305 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
306 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
307 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
308 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
309 };
310
311 static uint8_t urtw_8225_txpwr_ofdm[]={
312 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
313 };
314
315 static uint8_t urtw_8225v2_gain_bg[]={
316 0x23, 0x15, 0xa5, /* -82-1dbm */
317 0x23, 0x15, 0xb5, /* -82-2dbm */
318 0x23, 0x15, 0xc5, /* -82-3dbm */
319 0x33, 0x15, 0xc5, /* -78dbm */
320 0x43, 0x15, 0xc5, /* -74dbm */
321 0x53, 0x15, 0xc5, /* -70dbm */
322 0x63, 0x15, 0xc5, /* -66dbm */
323 };
324
325 static struct urtw_pair urtw_8225v2_rf_part1[] = {
326 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
327 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
328 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
329 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
330 };
331
332 static struct urtw_pair urtw_8225v2b_rf_part0[] = {
333 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
334 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
335 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
336 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
337 };
338
339 static struct urtw_pair urtw_8225v2b_rf_part1[] = {
340 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00},
341 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43},
342 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46},
343 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00},
344 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00},
345 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00},
346 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b},
347 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09},
348 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff},
349 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e},
350 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03},
351 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06},
352 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00},
353 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68},
354 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d},
355 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08},
356 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04},
357 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23},
358 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08},
359 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08},
360 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08},
361 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56},
362 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f},
363 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24},
364 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07},
365 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12},
366 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a},
367 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80},
368 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03},
369 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01},
370 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00}
371 };
372
373 static struct urtw_pair urtw_8225v2_rf_part2[] = {
374 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
375 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
376 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 },
377 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 },
378 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 },
379 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 },
380 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 },
381 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 },
382 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 },
383 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 }
384 };
385
386 static struct urtw_pair urtw_8225v2b_rf_part2[] = {
387 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 },
388 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 },
389 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 },
390 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 },
391 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 },
392 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 },
393 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 },
394 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 },
395 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a },
396 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f },
397 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 },
398 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 },
399 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 },
400 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e },
401 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 }
402 };
403
404 static struct urtw_pair urtw_8225v2_rf_part3[] = {
405 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
406 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 },
407 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 },
408 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 },
409 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d },
410 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 },
411 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 },
412 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 }
413 };
414
415 static uint16_t urtw_8225v2_rxgain[] = {
416 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009,
417 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141,
418 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183,
419 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244,
420 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288,
421 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345,
422 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389,
423 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393,
424 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d,
425 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
426 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
427 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
428 };
429
430 static uint16_t urtw_8225v2b_rxgain[] = {
431 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
432 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
433 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
434 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
435 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
436 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
437 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
438 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
439 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
440 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
441 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
442 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
443 };
444
445 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = {
446 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
447 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
448 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
449 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
450 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
451 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
452 };
453
454 static uint8_t urtw_8225v2_txpwr_cck[] = {
455 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
456 };
457
458 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = {
459 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
460 };
461
462 static uint8_t urtw_8225v2b_txpwr_cck[] = {
463 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04,
464 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
465 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
466 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
467 };
468
469 static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = {
470 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00,
471 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
472 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
473 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00
474 };
475
476 static struct urtw_pair urtw_ratetable[] = {
477 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 },
478 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 },
479 { 96, 10 }, { 108, 11 }
480 };
481
482 #if 0
483 static const uint8_t urtw_8187b_reg_table[][3] = {
484 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 },
485 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 },
486 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 },
487 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 },
488 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 },
489 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 },
490 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 },
491 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 },
492 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 },
493 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 },
494 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 },
495 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 },
496 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 },
497 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 },
498 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 },
499 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 },
500 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 },
501 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 },
502 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 },
503 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 },
504 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 },
505 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 },
506 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 },
507 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 },
508 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 },
509 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 },
510 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 },
511 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 },
512 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 },
513 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 },
514 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 }
515 };
516 #endif
517
518 static usb_callback_t urtw_bulk_rx_callback;
519 static usb_callback_t urtw_bulk_tx_callback;
520 static usb_callback_t urtw_bulk_tx_status_callback;
521
522 static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = {
523 [URTW_8187B_BULK_RX] = {
524 .type = UE_BULK,
525 .endpoint = 0x83,
526 .direction = UE_DIR_IN,
527 .bufsize = MCLBYTES,
528 .flags = {
529 .ext_buffer = 1,
530 .pipe_bof = 1,
531 .short_xfer_ok = 1
532 },
533 .callback = urtw_bulk_rx_callback
534 },
535 [URTW_8187B_BULK_TX_STATUS] = {
536 .type = UE_BULK,
537 .endpoint = 0x89,
538 .direction = UE_DIR_IN,
539 .bufsize = sizeof(uint64_t),
540 .flags = {
541 .pipe_bof = 1,
542 .short_xfer_ok = 1
543 },
544 .callback = urtw_bulk_tx_status_callback
545 },
546 [URTW_8187B_BULK_TX_BE] = {
547 .type = UE_BULK,
548 .endpoint = URTW_8187B_TXPIPE_BE,
549 .direction = UE_DIR_OUT,
550 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
551 .flags = {
552 .force_short_xfer = 1,
553 .pipe_bof = 1,
554 },
555 .callback = urtw_bulk_tx_callback,
556 .timeout = URTW_DATA_TIMEOUT
557 },
558 [URTW_8187B_BULK_TX_BK] = {
559 .type = UE_BULK,
560 .endpoint = URTW_8187B_TXPIPE_BK,
561 .direction = UE_DIR_OUT,
562 .bufsize = URTW_TX_MAXSIZE,
563 .flags = {
564 .ext_buffer = 1,
565 .force_short_xfer = 1,
566 .pipe_bof = 1,
567 },
568 .callback = urtw_bulk_tx_callback,
569 .timeout = URTW_DATA_TIMEOUT
570 },
571 [URTW_8187B_BULK_TX_VI] = {
572 .type = UE_BULK,
573 .endpoint = URTW_8187B_TXPIPE_VI,
574 .direction = UE_DIR_OUT,
575 .bufsize = URTW_TX_MAXSIZE,
576 .flags = {
577 .ext_buffer = 1,
578 .force_short_xfer = 1,
579 .pipe_bof = 1,
580 },
581 .callback = urtw_bulk_tx_callback,
582 .timeout = URTW_DATA_TIMEOUT
583 },
584 [URTW_8187B_BULK_TX_VO] = {
585 .type = UE_BULK,
586 .endpoint = URTW_8187B_TXPIPE_VO,
587 .direction = UE_DIR_OUT,
588 .bufsize = URTW_TX_MAXSIZE,
589 .flags = {
590 .ext_buffer = 1,
591 .force_short_xfer = 1,
592 .pipe_bof = 1,
593 },
594 .callback = urtw_bulk_tx_callback,
595 .timeout = URTW_DATA_TIMEOUT
596 },
597 [URTW_8187B_BULK_TX_EP12] = {
598 .type = UE_BULK,
599 .endpoint = 0xc,
600 .direction = UE_DIR_OUT,
601 .bufsize = URTW_TX_MAXSIZE,
602 .flags = {
603 .ext_buffer = 1,
604 .force_short_xfer = 1,
605 .pipe_bof = 1,
606 },
607 .callback = urtw_bulk_tx_callback,
608 .timeout = URTW_DATA_TIMEOUT
609 }
610 };
611
612 static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = {
613 [URTW_8187L_BULK_RX] = {
614 .type = UE_BULK,
615 .endpoint = 0x81,
616 .direction = UE_DIR_IN,
617 .bufsize = MCLBYTES,
618 .flags = {
619 .ext_buffer = 1,
620 .pipe_bof = 1,
621 .short_xfer_ok = 1
622 },
623 .callback = urtw_bulk_rx_callback
624 },
625 [URTW_8187L_BULK_TX_LOW] = {
626 .type = UE_BULK,
627 .endpoint = 0x2,
628 .direction = UE_DIR_OUT,
629 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
630 .flags = {
631 .force_short_xfer = 1,
632 .pipe_bof = 1,
633 },
634 .callback = urtw_bulk_tx_callback,
635 .timeout = URTW_DATA_TIMEOUT
636 },
637 [URTW_8187L_BULK_TX_NORMAL] = {
638 .type = UE_BULK,
639 .endpoint = 0x3,
640 .direction = UE_DIR_OUT,
641 .bufsize = URTW_TX_MAXSIZE,
642 .flags = {
643 .ext_buffer = 1,
644 .force_short_xfer = 1,
645 .pipe_bof = 1,
646 },
647 .callback = urtw_bulk_tx_callback,
648 .timeout = URTW_DATA_TIMEOUT
649 },
650 };
651
652 static struct ieee80211vap *urtw_vap_create(struct ieee80211com *,
653 const char [IFNAMSIZ], int, enum ieee80211_opmode,
654 int, const uint8_t [IEEE80211_ADDR_LEN],
655 const uint8_t [IEEE80211_ADDR_LEN]);
656 static void urtw_vap_delete(struct ieee80211vap *);
657 static void urtw_init(struct urtw_softc *);
658 static void urtw_stop(struct urtw_softc *);
659 static void urtw_parent(struct ieee80211com *);
660 static int urtw_transmit(struct ieee80211com *, struct mbuf *);
661 static void urtw_start(struct urtw_softc *);
662 static int urtw_alloc_rx_data_list(struct urtw_softc *);
663 static int urtw_alloc_tx_data_list(struct urtw_softc *);
664 static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *,
665 const struct ieee80211_bpf_params *);
666 static void urtw_scan_start(struct ieee80211com *);
667 static void urtw_scan_end(struct ieee80211com *);
668 static void urtw_getradiocaps(struct ieee80211com *, int, int *,
669 struct ieee80211_channel[]);
670 static void urtw_set_channel(struct ieee80211com *);
671 static void urtw_update_promisc(struct ieee80211com *);
672 static void urtw_update_mcast(struct ieee80211com *);
673 static int urtw_tx_start(struct urtw_softc *,
674 struct ieee80211_node *, struct mbuf *,
675 struct urtw_data *, int);
676 static int urtw_newstate(struct ieee80211vap *,
677 enum ieee80211_state, int);
678 static void urtw_led_ch(void *);
679 static void urtw_ledtask(void *, int);
680 static void urtw_watchdog(void *);
681 static void urtw_set_multi(void *);
682 static int urtw_isbmode(uint16_t);
683 static uint16_t urtw_rtl2rate(uint32_t);
684 static usb_error_t urtw_set_rate(struct urtw_softc *);
685 static usb_error_t urtw_update_msr(struct urtw_softc *);
686 static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *);
687 static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *);
688 static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *);
689 static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t);
690 static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t);
691 static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t);
692 static usb_error_t urtw_eprom_cs(struct urtw_softc *, int);
693 static usb_error_t urtw_eprom_ck(struct urtw_softc *);
694 static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *,
695 int);
696 static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t,
697 uint32_t *);
698 static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *);
699 static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t);
700 static usb_error_t urtw_get_macaddr(struct urtw_softc *);
701 static usb_error_t urtw_get_txpwr(struct urtw_softc *);
702 static usb_error_t urtw_get_rfchip(struct urtw_softc *);
703 static usb_error_t urtw_led_init(struct urtw_softc *);
704 static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *);
705 static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t);
706 static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t,
707 uint32_t);
708 static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *,
709 uint8_t, uint32_t);
710 static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t,
711 uint32_t);
712 static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t);
713 static usb_error_t urtw_8225_usb_init(struct urtw_softc *);
714 static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t,
715 uint16_t);
716 static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int,
717 uint16_t *);
718 static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t,
719 uint32_t *);
720 static usb_error_t urtw_8225_rf_init(struct urtw_softc *);
721 static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int);
722 static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int);
723 static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int);
724 static usb_error_t urtw_8225_rf_stop(struct urtw_softc *);
725 static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *);
726 static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int);
727 static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int);
728 static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t);
729 static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *);
730 static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *);
731 static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int);
732 static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *);
733 static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t);
734 static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t);
735 static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t);
736 static usb_error_t urtw_intr_enable(struct urtw_softc *);
737 static usb_error_t urtw_intr_disable(struct urtw_softc *);
738 static usb_error_t urtw_reset(struct urtw_softc *);
739 static usb_error_t urtw_led_on(struct urtw_softc *, int);
740 static usb_error_t urtw_led_ctl(struct urtw_softc *, int);
741 static usb_error_t urtw_led_blink(struct urtw_softc *);
742 static usb_error_t urtw_led_mode0(struct urtw_softc *, int);
743 static usb_error_t urtw_led_mode1(struct urtw_softc *, int);
744 static usb_error_t urtw_led_mode2(struct urtw_softc *, int);
745 static usb_error_t urtw_led_mode3(struct urtw_softc *, int);
746 static usb_error_t urtw_rx_setconf(struct urtw_softc *);
747 static usb_error_t urtw_rx_enable(struct urtw_softc *);
748 static usb_error_t urtw_tx_enable(struct urtw_softc *sc);
749 static void urtw_free_tx_data_list(struct urtw_softc *);
750 static void urtw_free_rx_data_list(struct urtw_softc *);
751 static void urtw_free_data_list(struct urtw_softc *,
752 struct urtw_data data[], int, int);
753 static usb_error_t urtw_set_macaddr(struct urtw_softc *, const uint8_t *);
754 static usb_error_t urtw_adapter_start(struct urtw_softc *);
755 static usb_error_t urtw_adapter_start_b(struct urtw_softc *);
756 static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t);
757 static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *);
758 static usb_error_t urtw_do_request(struct urtw_softc *,
759 struct usb_device_request *, void *);
760 static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int);
761 static usb_error_t urtw_led_off(struct urtw_softc *, int);
762 static void urtw_abort_xfers(struct urtw_softc *);
763 static struct urtw_data *
764 urtw_getbuf(struct urtw_softc *sc);
765 static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t,
766 uint8_t);
767 static void urtw_updateslot(struct ieee80211com *);
768 static void urtw_updateslottask(void *, int);
769 static void urtw_sysctl_node(struct urtw_softc *);
770
771 static int
urtw_match(device_t dev)772 urtw_match(device_t dev)
773 {
774 struct usb_attach_arg *uaa = device_get_ivars(dev);
775
776 if (uaa->usb_mode != USB_MODE_HOST)
777 return (ENXIO);
778 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX)
779 return (ENXIO);
780 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX)
781 return (ENXIO);
782
783 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa));
784 }
785
786 static int
urtw_attach(device_t dev)787 urtw_attach(device_t dev)
788 {
789 const struct usb_config *setup_start;
790 int ret = ENXIO;
791 struct urtw_softc *sc = device_get_softc(dev);
792 struct usb_attach_arg *uaa = device_get_ivars(dev);
793 struct ieee80211com *ic = &sc->sc_ic;
794 uint8_t iface_index = URTW_IFACE_INDEX; /* XXX */
795 uint16_t n_setup;
796 uint32_t data;
797 usb_error_t error;
798
799 device_set_usb_desc(dev);
800
801 sc->sc_dev = dev;
802 sc->sc_udev = uaa->device;
803 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B)
804 sc->sc_flags |= URTW_RTL8187B;
805 #ifdef URTW_DEBUG
806 sc->sc_debug = urtw_debug;
807 #endif
808
809 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK,
810 MTX_DEF);
811 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0);
812 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc);
813 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc);
814 callout_init(&sc->sc_watchdog_ch, 0);
815 mbufq_init(&sc->sc_snd, ifqmaxlen);
816
817 if (sc->sc_flags & URTW_RTL8187B) {
818 setup_start = urtw_8187b_usbconfig;
819 n_setup = URTW_8187B_N_XFERS;
820 } else {
821 setup_start = urtw_8187l_usbconfig;
822 n_setup = URTW_8187L_N_XFERS;
823 }
824
825 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
826 setup_start, n_setup, sc, &sc->sc_mtx);
827 if (error) {
828 device_printf(dev, "could not allocate USB transfers, "
829 "err=%s\n", usbd_errstr(error));
830 ret = ENXIO;
831 goto fail0;
832 }
833
834 if (sc->sc_flags & URTW_RTL8187B) {
835 sc->sc_tx_dma_buf =
836 usbd_xfer_get_frame_buffer(sc->sc_xfer[
837 URTW_8187B_BULK_TX_BE], 0);
838 } else {
839 sc->sc_tx_dma_buf =
840 usbd_xfer_get_frame_buffer(sc->sc_xfer[
841 URTW_8187L_BULK_TX_LOW], 0);
842 }
843
844 URTW_LOCK(sc);
845
846 urtw_read32_m(sc, URTW_RX, &data);
847 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 :
848 URTW_EEPROM_93C46;
849
850 error = urtw_get_rfchip(sc);
851 if (error != 0)
852 goto fail;
853 error = urtw_get_macaddr(sc);
854 if (error != 0)
855 goto fail;
856 error = urtw_get_txpwr(sc);
857 if (error != 0)
858 goto fail;
859 error = urtw_led_init(sc);
860 if (error != 0)
861 goto fail;
862
863 URTW_UNLOCK(sc);
864
865 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY;
866 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY;
867 sc->sc_currate = URTW_RIDX_CCK11;
868 sc->sc_preamble_mode = urtw_preamble_mode;
869
870 ic->ic_softc = sc;
871 ic->ic_name = device_get_nameunit(dev);
872 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
873 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
874
875 /* set device capabilities */
876 ic->ic_caps =
877 IEEE80211_C_STA | /* station mode */
878 IEEE80211_C_MONITOR | /* monitor mode supported */
879 IEEE80211_C_TXPMGT | /* tx power management */
880 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
881 IEEE80211_C_SHSLOT | /* short slot time supported */
882 IEEE80211_C_BGSCAN | /* capable of bg scanning */
883 IEEE80211_C_WPA; /* 802.11i */
884
885 /* XXX TODO: setup regdomain if URTW_EPROM_CHANPLAN_BY_HW bit is set.*/
886
887 ic->ic_flags_ext |= IEEE80211_FEXT_SEQNO_OFFLOAD;
888
889 urtw_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
890 ic->ic_channels);
891
892 ieee80211_ifattach(ic);
893 ic->ic_raw_xmit = urtw_raw_xmit;
894 ic->ic_scan_start = urtw_scan_start;
895 ic->ic_scan_end = urtw_scan_end;
896 ic->ic_getradiocaps = urtw_getradiocaps;
897 ic->ic_set_channel = urtw_set_channel;
898 ic->ic_updateslot = urtw_updateslot;
899 ic->ic_vap_create = urtw_vap_create;
900 ic->ic_vap_delete = urtw_vap_delete;
901 ic->ic_update_promisc = urtw_update_promisc;
902 ic->ic_update_mcast = urtw_update_mcast;
903 ic->ic_parent = urtw_parent;
904 ic->ic_transmit = urtw_transmit;
905
906 ieee80211_radiotap_attach(ic,
907 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
908 URTW_TX_RADIOTAP_PRESENT,
909 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
910 URTW_RX_RADIOTAP_PRESENT);
911
912 urtw_sysctl_node(sc);
913
914 if (bootverbose)
915 ieee80211_announce(ic);
916 return (0);
917
918 fail:
919 URTW_UNLOCK(sc);
920 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ?
921 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS);
922 fail0:
923 return (ret);
924 }
925
926 static int
urtw_detach(device_t dev)927 urtw_detach(device_t dev)
928 {
929 struct urtw_softc *sc = device_get_softc(dev);
930 struct ieee80211com *ic = &sc->sc_ic;
931 unsigned x;
932 unsigned n_xfers;
933
934 /* Prevent further ioctls */
935 URTW_LOCK(sc);
936 sc->sc_flags |= URTW_DETACHED;
937 urtw_stop(sc);
938 URTW_UNLOCK(sc);
939
940 ieee80211_draintask(ic, &sc->sc_updateslot_task);
941 ieee80211_draintask(ic, &sc->sc_led_task);
942
943 usb_callout_drain(&sc->sc_led_ch);
944 callout_drain(&sc->sc_watchdog_ch);
945
946 n_xfers = (sc->sc_flags & URTW_RTL8187B) ?
947 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS;
948
949 /* prevent further allocations from RX/TX data lists */
950 URTW_LOCK(sc);
951 STAILQ_INIT(&sc->sc_tx_active);
952 STAILQ_INIT(&sc->sc_tx_inactive);
953 STAILQ_INIT(&sc->sc_tx_pending);
954
955 STAILQ_INIT(&sc->sc_rx_active);
956 STAILQ_INIT(&sc->sc_rx_inactive);
957 URTW_UNLOCK(sc);
958
959 /* drain USB transfers */
960 for (x = 0; x != n_xfers; x++)
961 usbd_transfer_drain(sc->sc_xfer[x]);
962
963 /* free data buffers */
964 URTW_LOCK(sc);
965 urtw_free_tx_data_list(sc);
966 urtw_free_rx_data_list(sc);
967 URTW_UNLOCK(sc);
968
969 /* free USB transfers and some data buffers */
970 usbd_transfer_unsetup(sc->sc_xfer, n_xfers);
971
972 ieee80211_ifdetach(ic);
973 mbufq_drain(&sc->sc_snd);
974 mtx_destroy(&sc->sc_mtx);
975 return (0);
976 }
977
978 static void
urtw_free_tx_data_list(struct urtw_softc * sc)979 urtw_free_tx_data_list(struct urtw_softc *sc)
980 {
981 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0);
982 }
983
984 static void
urtw_free_rx_data_list(struct urtw_softc * sc)985 urtw_free_rx_data_list(struct urtw_softc *sc)
986 {
987 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1);
988 }
989
990 static void
urtw_free_data_list(struct urtw_softc * sc,struct urtw_data data[],int ndata,int fillmbuf)991 urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata,
992 int fillmbuf)
993 {
994 int i;
995
996 for (i = 0; i < ndata; i++) {
997 struct urtw_data *dp = &data[i];
998
999 if (fillmbuf == 1) {
1000 if (dp->m != NULL) {
1001 m_freem(dp->m);
1002 dp->m = NULL;
1003 dp->buf = NULL;
1004 }
1005 } else {
1006 dp->buf = NULL;
1007 }
1008 if (dp->ni != NULL) {
1009 ieee80211_free_node(dp->ni);
1010 dp->ni = NULL;
1011 }
1012 }
1013 }
1014
1015 static struct ieee80211vap *
urtw_vap_create(struct ieee80211com * ic,const char name[IFNAMSIZ],int unit,enum ieee80211_opmode opmode,int flags,const uint8_t bssid[IEEE80211_ADDR_LEN],const uint8_t mac[IEEE80211_ADDR_LEN])1016 urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1017 enum ieee80211_opmode opmode, int flags,
1018 const uint8_t bssid[IEEE80211_ADDR_LEN],
1019 const uint8_t mac[IEEE80211_ADDR_LEN])
1020 {
1021 struct urtw_vap *uvp;
1022 struct ieee80211vap *vap;
1023
1024 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1025 return (NULL);
1026 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1027 vap = &uvp->vap;
1028 /* enable s/w bmiss handling for sta mode */
1029
1030 if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
1031 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) {
1032 /* out of memory */
1033 free(uvp, M_80211_VAP);
1034 return (NULL);
1035 }
1036
1037 /* override state transition machine */
1038 uvp->newstate = vap->iv_newstate;
1039 vap->iv_newstate = urtw_newstate;
1040
1041 /* complete setup */
1042 ieee80211_vap_attach(vap, ieee80211_media_change,
1043 ieee80211_media_status, mac);
1044 ic->ic_opmode = opmode;
1045 return (vap);
1046 }
1047
1048 static void
urtw_vap_delete(struct ieee80211vap * vap)1049 urtw_vap_delete(struct ieee80211vap *vap)
1050 {
1051 struct urtw_vap *uvp = URTW_VAP(vap);
1052
1053 ieee80211_vap_detach(vap);
1054 free(uvp, M_80211_VAP);
1055 }
1056
1057 static void
urtw_init(struct urtw_softc * sc)1058 urtw_init(struct urtw_softc *sc)
1059 {
1060 usb_error_t error;
1061 int ret;
1062
1063 URTW_ASSERT_LOCKED(sc);
1064
1065 if (sc->sc_flags & URTW_RUNNING)
1066 urtw_stop(sc);
1067
1068 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) :
1069 urtw_adapter_start(sc);
1070 if (error != 0)
1071 goto fail;
1072
1073 /* reset softc variables */
1074 sc->sc_txtimer = 0;
1075
1076 if (!(sc->sc_flags & URTW_INIT_ONCE)) {
1077 ret = urtw_alloc_rx_data_list(sc);
1078 if (ret != 0)
1079 goto fail;
1080 ret = urtw_alloc_tx_data_list(sc);
1081 if (ret != 0)
1082 goto fail;
1083 sc->sc_flags |= URTW_INIT_ONCE;
1084 }
1085
1086 error = urtw_rx_enable(sc);
1087 if (error != 0)
1088 goto fail;
1089 error = urtw_tx_enable(sc);
1090 if (error != 0)
1091 goto fail;
1092
1093 if (sc->sc_flags & URTW_RTL8187B)
1094 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]);
1095
1096 sc->sc_flags |= URTW_RUNNING;
1097
1098 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1099 fail:
1100 return;
1101 }
1102
1103 static usb_error_t
urtw_adapter_start_b(struct urtw_softc * sc)1104 urtw_adapter_start_b(struct urtw_softc *sc)
1105 {
1106 uint8_t data8;
1107 usb_error_t error;
1108
1109 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1110 if (error)
1111 goto fail;
1112
1113 urtw_read8_m(sc, URTW_CONFIG3, &data8);
1114 urtw_write8_m(sc, URTW_CONFIG3,
1115 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT);
1116 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON);
1117 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON);
1118 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON);
1119
1120 urtw_write8_m(sc, 0x61, 0x10);
1121 urtw_read8_m(sc, 0x62, &data8);
1122 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5));
1123 urtw_write8_m(sc, 0x62, data8 | (1 << 5));
1124
1125 urtw_read8_m(sc, URTW_CONFIG3, &data8);
1126 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE;
1127 urtw_write8_m(sc, URTW_CONFIG3, data8);
1128
1129 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1130 if (error)
1131 goto fail;
1132
1133 error = urtw_8187b_cmd_reset(sc);
1134 if (error)
1135 goto fail;
1136
1137 error = sc->sc_rf_init(sc);
1138 if (error != 0)
1139 goto fail;
1140 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1141
1142 /* fix RTL8187B RX stall */
1143 error = urtw_intr_enable(sc);
1144 if (error)
1145 goto fail;
1146
1147 error = urtw_write8e(sc, 0x41, 0xf4);
1148 if (error)
1149 goto fail;
1150 error = urtw_write8e(sc, 0x40, 0x00);
1151 if (error)
1152 goto fail;
1153 error = urtw_write8e(sc, 0x42, 0x00);
1154 if (error)
1155 goto fail;
1156 error = urtw_write8e(sc, 0x42, 0x01);
1157 if (error)
1158 goto fail;
1159 error = urtw_write8e(sc, 0x40, 0x0f);
1160 if (error)
1161 goto fail;
1162 error = urtw_write8e(sc, 0x42, 0x00);
1163 if (error)
1164 goto fail;
1165 error = urtw_write8e(sc, 0x42, 0x01);
1166 if (error)
1167 goto fail;
1168
1169 urtw_read8_m(sc, 0xdb, &data8);
1170 urtw_write8_m(sc, 0xdb, data8 | (1 << 2));
1171 urtw_write16_m(sc, 0x372, 0x59fa);
1172 urtw_write16_m(sc, 0x374, 0x59d2);
1173 urtw_write16_m(sc, 0x376, 0x59d2);
1174 urtw_write16_m(sc, 0x378, 0x19fa);
1175 urtw_write16_m(sc, 0x37a, 0x19fa);
1176 urtw_write16_m(sc, 0x37c, 0x00d0);
1177 urtw_write8_m(sc, 0x61, 0);
1178
1179 urtw_write8_m(sc, 0x180, 0x0f);
1180 urtw_write8_m(sc, 0x183, 0x03);
1181 urtw_write8_m(sc, 0xda, 0x10);
1182 urtw_write8_m(sc, 0x24d, 0x08);
1183 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b);
1184
1185 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */
1186 fail:
1187 return (error);
1188 }
1189
1190 static usb_error_t
urtw_set_macaddr(struct urtw_softc * sc,const uint8_t * macaddr)1191 urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr)
1192 {
1193 usb_error_t error;
1194
1195 urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]);
1196 urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0xffff);
1197
1198 fail:
1199 return (error);
1200 }
1201
1202 static usb_error_t
urtw_adapter_start(struct urtw_softc * sc)1203 urtw_adapter_start(struct urtw_softc *sc)
1204 {
1205 struct ieee80211com *ic = &sc->sc_ic;
1206 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1207 const uint8_t *macaddr;
1208 usb_error_t error;
1209
1210 error = urtw_reset(sc);
1211 if (error)
1212 goto fail;
1213
1214 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0);
1215 urtw_write8_m(sc, URTW_GPIO, 0);
1216
1217 /* for led */
1218 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1219 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON);
1220 if (error != 0)
1221 goto fail;
1222
1223 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1224 if (error)
1225 goto fail;
1226 /* applying MAC address again. */
1227 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
1228 urtw_set_macaddr(sc, macaddr);
1229 if (error)
1230 goto fail;
1231
1232 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1233 if (error)
1234 goto fail;
1235
1236 error = urtw_update_msr(sc);
1237 if (error)
1238 goto fail;
1239
1240 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0);
1241 urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
1242 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1);
1243 error = urtw_set_rate(sc);
1244 if (error != 0)
1245 goto fail;
1246
1247 error = sc->sc_rf_init(sc);
1248 if (error != 0)
1249 goto fail;
1250 if (sc->sc_rf_set_sens != NULL)
1251 sc->sc_rf_set_sens(sc, sc->sc_sens);
1252
1253 /* XXX correct? to call write16 */
1254 urtw_write16_m(sc, URTW_PSR, 1);
1255 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10);
1256 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80);
1257 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60);
1258 /* XXX correct? to call write16 */
1259 urtw_write16_m(sc, URTW_PSR, 0);
1260 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1261
1262 error = urtw_intr_enable(sc);
1263 if (error != 0)
1264 goto fail;
1265
1266 fail:
1267 return (error);
1268 }
1269
1270 static usb_error_t
urtw_set_mode(struct urtw_softc * sc,uint32_t mode)1271 urtw_set_mode(struct urtw_softc *sc, uint32_t mode)
1272 {
1273 uint8_t data;
1274 usb_error_t error;
1275
1276 urtw_read8_m(sc, URTW_EPROM_CMD, &data);
1277 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT);
1278 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK);
1279 urtw_write8_m(sc, URTW_EPROM_CMD, data);
1280 fail:
1281 return (error);
1282 }
1283
1284 static void
urtw_pause_ms(struct urtw_softc * sc,int delay)1285 urtw_pause_ms(struct urtw_softc *sc, int delay)
1286 {
1287 usb_pause_mtx(&sc->sc_mtx, USB_MS_TO_TICKS(delay));
1288 }
1289
1290 static usb_error_t
urtw_8187b_cmd_reset(struct urtw_softc * sc)1291 urtw_8187b_cmd_reset(struct urtw_softc *sc)
1292 {
1293 int i;
1294 uint8_t data8;
1295 usb_error_t error;
1296
1297 /* XXX the code can be duplicate with urtw_reset(). */
1298 urtw_read8_m(sc, URTW_CMD, &data8);
1299 data8 = (data8 & 0x2) | URTW_CMD_RST;
1300 urtw_write8_m(sc, URTW_CMD, data8);
1301
1302 for (i = 0; i < 20; i++) {
1303 urtw_pause_ms(sc, 2);
1304 urtw_read8_m(sc, URTW_CMD, &data8);
1305 if (!(data8 & URTW_CMD_RST))
1306 break;
1307 }
1308 if (i >= 20) {
1309 device_printf(sc->sc_dev, "reset timeout\n");
1310 goto fail;
1311 }
1312 fail:
1313 return (error);
1314 }
1315
1316 static usb_error_t
urtw_do_request(struct urtw_softc * sc,struct usb_device_request * req,void * data)1317 urtw_do_request(struct urtw_softc *sc,
1318 struct usb_device_request *req, void *data)
1319 {
1320 usb_error_t err;
1321 int ntries = 10;
1322
1323 URTW_ASSERT_LOCKED(sc);
1324
1325 while (ntries--) {
1326 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
1327 req, data, 0, NULL, 250 /* ms */);
1328 if (err == 0)
1329 break;
1330
1331 DPRINTF(sc, URTW_DEBUG_INIT,
1332 "Control request failed, %s (retrying)\n",
1333 usbd_errstr(err));
1334 urtw_pause_ms(sc, 10);
1335 }
1336 return (err);
1337 }
1338
1339 static void
urtw_stop(struct urtw_softc * sc)1340 urtw_stop(struct urtw_softc *sc)
1341 {
1342 uint8_t data8;
1343 usb_error_t error;
1344
1345 URTW_ASSERT_LOCKED(sc);
1346
1347 sc->sc_flags &= ~URTW_RUNNING;
1348
1349 error = urtw_intr_disable(sc);
1350 if (error)
1351 goto fail;
1352 urtw_read8_m(sc, URTW_CMD, &data8);
1353 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1354 urtw_write8_m(sc, URTW_CMD, data8);
1355
1356 error = sc->sc_rf_stop(sc);
1357 if (error != 0)
1358 goto fail;
1359
1360 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1361 if (error)
1362 goto fail;
1363 urtw_read8_m(sc, URTW_CONFIG4, &data8);
1364 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF);
1365 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1366 if (error)
1367 goto fail;
1368 fail:
1369 if (error)
1370 device_printf(sc->sc_dev, "failed to stop (%s)\n",
1371 usbd_errstr(error));
1372
1373 usb_callout_stop(&sc->sc_led_ch);
1374 callout_stop(&sc->sc_watchdog_ch);
1375
1376 urtw_abort_xfers(sc);
1377 }
1378
1379 static void
urtw_abort_xfers(struct urtw_softc * sc)1380 urtw_abort_xfers(struct urtw_softc *sc)
1381 {
1382 int i, max;
1383
1384 URTW_ASSERT_LOCKED(sc);
1385
1386 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS :
1387 URTW_8187L_N_XFERS;
1388
1389 /* abort any pending transfers */
1390 for (i = 0; i < max; i++)
1391 usbd_transfer_stop(sc->sc_xfer[i]);
1392 }
1393
1394 static void
urtw_parent(struct ieee80211com * ic)1395 urtw_parent(struct ieee80211com *ic)
1396 {
1397 struct urtw_softc *sc = ic->ic_softc;
1398 int startall = 0;
1399
1400 URTW_LOCK(sc);
1401 if (sc->sc_flags & URTW_DETACHED) {
1402 URTW_UNLOCK(sc);
1403 return;
1404 }
1405
1406 if (ic->ic_nrunning > 0) {
1407 if (sc->sc_flags & URTW_RUNNING) {
1408 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0)
1409 urtw_set_multi(sc);
1410 } else {
1411 urtw_init(sc);
1412 startall = 1;
1413 }
1414 } else if (sc->sc_flags & URTW_RUNNING)
1415 urtw_stop(sc);
1416 URTW_UNLOCK(sc);
1417 if (startall)
1418 ieee80211_start_all(ic);
1419 }
1420
1421 static int
urtw_transmit(struct ieee80211com * ic,struct mbuf * m)1422 urtw_transmit(struct ieee80211com *ic, struct mbuf *m)
1423 {
1424 struct urtw_softc *sc = ic->ic_softc;
1425 int error;
1426
1427 URTW_LOCK(sc);
1428 if ((sc->sc_flags & URTW_RUNNING) == 0) {
1429 URTW_UNLOCK(sc);
1430 return (ENXIO);
1431 }
1432 error = mbufq_enqueue(&sc->sc_snd, m);
1433 if (error) {
1434 URTW_UNLOCK(sc);
1435 return (error);
1436 }
1437 urtw_start(sc);
1438 URTW_UNLOCK(sc);
1439
1440 return (0);
1441 }
1442
1443 static void
urtw_start(struct urtw_softc * sc)1444 urtw_start(struct urtw_softc *sc)
1445 {
1446 struct urtw_data *bf;
1447 struct ieee80211_node *ni;
1448 struct mbuf *m;
1449
1450 URTW_ASSERT_LOCKED(sc);
1451
1452 if ((sc->sc_flags & URTW_RUNNING) == 0)
1453 return;
1454
1455 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1456 bf = urtw_getbuf(sc);
1457 if (bf == NULL) {
1458 mbufq_prepend(&sc->sc_snd, m);
1459 break;
1460 }
1461
1462 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1463 m->m_pkthdr.rcvif = NULL;
1464
1465 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) {
1466 if_inc_counter(ni->ni_vap->iv_ifp,
1467 IFCOUNTER_OERRORS, 1);
1468 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1469 ieee80211_free_node(ni);
1470 break;
1471 }
1472
1473 sc->sc_txtimer = 5;
1474 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1475 }
1476 }
1477
1478 static int
urtw_alloc_data_list(struct urtw_softc * sc,struct urtw_data data[],int ndata,int maxsz,void * dma_buf)1479 urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[],
1480 int ndata, int maxsz, void *dma_buf)
1481 {
1482 int i, error;
1483
1484 for (i = 0; i < ndata; i++) {
1485 struct urtw_data *dp = &data[i];
1486
1487 dp->sc = sc;
1488 if (dma_buf == NULL) {
1489 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1490 if (dp->m == NULL) {
1491 device_printf(sc->sc_dev,
1492 "could not allocate rx mbuf\n");
1493 error = ENOMEM;
1494 goto fail;
1495 }
1496 dp->buf = mtod(dp->m, uint8_t *);
1497 } else {
1498 dp->m = NULL;
1499 dp->buf = ((uint8_t *)dma_buf) +
1500 (i * maxsz);
1501 }
1502 dp->ni = NULL;
1503 }
1504 return (0);
1505
1506 fail: urtw_free_data_list(sc, data, ndata, 1);
1507 return (error);
1508 }
1509
1510 static int
urtw_alloc_rx_data_list(struct urtw_softc * sc)1511 urtw_alloc_rx_data_list(struct urtw_softc *sc)
1512 {
1513 int error, i;
1514
1515 error = urtw_alloc_data_list(sc,
1516 sc->sc_rx, URTW_RX_DATA_LIST_COUNT,
1517 MCLBYTES, NULL /* mbufs */);
1518 if (error != 0)
1519 return (error);
1520
1521 STAILQ_INIT(&sc->sc_rx_active);
1522 STAILQ_INIT(&sc->sc_rx_inactive);
1523
1524 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++)
1525 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1526
1527 return (0);
1528 }
1529
1530 static int
urtw_alloc_tx_data_list(struct urtw_softc * sc)1531 urtw_alloc_tx_data_list(struct urtw_softc *sc)
1532 {
1533 int error, i;
1534
1535 error = urtw_alloc_data_list(sc,
1536 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE,
1537 sc->sc_tx_dma_buf /* no mbufs */);
1538 if (error != 0)
1539 return (error);
1540
1541 STAILQ_INIT(&sc->sc_tx_active);
1542 STAILQ_INIT(&sc->sc_tx_inactive);
1543 STAILQ_INIT(&sc->sc_tx_pending);
1544
1545 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++)
1546 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i],
1547 next);
1548
1549 return (0);
1550 }
1551
1552 static int
urtw_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)1553 urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1554 const struct ieee80211_bpf_params *params)
1555 {
1556 struct ieee80211com *ic = ni->ni_ic;
1557 struct urtw_softc *sc = ic->ic_softc;
1558 struct urtw_data *bf;
1559
1560 /* prevent management frames from being sent if we're not ready */
1561 if (!(sc->sc_flags & URTW_RUNNING)) {
1562 m_freem(m);
1563 return ENETDOWN;
1564 }
1565 URTW_LOCK(sc);
1566 bf = urtw_getbuf(sc);
1567 if (bf == NULL) {
1568 m_freem(m);
1569 URTW_UNLOCK(sc);
1570 return (ENOBUFS); /* XXX */
1571 }
1572
1573 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) {
1574 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1575 URTW_UNLOCK(sc);
1576 return (EIO);
1577 }
1578 URTW_UNLOCK(sc);
1579
1580 sc->sc_txtimer = 5;
1581 return (0);
1582 }
1583
1584 static void
urtw_scan_start(struct ieee80211com * ic)1585 urtw_scan_start(struct ieee80211com *ic)
1586 {
1587
1588 /* XXX do nothing? */
1589 }
1590
1591 static void
urtw_scan_end(struct ieee80211com * ic)1592 urtw_scan_end(struct ieee80211com *ic)
1593 {
1594
1595 /* XXX do nothing? */
1596 }
1597
1598 static void
urtw_getradiocaps(struct ieee80211com * ic,int maxchans,int * nchans,struct ieee80211_channel chans[])1599 urtw_getradiocaps(struct ieee80211com *ic,
1600 int maxchans, int *nchans, struct ieee80211_channel chans[])
1601 {
1602 uint8_t bands[IEEE80211_MODE_BYTES];
1603
1604 memset(bands, 0, sizeof(bands));
1605 setbit(bands, IEEE80211_MODE_11B);
1606 setbit(bands, IEEE80211_MODE_11G);
1607 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0);
1608 }
1609
1610 static void
urtw_set_channel(struct ieee80211com * ic)1611 urtw_set_channel(struct ieee80211com *ic)
1612 {
1613 struct urtw_softc *sc = ic->ic_softc;
1614 uint32_t data, orig;
1615 usb_error_t error;
1616
1617 /*
1618 * if the user set a channel explicitly using ifconfig(8) this function
1619 * can be called earlier than we're expected that in some cases the
1620 * initialization would be failed if setting a channel is called before
1621 * the init have done.
1622 */
1623 if (!(sc->sc_flags & URTW_RUNNING))
1624 return;
1625
1626 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan)
1627 return;
1628
1629 URTW_LOCK(sc);
1630
1631 /*
1632 * during changing th channel we need to temporarily be disable
1633 * TX.
1634 */
1635 urtw_read32_m(sc, URTW_TX_CONF, &orig);
1636 data = orig & ~URTW_TX_LOOPBACK_MASK;
1637 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC);
1638
1639 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan));
1640 if (error != 0)
1641 goto fail;
1642 urtw_pause_ms(sc, 10);
1643 urtw_write32_m(sc, URTW_TX_CONF, orig);
1644
1645 urtw_write16_m(sc, URTW_ATIM_WND, 2);
1646 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1647 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
1648 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1649
1650 fail:
1651 URTW_UNLOCK(sc);
1652
1653 sc->sc_curchan = ic->ic_curchan;
1654
1655 if (error != 0)
1656 device_printf(sc->sc_dev, "could not change the channel\n");
1657 }
1658
1659 static void
urtw_update_promisc(struct ieee80211com * ic)1660 urtw_update_promisc(struct ieee80211com *ic)
1661 {
1662 struct urtw_softc *sc = ic->ic_softc;
1663
1664 URTW_LOCK(sc);
1665 if (sc->sc_flags & URTW_RUNNING)
1666 urtw_rx_setconf(sc);
1667 URTW_UNLOCK(sc);
1668 }
1669
1670 static void
urtw_update_mcast(struct ieee80211com * ic)1671 urtw_update_mcast(struct ieee80211com *ic)
1672 {
1673
1674 /* XXX do nothing? */
1675 }
1676
1677 static int
urtw_tx_start(struct urtw_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,struct urtw_data * data,int prior)1678 urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0,
1679 struct urtw_data *data, int prior)
1680 {
1681 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1682 struct ieee80211_key *k;
1683 const struct ieee80211_txparam *tp = ni->ni_txparms;
1684 struct ieee80211com *ic = &sc->sc_ic;
1685 struct ieee80211vap *vap = ni->ni_vap;
1686 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = {
1687 sc->sc_xfer[URTW_8187B_BULK_TX_BE],
1688 sc->sc_xfer[URTW_8187B_BULK_TX_BK],
1689 sc->sc_xfer[URTW_8187B_BULK_TX_VI],
1690 sc->sc_xfer[URTW_8187B_BULK_TX_VO]
1691 };
1692 struct usb_xfer *xfer;
1693 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, type,
1694 pkttime = 0, txdur = 0, isshort = 0, xferlen, ismcast;
1695 uint16_t acktime, rtstime, ctstime;
1696 uint32_t flags;
1697 usb_error_t error;
1698
1699 URTW_ASSERT_LOCKED(sc);
1700
1701 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1702 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1703
1704
1705 /* Assign sequence number */
1706 ieee80211_output_seqno_assign(ni, -1, m0);
1707
1708 /*
1709 * Software crypto.
1710 */
1711 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1712 k = ieee80211_crypto_encap(ni, m0);
1713 if (k == NULL) {
1714 device_printf(sc->sc_dev,
1715 "ieee80211_crypto_encap returns NULL.\n");
1716 /* XXX we don't expect the fragmented frames */
1717 m_freem(m0);
1718 return (ENOBUFS);
1719 }
1720
1721 /* in case packet header moved, reset pointer */
1722 wh = mtod(m0, struct ieee80211_frame *);
1723 }
1724
1725 if (ieee80211_radiotap_active_vap(vap)) {
1726 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap;
1727
1728 tap->wt_flags = 0;
1729 ieee80211_radiotap_tx(vap, m0);
1730 }
1731
1732 if (IEEE80211_IS_MGMT(wh) || IEEE80211_IS_CTL(wh) ||
1733 (m0->m_flags & M_EAPOL) != 0) {
1734 rate = tp->mgmtrate;
1735 } else {
1736 /* for data frames */
1737 if (ismcast)
1738 rate = tp->mcastrate;
1739 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1740 rate = tp->ucastrate;
1741 else
1742 rate = urtw_rtl2rate(sc->sc_currate);
1743 }
1744
1745 sc->sc_stats.txrates[sc->sc_currate]++;
1746
1747 if (ismcast)
1748 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1749 IEEE80211_CRC_LEN, rate, 0, 0);
1750 else {
1751 acktime = urtw_compute_txtime(14, 2,0, 0);
1752 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) {
1753 rtsenable = 1;
1754 ctsenable = 0;
1755 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0);
1756 ctstime = urtw_compute_txtime(14, 2, 0, 0);
1757 pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1758 IEEE80211_CRC_LEN, rate, 0, isshort);
1759 rtsdur = ctstime + pkttime + acktime +
1760 3 * URTW_ASIFS_TIME;
1761 txdur = rtstime + rtsdur;
1762 } else {
1763 rtsenable = ctsenable = rtsdur = 0;
1764 pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1765 IEEE80211_CRC_LEN, rate, 0, isshort);
1766 txdur = pkttime + URTW_ASIFS_TIME + acktime;
1767 }
1768
1769 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1770 dur = urtw_compute_txtime(m0->m_pkthdr.len +
1771 IEEE80211_CRC_LEN, rate, 0, isshort) +
1772 3 * URTW_ASIFS_TIME +
1773 2 * acktime;
1774 else
1775 dur = URTW_ASIFS_TIME + acktime;
1776 }
1777 USETW(wh->i_dur, dur);
1778
1779 xferlen = m0->m_pkthdr.len;
1780 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3);
1781 if ((0 == xferlen % 64) || (0 == xferlen % 512))
1782 xferlen += 1;
1783
1784 memset(data->buf, 0, URTW_TX_MAXSIZE);
1785 flags = m0->m_pkthdr.len & 0xfff;
1786 flags |= URTW_TX_FLAG_NO_ENC;
1787 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1788 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) &&
1789 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) &&
1790 (sc->sc_currate != 0))
1791 flags |= URTW_TX_FLAG_SPLCP;
1792 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1793 flags |= URTW_TX_FLAG_MOREFRAG;
1794
1795 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT;
1796
1797 if (sc->sc_flags & URTW_RTL8187B) {
1798 struct urtw_8187b_txhdr *tx;
1799
1800 tx = (struct urtw_8187b_txhdr *)data->buf;
1801 if (ctsenable)
1802 flags |= URTW_TX_FLAG_CTS;
1803 if (rtsenable) {
1804 flags |= URTW_TX_FLAG_RTS;
1805 flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT;
1806 tx->rtsdur = rtsdur;
1807 }
1808 tx->flag = htole32(flags);
1809 tx->txdur = txdur;
1810 if (IEEE80211_IS_MGMT_PROBE_RESP(wh))
1811 tx->retry = 1;
1812 else
1813 tx->retry = URTW_TX_MAXRETRY;
1814 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1815 } else {
1816 struct urtw_8187l_txhdr *tx;
1817
1818 tx = (struct urtw_8187l_txhdr *)data->buf;
1819 if (rtsenable) {
1820 flags |= URTW_TX_FLAG_RTS;
1821 tx->rtsdur = rtsdur;
1822 }
1823 flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT;
1824 tx->flag = htole32(flags);
1825 tx->retry = 3; /* CW minimum */
1826 tx->retry |= 7 << 4; /* CW maximum */
1827 tx->retry |= URTW_TX_MAXRETRY << 8; /* retry limitation */
1828 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1829 }
1830
1831 data->buflen = xferlen;
1832 data->ni = ni;
1833 data->m = m0;
1834
1835 if (sc->sc_flags & URTW_RTL8187B) {
1836 switch (type) {
1837 case IEEE80211_FC0_TYPE_CTL:
1838 case IEEE80211_FC0_TYPE_MGT:
1839 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12];
1840 break;
1841 default:
1842 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX,
1843 ("unsupported WME pipe %d", M_WME_GETAC(m0)));
1844 xfer = rtl8187b_pipes[M_WME_GETAC(m0)];
1845 break;
1846 }
1847 } else
1848 xfer = (prior == URTW_PRIORITY_LOW) ?
1849 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] :
1850 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL];
1851
1852 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1853 usbd_transfer_start(xfer);
1854
1855 error = urtw_led_ctl(sc, URTW_LED_CTL_TX);
1856 if (error != 0)
1857 device_printf(sc->sc_dev, "could not control LED (%d)\n",
1858 error);
1859 return (0);
1860 }
1861
1862 static int
urtw_newstate(struct ieee80211vap * vap,enum ieee80211_state nstate,int arg)1863 urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1864 {
1865 struct ieee80211com *ic = vap->iv_ic;
1866 struct urtw_softc *sc = ic->ic_softc;
1867 struct urtw_vap *uvp = URTW_VAP(vap);
1868 struct ieee80211_node *ni;
1869 usb_error_t error = 0;
1870
1871 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1872 ieee80211_state_name[vap->iv_state],
1873 ieee80211_state_name[nstate]);
1874
1875 sc->sc_state = nstate;
1876
1877 IEEE80211_UNLOCK(ic);
1878 URTW_LOCK(sc);
1879 usb_callout_stop(&sc->sc_led_ch);
1880 callout_stop(&sc->sc_watchdog_ch);
1881
1882 switch (nstate) {
1883 case IEEE80211_S_INIT:
1884 case IEEE80211_S_SCAN:
1885 case IEEE80211_S_AUTH:
1886 case IEEE80211_S_ASSOC:
1887 break;
1888 case IEEE80211_S_RUN:
1889 ni = ieee80211_ref_node(vap->iv_bss);
1890 /* setting bssid. */
1891 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]);
1892 urtw_write16_m(sc, URTW_BSSID + 4,
1893 ((uint16_t *)ni->ni_bssid)[2]);
1894 urtw_update_msr(sc);
1895 /* XXX maybe the below would be incorrect. */
1896 urtw_write16_m(sc, URTW_ATIM_WND, 2);
1897 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1898 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64);
1899 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1900 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK);
1901 if (error != 0)
1902 device_printf(sc->sc_dev,
1903 "could not control LED (%d)\n", error);
1904 ieee80211_free_node(ni);
1905 break;
1906 default:
1907 break;
1908 }
1909 fail:
1910 URTW_UNLOCK(sc);
1911 IEEE80211_LOCK(ic);
1912 return (uvp->newstate(vap, nstate, arg));
1913 }
1914
1915 static void
urtw_watchdog(void * arg)1916 urtw_watchdog(void *arg)
1917 {
1918 struct urtw_softc *sc = arg;
1919 struct ieee80211com *ic = &sc->sc_ic;
1920
1921 if (sc->sc_txtimer > 0) {
1922 if (--sc->sc_txtimer == 0) {
1923 device_printf(sc->sc_dev, "device timeout\n");
1924 counter_u64_add(ic->ic_oerrors, 1);
1925 ieee80211_restart_all(ic);
1926 return;
1927 }
1928 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1929 }
1930 }
1931
1932 static void
urtw_set_multi(void * arg)1933 urtw_set_multi(void *arg)
1934 {
1935 /* XXX don't know how to set a device. Lack of docs. */
1936 }
1937
1938 static usb_error_t
urtw_set_rate(struct urtw_softc * sc)1939 urtw_set_rate(struct urtw_softc *sc)
1940 {
1941 int i, basic_rate, min_rr_rate, max_rr_rate;
1942 uint16_t data;
1943 usb_error_t error;
1944
1945 basic_rate = URTW_RIDX_OFDM24;
1946 min_rr_rate = URTW_RIDX_OFDM6;
1947 max_rr_rate = URTW_RIDX_OFDM24;
1948
1949 urtw_write8_m(sc, URTW_RESP_RATE,
1950 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT |
1951 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT);
1952
1953 urtw_read16_m(sc, URTW_BRSR, &data);
1954 data &= ~URTW_BRSR_MBR_8185;
1955
1956 for (i = 0; i <= basic_rate; i++)
1957 data |= (1 << i);
1958
1959 urtw_write16_m(sc, URTW_BRSR, data);
1960 fail:
1961 return (error);
1962 }
1963
1964 static uint16_t
urtw_rtl2rate(uint32_t rate)1965 urtw_rtl2rate(uint32_t rate)
1966 {
1967 unsigned i;
1968
1969 for (i = 0; i < nitems(urtw_ratetable); i++) {
1970 if (rate == urtw_ratetable[i].val)
1971 return urtw_ratetable[i].reg;
1972 }
1973
1974 return (0);
1975 }
1976
1977 static usb_error_t
urtw_update_msr(struct urtw_softc * sc)1978 urtw_update_msr(struct urtw_softc *sc)
1979 {
1980 struct ieee80211com *ic = &sc->sc_ic;
1981 uint8_t data;
1982 usb_error_t error;
1983
1984 urtw_read8_m(sc, URTW_MSR, &data);
1985 data &= ~URTW_MSR_LINK_MASK;
1986
1987 if (sc->sc_state == IEEE80211_S_RUN) {
1988 switch (ic->ic_opmode) {
1989 case IEEE80211_M_STA:
1990 case IEEE80211_M_MONITOR:
1991 data |= URTW_MSR_LINK_STA;
1992 if (sc->sc_flags & URTW_RTL8187B)
1993 data |= URTW_MSR_LINK_ENEDCA;
1994 break;
1995 case IEEE80211_M_IBSS:
1996 data |= URTW_MSR_LINK_ADHOC;
1997 break;
1998 case IEEE80211_M_HOSTAP:
1999 data |= URTW_MSR_LINK_HOSTAP;
2000 break;
2001 default:
2002 DPRINTF(sc, URTW_DEBUG_STATE,
2003 "unsupported operation mode 0x%x\n",
2004 ic->ic_opmode);
2005 error = USB_ERR_INVAL;
2006 goto fail;
2007 }
2008 } else
2009 data |= URTW_MSR_LINK_NONE;
2010
2011 urtw_write8_m(sc, URTW_MSR, data);
2012 fail:
2013 return (error);
2014 }
2015
2016 static usb_error_t
urtw_read8_c(struct urtw_softc * sc,int val,uint8_t * data)2017 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data)
2018 {
2019 struct usb_device_request req;
2020 usb_error_t error;
2021
2022 URTW_ASSERT_LOCKED(sc);
2023
2024 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2025 req.bRequest = URTW_8187_GETREGS_REQ;
2026 USETW(req.wValue, (val & 0xff) | 0xff00);
2027 USETW(req.wIndex, (val >> 8) & 0x3);
2028 USETW(req.wLength, sizeof(uint8_t));
2029
2030 error = urtw_do_request(sc, &req, data);
2031 return (error);
2032 }
2033
2034 static usb_error_t
urtw_read16_c(struct urtw_softc * sc,int val,uint16_t * data)2035 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data)
2036 {
2037 struct usb_device_request req;
2038 usb_error_t error;
2039
2040 URTW_ASSERT_LOCKED(sc);
2041
2042 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2043 req.bRequest = URTW_8187_GETREGS_REQ;
2044 USETW(req.wValue, (val & 0xff) | 0xff00);
2045 USETW(req.wIndex, (val >> 8) & 0x3);
2046 USETW(req.wLength, sizeof(uint16_t));
2047
2048 error = urtw_do_request(sc, &req, data);
2049 return (error);
2050 }
2051
2052 static usb_error_t
urtw_read32_c(struct urtw_softc * sc,int val,uint32_t * data)2053 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data)
2054 {
2055 struct usb_device_request req;
2056 usb_error_t error;
2057
2058 URTW_ASSERT_LOCKED(sc);
2059
2060 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2061 req.bRequest = URTW_8187_GETREGS_REQ;
2062 USETW(req.wValue, (val & 0xff) | 0xff00);
2063 USETW(req.wIndex, (val >> 8) & 0x3);
2064 USETW(req.wLength, sizeof(uint32_t));
2065
2066 error = urtw_do_request(sc, &req, data);
2067 return (error);
2068 }
2069
2070 static usb_error_t
urtw_write8_c(struct urtw_softc * sc,int val,uint8_t data)2071 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data)
2072 {
2073 struct usb_device_request req;
2074
2075 URTW_ASSERT_LOCKED(sc);
2076
2077 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2078 req.bRequest = URTW_8187_SETREGS_REQ;
2079 USETW(req.wValue, (val & 0xff) | 0xff00);
2080 USETW(req.wIndex, (val >> 8) & 0x3);
2081 USETW(req.wLength, sizeof(uint8_t));
2082
2083 return (urtw_do_request(sc, &req, &data));
2084 }
2085
2086 static usb_error_t
urtw_write16_c(struct urtw_softc * sc,int val,uint16_t data)2087 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data)
2088 {
2089 struct usb_device_request req;
2090
2091 URTW_ASSERT_LOCKED(sc);
2092
2093 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2094 req.bRequest = URTW_8187_SETREGS_REQ;
2095 USETW(req.wValue, (val & 0xff) | 0xff00);
2096 USETW(req.wIndex, (val >> 8) & 0x3);
2097 USETW(req.wLength, sizeof(uint16_t));
2098
2099 return (urtw_do_request(sc, &req, &data));
2100 }
2101
2102 static usb_error_t
urtw_write32_c(struct urtw_softc * sc,int val,uint32_t data)2103 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data)
2104 {
2105 struct usb_device_request req;
2106
2107 URTW_ASSERT_LOCKED(sc);
2108
2109 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2110 req.bRequest = URTW_8187_SETREGS_REQ;
2111 USETW(req.wValue, (val & 0xff) | 0xff00);
2112 USETW(req.wIndex, (val >> 8) & 0x3);
2113 USETW(req.wLength, sizeof(uint32_t));
2114
2115 return (urtw_do_request(sc, &req, &data));
2116 }
2117
2118 static usb_error_t
urtw_get_macaddr(struct urtw_softc * sc)2119 urtw_get_macaddr(struct urtw_softc *sc)
2120 {
2121 struct ieee80211com *ic = &sc->sc_ic;
2122 uint32_t data;
2123 usb_error_t error;
2124
2125 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data);
2126 if (error != 0)
2127 goto fail;
2128 ic->ic_macaddr[0] = data & 0xff;
2129 ic->ic_macaddr[1] = (data & 0xff00) >> 8;
2130 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data);
2131 if (error != 0)
2132 goto fail;
2133 ic->ic_macaddr[2] = data & 0xff;
2134 ic->ic_macaddr[3] = (data & 0xff00) >> 8;
2135 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data);
2136 if (error != 0)
2137 goto fail;
2138 ic->ic_macaddr[4] = data & 0xff;
2139 ic->ic_macaddr[5] = (data & 0xff00) >> 8;
2140 fail:
2141 return (error);
2142 }
2143
2144 static usb_error_t
urtw_eprom_read32(struct urtw_softc * sc,uint32_t addr,uint32_t * data)2145 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data)
2146 {
2147 #define URTW_READCMD_LEN 3
2148 int addrlen, i;
2149 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 };
2150 usb_error_t error;
2151
2152 /* NB: make sure the buffer is initialized */
2153 *data = 0;
2154
2155 /* enable EPROM programming */
2156 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE);
2157 DELAY(URTW_EPROM_DELAY);
2158
2159 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE);
2160 if (error != 0)
2161 goto fail;
2162 error = urtw_eprom_ck(sc);
2163 if (error != 0)
2164 goto fail;
2165 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN);
2166 if (error != 0)
2167 goto fail;
2168 if (sc->sc_epromtype == URTW_EEPROM_93C56) {
2169 addrlen = 8;
2170 addrstr[0] = addr & (1 << 7);
2171 addrstr[1] = addr & (1 << 6);
2172 addrstr[2] = addr & (1 << 5);
2173 addrstr[3] = addr & (1 << 4);
2174 addrstr[4] = addr & (1 << 3);
2175 addrstr[5] = addr & (1 << 2);
2176 addrstr[6] = addr & (1 << 1);
2177 addrstr[7] = addr & (1 << 0);
2178 } else {
2179 addrlen=6;
2180 addrstr[0] = addr & (1 << 5);
2181 addrstr[1] = addr & (1 << 4);
2182 addrstr[2] = addr & (1 << 3);
2183 addrstr[3] = addr & (1 << 2);
2184 addrstr[4] = addr & (1 << 1);
2185 addrstr[5] = addr & (1 << 0);
2186 }
2187 error = urtw_eprom_sendbits(sc, addrstr, addrlen);
2188 if (error != 0)
2189 goto fail;
2190
2191 error = urtw_eprom_writebit(sc, 0);
2192 if (error != 0)
2193 goto fail;
2194
2195 for (i = 0; i < 16; i++) {
2196 error = urtw_eprom_ck(sc);
2197 if (error != 0)
2198 goto fail;
2199 error = urtw_eprom_readbit(sc, &data16);
2200 if (error != 0)
2201 goto fail;
2202
2203 (*data) |= (data16 << (15 - i));
2204 }
2205
2206 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE);
2207 if (error != 0)
2208 goto fail;
2209 error = urtw_eprom_ck(sc);
2210 if (error != 0)
2211 goto fail;
2212
2213 /* now disable EPROM programming */
2214 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE);
2215 fail:
2216 return (error);
2217 #undef URTW_READCMD_LEN
2218 }
2219
2220 static usb_error_t
urtw_eprom_cs(struct urtw_softc * sc,int able)2221 urtw_eprom_cs(struct urtw_softc *sc, int able)
2222 {
2223 uint8_t data;
2224 usb_error_t error;
2225
2226 urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2227 if (able == URTW_EPROM_ENABLE)
2228 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS);
2229 else
2230 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS);
2231 DELAY(URTW_EPROM_DELAY);
2232 fail:
2233 return (error);
2234 }
2235
2236 static usb_error_t
urtw_eprom_ck(struct urtw_softc * sc)2237 urtw_eprom_ck(struct urtw_softc *sc)
2238 {
2239 uint8_t data;
2240 usb_error_t error;
2241
2242 /* masking */
2243 urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2244 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK);
2245 DELAY(URTW_EPROM_DELAY);
2246 /* unmasking */
2247 urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2248 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK);
2249 DELAY(URTW_EPROM_DELAY);
2250 fail:
2251 return (error);
2252 }
2253
2254 static usb_error_t
urtw_eprom_readbit(struct urtw_softc * sc,int16_t * data)2255 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data)
2256 {
2257 uint8_t data8;
2258 usb_error_t error;
2259
2260 urtw_read8_m(sc, URTW_EPROM_CMD, &data8);
2261 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0;
2262 DELAY(URTW_EPROM_DELAY);
2263
2264 fail:
2265 return (error);
2266 }
2267
2268 static usb_error_t
urtw_eprom_writebit(struct urtw_softc * sc,int16_t bit)2269 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit)
2270 {
2271 uint8_t data;
2272 usb_error_t error;
2273
2274 urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2275 if (bit != 0)
2276 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT);
2277 else
2278 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT);
2279 DELAY(URTW_EPROM_DELAY);
2280 fail:
2281 return (error);
2282 }
2283
2284 static usb_error_t
urtw_eprom_sendbits(struct urtw_softc * sc,int16_t * buf,int buflen)2285 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen)
2286 {
2287 int i = 0;
2288 usb_error_t error = 0;
2289
2290 for (i = 0; i < buflen; i++) {
2291 error = urtw_eprom_writebit(sc, buf[i]);
2292 if (error != 0)
2293 goto fail;
2294 error = urtw_eprom_ck(sc);
2295 if (error != 0)
2296 goto fail;
2297 }
2298 fail:
2299 return (error);
2300 }
2301
2302 static usb_error_t
urtw_get_txpwr(struct urtw_softc * sc)2303 urtw_get_txpwr(struct urtw_softc *sc)
2304 {
2305 int i, j;
2306 uint32_t data;
2307 usb_error_t error;
2308
2309 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data);
2310 if (error != 0)
2311 goto fail;
2312 sc->sc_txpwr_cck_base = data & 0xf;
2313 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf;
2314
2315 for (i = 1, j = 0; i < 6; i += 2, j++) {
2316 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data);
2317 if (error != 0)
2318 goto fail;
2319 sc->sc_txpwr_cck[i] = data & 0xf;
2320 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8;
2321 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4;
2322 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12;
2323 }
2324 for (i = 1, j = 0; i < 4; i += 2, j++) {
2325 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data);
2326 if (error != 0)
2327 goto fail;
2328 sc->sc_txpwr_cck[i + 6] = data & 0xf;
2329 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8;
2330 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4;
2331 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12;
2332 }
2333 if (sc->sc_flags & URTW_RTL8187B) {
2334 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data);
2335 if (error != 0)
2336 goto fail;
2337 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf;
2338 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4;
2339 error = urtw_eprom_read32(sc, 0x0a, &data);
2340 if (error != 0)
2341 goto fail;
2342 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf;
2343 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4;
2344 error = urtw_eprom_read32(sc, 0x1c, &data);
2345 if (error != 0)
2346 goto fail;
2347 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf;
2348 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8;
2349 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4;
2350 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12;
2351 } else {
2352 for (i = 1, j = 0; i < 4; i += 2, j++) {
2353 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j,
2354 &data);
2355 if (error != 0)
2356 goto fail;
2357 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf;
2358 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8;
2359 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4;
2360 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12;
2361 }
2362 }
2363 fail:
2364 return (error);
2365 }
2366
2367 static usb_error_t
urtw_get_rfchip(struct urtw_softc * sc)2368 urtw_get_rfchip(struct urtw_softc *sc)
2369 {
2370 int ret;
2371 uint8_t data8;
2372 uint32_t data;
2373 usb_error_t error;
2374
2375 if (sc->sc_flags & URTW_RTL8187B) {
2376 urtw_read8_m(sc, 0xe1, &data8);
2377 switch (data8) {
2378 case 0:
2379 sc->sc_flags |= URTW_RTL8187B_REV_B;
2380 break;
2381 case 1:
2382 sc->sc_flags |= URTW_RTL8187B_REV_D;
2383 break;
2384 case 2:
2385 sc->sc_flags |= URTW_RTL8187B_REV_E;
2386 break;
2387 default:
2388 device_printf(sc->sc_dev, "unknown type: %#x\n", data8);
2389 sc->sc_flags |= URTW_RTL8187B_REV_B;
2390 break;
2391 }
2392 } else {
2393 urtw_read32_m(sc, URTW_TX_CONF, &data);
2394 switch (data & URTW_TX_HWMASK) {
2395 case URTW_TX_R8187vD_B:
2396 sc->sc_flags |= URTW_RTL8187B;
2397 break;
2398 case URTW_TX_R8187vD:
2399 break;
2400 default:
2401 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n",
2402 data & URTW_TX_HWMASK);
2403 break;
2404 }
2405 }
2406
2407 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data);
2408 if (error != 0)
2409 goto fail;
2410 switch (data & 0xff) {
2411 case URTW_EPROM_RFCHIPID_RTL8225U:
2412 error = urtw_8225_isv2(sc, &ret);
2413 if (error != 0)
2414 goto fail;
2415 if (ret == 0) {
2416 sc->sc_rf_init = urtw_8225_rf_init;
2417 sc->sc_rf_set_sens = urtw_8225_rf_set_sens;
2418 sc->sc_rf_set_chan = urtw_8225_rf_set_chan;
2419 sc->sc_rf_stop = urtw_8225_rf_stop;
2420 } else {
2421 sc->sc_rf_init = urtw_8225v2_rf_init;
2422 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan;
2423 sc->sc_rf_stop = urtw_8225_rf_stop;
2424 }
2425 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2426 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2427 break;
2428 case URTW_EPROM_RFCHIPID_RTL8225Z2:
2429 sc->sc_rf_init = urtw_8225v2b_rf_init;
2430 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan;
2431 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2432 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2433 sc->sc_rf_stop = urtw_8225_rf_stop;
2434 break;
2435 default:
2436 DPRINTF(sc, URTW_DEBUG_STATE,
2437 "unsupported RF chip %d\n", data & 0xff);
2438 error = USB_ERR_INVAL;
2439 goto fail;
2440 }
2441
2442 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n",
2443 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l",
2444 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" :
2445 "rtl8225z2",
2446 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" :
2447 (data8 == 1) ? "d" : "e") : "none");
2448
2449 fail:
2450 return (error);
2451 }
2452
2453 static usb_error_t
urtw_led_init(struct urtw_softc * sc)2454 urtw_led_init(struct urtw_softc *sc)
2455 {
2456 uint32_t rev;
2457 usb_error_t error;
2458
2459 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr);
2460 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev);
2461 if (error != 0)
2462 goto fail;
2463
2464 switch (rev & URTW_EPROM_CID_MASK) {
2465 case URTW_EPROM_CID_ALPHA0:
2466 sc->sc_strategy = URTW_SW_LED_MODE1;
2467 break;
2468 case URTW_EPROM_CID_SERCOMM_PS:
2469 sc->sc_strategy = URTW_SW_LED_MODE3;
2470 break;
2471 case URTW_EPROM_CID_HW_LED:
2472 sc->sc_strategy = URTW_HW_LED;
2473 break;
2474 case URTW_EPROM_CID_RSVD0:
2475 case URTW_EPROM_CID_RSVD1:
2476 default:
2477 sc->sc_strategy = URTW_SW_LED_MODE0;
2478 break;
2479 }
2480
2481 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0;
2482
2483 fail:
2484 return (error);
2485 }
2486
2487 static usb_error_t
urtw_8225_rf_init(struct urtw_softc * sc)2488 urtw_8225_rf_init(struct urtw_softc *sc)
2489 {
2490 unsigned i;
2491 uint16_t data;
2492 usb_error_t error;
2493
2494 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2495 if (error)
2496 goto fail;
2497
2498 error = urtw_8225_usb_init(sc);
2499 if (error)
2500 goto fail;
2501
2502 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2503 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */
2504 urtw_write16_m(sc, URTW_BRSR, 0xffff);
2505 urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2506
2507 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2508 if (error)
2509 goto fail;
2510 urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2511 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2512 if (error)
2513 goto fail;
2514
2515 error = urtw_8185_rf_pins_enable(sc);
2516 if (error)
2517 goto fail;
2518 urtw_pause_ms(sc, 1000);
2519
2520 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) {
2521 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg,
2522 urtw_8225_rf_part1[i].val);
2523 urtw_pause_ms(sc, 1);
2524 }
2525 urtw_pause_ms(sc, 100);
2526 urtw_8225_write(sc,
2527 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2528 urtw_pause_ms(sc, 200);
2529 urtw_8225_write(sc,
2530 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2531 urtw_pause_ms(sc, 200);
2532 urtw_8225_write(sc,
2533 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3);
2534
2535 for (i = 0; i < 95; i++) {
2536 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2537 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]);
2538 }
2539
2540 urtw_8225_write(sc,
2541 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4);
2542 urtw_8225_write(sc,
2543 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5);
2544
2545 for (i = 0; i < 128; i++) {
2546 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2547 urtw_pause_ms(sc, 1);
2548 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2549 urtw_pause_ms(sc, 1);
2550 }
2551
2552 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) {
2553 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg,
2554 urtw_8225_rf_part2[i].val);
2555 urtw_pause_ms(sc, 1);
2556 }
2557
2558 error = urtw_8225_setgain(sc, 4);
2559 if (error)
2560 goto fail;
2561
2562 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) {
2563 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg,
2564 urtw_8225_rf_part3[i].val);
2565 urtw_pause_ms(sc, 1);
2566 }
2567
2568 urtw_write8_m(sc, URTW_TESTR, 0x0d);
2569
2570 error = urtw_8225_set_txpwrlvl(sc, 1);
2571 if (error)
2572 goto fail;
2573
2574 urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2575 urtw_pause_ms(sc, 1);
2576 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2577 urtw_pause_ms(sc, 1);
2578
2579 /* TX ant A, 0x0 for B */
2580 error = urtw_8185_tx_antenna(sc, 0x3);
2581 if (error)
2582 goto fail;
2583 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2584
2585 error = urtw_8225_rf_set_chan(sc, 1);
2586 fail:
2587 return (error);
2588 }
2589
2590 static usb_error_t
urtw_8185_rf_pins_enable(struct urtw_softc * sc)2591 urtw_8185_rf_pins_enable(struct urtw_softc *sc)
2592 {
2593 usb_error_t error = 0;
2594
2595 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7);
2596 fail:
2597 return (error);
2598 }
2599
2600 static usb_error_t
urtw_8185_tx_antenna(struct urtw_softc * sc,uint8_t ant)2601 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant)
2602 {
2603 usb_error_t error;
2604
2605 urtw_write8_m(sc, URTW_TX_ANTENNA, ant);
2606 urtw_pause_ms(sc, 1);
2607 fail:
2608 return (error);
2609 }
2610
2611 static usb_error_t
urtw_8187_write_phy_ofdm_c(struct urtw_softc * sc,uint8_t addr,uint32_t data)2612 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2613 {
2614
2615 data = data & 0xff;
2616 return urtw_8187_write_phy(sc, addr, data);
2617 }
2618
2619 static usb_error_t
urtw_8187_write_phy_cck_c(struct urtw_softc * sc,uint8_t addr,uint32_t data)2620 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2621 {
2622
2623 data = data & 0xff;
2624 return urtw_8187_write_phy(sc, addr, data | 0x10000);
2625 }
2626
2627 static usb_error_t
urtw_8187_write_phy(struct urtw_softc * sc,uint8_t addr,uint32_t data)2628 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2629 {
2630 uint32_t phyw;
2631 usb_error_t error;
2632
2633 phyw = ((data << 8) | (addr | 0x80));
2634 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24));
2635 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16));
2636 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8));
2637 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff)));
2638 urtw_pause_ms(sc, 1);
2639 fail:
2640 return (error);
2641 }
2642
2643 static usb_error_t
urtw_8225_setgain(struct urtw_softc * sc,int16_t gain)2644 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain)
2645 {
2646 usb_error_t error;
2647
2648 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]);
2649 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]);
2650 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]);
2651 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]);
2652 fail:
2653 return (error);
2654 }
2655
2656 static usb_error_t
urtw_8225_usb_init(struct urtw_softc * sc)2657 urtw_8225_usb_init(struct urtw_softc *sc)
2658 {
2659 uint8_t data;
2660 usb_error_t error;
2661
2662 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0);
2663 urtw_write8_m(sc, URTW_GPIO, 0);
2664 error = urtw_read8e(sc, 0x53, &data);
2665 if (error)
2666 goto fail;
2667 error = urtw_write8e(sc, 0x53, data | (1 << 7));
2668 if (error)
2669 goto fail;
2670 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4);
2671 urtw_write8_m(sc, URTW_GPIO, 0x20);
2672 urtw_write8_m(sc, URTW_GP_ENABLE, 0);
2673
2674 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80);
2675 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80);
2676 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80);
2677
2678 urtw_pause_ms(sc, 500);
2679 fail:
2680 return (error);
2681 }
2682
2683 static usb_error_t
urtw_8225_write_c(struct urtw_softc * sc,uint8_t addr,uint16_t data)2684 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data)
2685 {
2686 uint16_t d80, d82, d84;
2687 usb_error_t error;
2688
2689 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80);
2690 d80 &= URTW_RF_PINS_MAGIC1;
2691 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82);
2692 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84);
2693 d84 &= URTW_RF_PINS_MAGIC2;
2694 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3);
2695 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3);
2696 DELAY(10);
2697
2698 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2699 DELAY(2);
2700 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80);
2701 DELAY(10);
2702
2703 error = urtw_8225_write_s16(sc, addr, 0x8225, &data);
2704 if (error != 0)
2705 goto fail;
2706
2707 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2708 DELAY(10);
2709 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2710 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84);
2711 urtw_pause_ms(sc, 2);
2712 fail:
2713 return (error);
2714 }
2715
2716 static usb_error_t
urtw_8225_write_s16(struct urtw_softc * sc,uint8_t addr,int index,uint16_t * data)2717 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index,
2718 uint16_t *data)
2719 {
2720 uint8_t buf[2];
2721 uint16_t data16;
2722 struct usb_device_request req;
2723 usb_error_t error = 0;
2724
2725 data16 = *data;
2726
2727 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2728 req.bRequest = URTW_8187_SETREGS_REQ;
2729 USETW(req.wValue, addr);
2730 USETW(req.wIndex, index);
2731 USETW(req.wLength, sizeof(uint16_t));
2732 buf[0] = (data16 & 0x00ff);
2733 buf[1] = (data16 & 0xff00) >> 8;
2734
2735 error = urtw_do_request(sc, &req, buf);
2736
2737 return (error);
2738 }
2739
2740 static usb_error_t
urtw_8225_rf_set_chan(struct urtw_softc * sc,int chan)2741 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan)
2742 {
2743 usb_error_t error;
2744
2745 error = urtw_8225_set_txpwrlvl(sc, chan);
2746 if (error)
2747 goto fail;
2748 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
2749 urtw_pause_ms(sc, 10);
2750 fail:
2751 return (error);
2752 }
2753
2754 static usb_error_t
urtw_8225_rf_set_sens(struct urtw_softc * sc,int sens)2755 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens)
2756 {
2757 usb_error_t error;
2758
2759 if (sens < 0 || sens > 6)
2760 return -1;
2761
2762 if (sens > 4)
2763 urtw_8225_write(sc,
2764 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1);
2765 else
2766 urtw_8225_write(sc,
2767 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2);
2768
2769 sens = 6 - sens;
2770 error = urtw_8225_setgain(sc, sens);
2771 if (error)
2772 goto fail;
2773
2774 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]);
2775
2776 fail:
2777 return (error);
2778 }
2779
2780 static usb_error_t
urtw_8225_set_txpwrlvl(struct urtw_softc * sc,int chan)2781 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan)
2782 {
2783 int i, idx, set;
2784 uint8_t *cck_pwltable;
2785 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max;
2786 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
2787 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
2788 usb_error_t error;
2789
2790 cck_pwrlvl_max = 11;
2791 ofdm_pwrlvl_max = 25; /* 12 -> 25 */
2792 ofdm_pwrlvl_min = 10;
2793
2794 /* CCK power setting */
2795 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
2796 idx = cck_pwrlvl % 6;
2797 set = cck_pwrlvl / 6;
2798 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 :
2799 urtw_8225_txpwr_cck;
2800
2801 urtw_write8_m(sc, URTW_TX_GAIN_CCK,
2802 urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2803 for (i = 0; i < 8; i++) {
2804 urtw_8187_write_phy_cck(sc, 0x44 + i,
2805 cck_pwltable[idx * 8 + i]);
2806 }
2807 urtw_pause_ms(sc, 1);
2808
2809 /* OFDM power setting */
2810 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
2811 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
2812 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
2813
2814 idx = ofdm_pwrlvl % 6;
2815 set = ofdm_pwrlvl / 6;
2816
2817 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
2818 if (error)
2819 goto fail;
2820 urtw_8187_write_phy_ofdm(sc, 2, 0x42);
2821 urtw_8187_write_phy_ofdm(sc, 6, 0);
2822 urtw_8187_write_phy_ofdm(sc, 8, 0);
2823
2824 urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
2825 urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2826 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]);
2827 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]);
2828 urtw_pause_ms(sc, 1);
2829 fail:
2830 return (error);
2831 }
2832
2833 static usb_error_t
urtw_8225_rf_stop(struct urtw_softc * sc)2834 urtw_8225_rf_stop(struct urtw_softc *sc)
2835 {
2836 uint8_t data;
2837 usb_error_t error;
2838
2839 urtw_8225_write(sc, 0x4, 0x1f);
2840
2841 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2842 if (error)
2843 goto fail;
2844
2845 urtw_read8_m(sc, URTW_CONFIG3, &data);
2846 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
2847 if (sc->sc_flags & URTW_RTL8187B) {
2848 urtw_write32_m(sc, URTW_ANAPARAM2,
2849 URTW_8187B_8225_ANAPARAM2_OFF);
2850 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF);
2851 urtw_write32_m(sc, URTW_ANAPARAM3,
2852 URTW_8187B_8225_ANAPARAM3_OFF);
2853 } else {
2854 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF);
2855 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF);
2856 }
2857
2858 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
2859 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2860 if (error)
2861 goto fail;
2862
2863 fail:
2864 return (error);
2865 }
2866
2867 static usb_error_t
urtw_8225v2_rf_init(struct urtw_softc * sc)2868 urtw_8225v2_rf_init(struct urtw_softc *sc)
2869 {
2870 unsigned i;
2871 uint16_t data;
2872 uint32_t data32;
2873 usb_error_t error;
2874
2875 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2876 if (error)
2877 goto fail;
2878
2879 error = urtw_8225_usb_init(sc);
2880 if (error)
2881 goto fail;
2882
2883 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2884 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */
2885 urtw_write16_m(sc, URTW_BRSR, 0xffff);
2886 urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2887
2888 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2889 if (error)
2890 goto fail;
2891 urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2892 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2893 if (error)
2894 goto fail;
2895
2896 error = urtw_8185_rf_pins_enable(sc);
2897 if (error)
2898 goto fail;
2899
2900 urtw_pause_ms(sc, 500);
2901
2902 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) {
2903 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg,
2904 urtw_8225v2_rf_part1[i].val);
2905 }
2906 urtw_pause_ms(sc, 50);
2907
2908 urtw_8225_write(sc,
2909 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1);
2910
2911 for (i = 0; i < 95; i++) {
2912 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2913 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
2914 urtw_8225v2_rxgain[i]);
2915 }
2916
2917 urtw_8225_write(sc,
2918 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1);
2919 urtw_8225_write(sc,
2920 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1);
2921 urtw_8225_write(sc,
2922 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2);
2923 urtw_8225_write(sc,
2924 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2925 urtw_pause_ms(sc, 100);
2926 urtw_8225_write(sc,
2927 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2928 urtw_pause_ms(sc, 100);
2929
2930 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2931 if (error != 0)
2932 goto fail;
2933 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1)
2934 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32);
2935 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) {
2936 urtw_8225_write(sc,
2937 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2938 urtw_pause_ms(sc, 100);
2939 urtw_8225_write(sc,
2940 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2941 urtw_pause_ms(sc, 50);
2942 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2943 if (error != 0)
2944 goto fail;
2945 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2))
2946 device_printf(sc->sc_dev, "RF calibration failed\n");
2947 }
2948 urtw_pause_ms(sc, 100);
2949
2950 urtw_8225_write(sc,
2951 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6);
2952 for (i = 0; i < 128; i++) {
2953 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2954 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2955 }
2956
2957 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) {
2958 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg,
2959 urtw_8225v2_rf_part2[i].val);
2960 }
2961
2962 error = urtw_8225v2_setgain(sc, 4);
2963 if (error)
2964 goto fail;
2965
2966 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) {
2967 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg,
2968 urtw_8225v2_rf_part3[i].val);
2969 }
2970
2971 urtw_write8_m(sc, URTW_TESTR, 0x0d);
2972
2973 error = urtw_8225v2_set_txpwrlvl(sc, 1);
2974 if (error)
2975 goto fail;
2976
2977 urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2978 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2979
2980 /* TX ant A, 0x0 for B */
2981 error = urtw_8185_tx_antenna(sc, 0x3);
2982 if (error)
2983 goto fail;
2984 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2985
2986 error = urtw_8225_rf_set_chan(sc, 1);
2987 fail:
2988 return (error);
2989 }
2990
2991 static usb_error_t
urtw_8225v2_rf_set_chan(struct urtw_softc * sc,int chan)2992 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan)
2993 {
2994 usb_error_t error;
2995
2996 error = urtw_8225v2_set_txpwrlvl(sc, chan);
2997 if (error)
2998 goto fail;
2999
3000 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3001 urtw_pause_ms(sc, 10);
3002 fail:
3003 return (error);
3004 }
3005
3006 static usb_error_t
urtw_8225_read(struct urtw_softc * sc,uint8_t addr,uint32_t * data)3007 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data)
3008 {
3009 int i;
3010 int16_t bit;
3011 uint8_t rlen = 12, wlen = 6;
3012 uint16_t o1, o2, o3, tmp;
3013 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27;
3014 uint32_t mask = 0x80000000, value = 0;
3015 usb_error_t error;
3016
3017 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1);
3018 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2);
3019 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3);
3020 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4);
3021 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4);
3022 o1 &= ~URTW_RF_PINS_MAGIC4;
3023 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN);
3024 DELAY(5);
3025 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1);
3026 DELAY(5);
3027
3028 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) {
3029 bit = ((d2w & mask) != 0) ? 1 : 0;
3030
3031 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3032 DELAY(2);
3033 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3034 URTW_BB_HOST_BANG_CLK);
3035 DELAY(2);
3036 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3037 URTW_BB_HOST_BANG_CLK);
3038 DELAY(2);
3039 mask = mask >> 1;
3040 if (i == 2)
3041 break;
3042 bit = ((d2w & mask) != 0) ? 1 : 0;
3043 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3044 URTW_BB_HOST_BANG_CLK);
3045 DELAY(2);
3046 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3047 URTW_BB_HOST_BANG_CLK);
3048 DELAY(2);
3049 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3050 DELAY(1);
3051 }
3052 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW |
3053 URTW_BB_HOST_BANG_CLK);
3054 DELAY(2);
3055 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW);
3056 DELAY(2);
3057 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW);
3058 DELAY(2);
3059
3060 mask = 0x800;
3061 for (i = 0; i < rlen; i++, mask = mask >> 1) {
3062 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3063 o1 | URTW_BB_HOST_BANG_RW);
3064 DELAY(2);
3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3066 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3067 DELAY(2);
3068 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3069 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3070 DELAY(2);
3071 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3072 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3073 DELAY(2);
3074
3075 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp);
3076 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0);
3077 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3078 o1 | URTW_BB_HOST_BANG_RW);
3079 DELAY(2);
3080 }
3081
3082 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN |
3083 URTW_BB_HOST_BANG_RW);
3084 DELAY(2);
3085
3086 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2);
3087 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3);
3088 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1);
3089
3090 if (data != NULL)
3091 *data = value;
3092 fail:
3093 return (error);
3094 }
3095
3096 static usb_error_t
urtw_8225v2_set_txpwrlvl(struct urtw_softc * sc,int chan)3097 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan)
3098 {
3099 int i;
3100 uint8_t *cck_pwrtable;
3101 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10;
3102 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3103 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3104 usb_error_t error;
3105
3106 /* CCK power setting */
3107 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
3108 cck_pwrlvl += sc->sc_txpwr_cck_base;
3109 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3110 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 :
3111 urtw_8225v2_txpwr_cck;
3112
3113 for (i = 0; i < 8; i++)
3114 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3115
3116 urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3117 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]);
3118 urtw_pause_ms(sc, 1);
3119
3120 /* OFDM power setting */
3121 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
3122 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
3123 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3124 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3125
3126 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3127 if (error)
3128 goto fail;
3129
3130 urtw_8187_write_phy_ofdm(sc, 2, 0x42);
3131 urtw_8187_write_phy_ofdm(sc, 5, 0x0);
3132 urtw_8187_write_phy_ofdm(sc, 6, 0x40);
3133 urtw_8187_write_phy_ofdm(sc, 7, 0x0);
3134 urtw_8187_write_phy_ofdm(sc, 8, 0x40);
3135
3136 urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3137 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]);
3138 urtw_pause_ms(sc, 1);
3139 fail:
3140 return (error);
3141 }
3142
3143 static usb_error_t
urtw_8225v2_setgain(struct urtw_softc * sc,int16_t gain)3144 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain)
3145 {
3146 uint8_t *gainp;
3147 usb_error_t error;
3148
3149 /* XXX for A? */
3150 gainp = urtw_8225v2_gain_bg;
3151 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]);
3152 urtw_pause_ms(sc, 1);
3153 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]);
3154 urtw_pause_ms(sc, 1);
3155 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]);
3156 urtw_pause_ms(sc, 1);
3157 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17);
3158 urtw_pause_ms(sc, 1);
3159 fail:
3160 return (error);
3161 }
3162
3163 static usb_error_t
urtw_8225_isv2(struct urtw_softc * sc,int * ret)3164 urtw_8225_isv2(struct urtw_softc *sc, int *ret)
3165 {
3166 uint32_t data;
3167 usb_error_t error;
3168
3169 *ret = 1;
3170
3171 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5);
3172 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5);
3173 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5);
3174 urtw_pause_ms(sc, 500);
3175
3176 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3177 URTW_8225_ADDR_0_DATA_MAGIC1);
3178
3179 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data);
3180 if (error != 0)
3181 goto fail;
3182 if (data != URTW_8225_ADDR_8_DATA_MAGIC1)
3183 *ret = 0;
3184 else {
3185 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data);
3186 if (error != 0)
3187 goto fail;
3188 if (data != URTW_8225_ADDR_9_DATA_MAGIC1)
3189 *ret = 0;
3190 }
3191
3192 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3193 URTW_8225_ADDR_0_DATA_MAGIC2);
3194 fail:
3195 return (error);
3196 }
3197
3198 static usb_error_t
urtw_8225v2b_rf_init(struct urtw_softc * sc)3199 urtw_8225v2b_rf_init(struct urtw_softc *sc)
3200 {
3201 struct ieee80211com *ic = &sc->sc_ic;
3202 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3203 const uint8_t *macaddr;
3204 unsigned i;
3205 uint8_t data8;
3206 usb_error_t error;
3207
3208 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3209 if (error)
3210 goto fail;
3211
3212 /*
3213 * initialize extra registers on 8187
3214 */
3215 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff);
3216
3217 /* retry limit */
3218 urtw_read8_m(sc, URTW_CW_CONF, &data8);
3219 data8 |= URTW_CW_CONF_PERPACKET_RETRY;
3220 urtw_write8_m(sc, URTW_CW_CONF, data8);
3221
3222 /* TX AGC */
3223 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3224 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN;
3225 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3226
3227 /* Auto Rate Fallback Control */
3228 #define URTW_ARFR 0x1e0
3229 urtw_write16_m(sc, URTW_ARFR, 0xfff);
3230 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8);
3231 urtw_write8_m(sc, URTW_RATE_FALLBACK,
3232 data8 | URTW_RATE_FALLBACK_ENABLE);
3233
3234 urtw_read8_m(sc, URTW_MSR, &data8);
3235 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3);
3236 urtw_read8_m(sc, URTW_MSR, &data8);
3237 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA);
3238 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl);
3239
3240 urtw_write16_m(sc, URTW_ATIM_WND, 2);
3241 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
3242 #define URTW_FEMR_FOR_8187B 0x1d4
3243 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff);
3244
3245 /* led type */
3246 urtw_read8_m(sc, URTW_CONFIG1, &data8);
3247 data8 = (data8 & 0x3f) | 0x80;
3248 urtw_write8_m(sc, URTW_CONFIG1, data8);
3249
3250 /* applying MAC address again. */
3251 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
3252 error = urtw_set_macaddr(sc, macaddr);
3253 if (error)
3254 goto fail;
3255
3256 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3257 if (error)
3258 goto fail;
3259
3260 urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
3261
3262 /*
3263 * MAC configuration
3264 */
3265 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++)
3266 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg,
3267 urtw_8225v2b_rf_part1[i].val);
3268 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50);
3269 urtw_write16_m(sc, URTW_INT_MIG, 0x0000);
3270 urtw_write32_m(sc, 0x1f0, 0);
3271 urtw_write32_m(sc, 0x1f4, 0);
3272 urtw_write8_m(sc, 0x1f8, 0);
3273 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001);
3274
3275 #define URTW_RFSW_CTRL 0x272
3276 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a);
3277
3278 /*
3279 * initialize PHY
3280 */
3281 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3282 if (error)
3283 goto fail;
3284 urtw_read8_m(sc, URTW_CONFIG3, &data8);
3285 urtw_write8_m(sc, URTW_CONFIG3,
3286 data8 | URTW_CONFIG3_ANAPARAM_WRITE);
3287
3288 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3289 if (error)
3290 goto fail;
3291
3292 /* setup RFE initial timing */
3293 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480);
3294 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488);
3295 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff);
3296 urtw_pause_ms(sc, 1100);
3297
3298 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) {
3299 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg,
3300 urtw_8225v2b_rf_part0[i].val);
3301 urtw_pause_ms(sc, 1);
3302 }
3303 urtw_8225_write(sc, 0x00, 0x01b7);
3304
3305 for (i = 0; i < 95; i++) {
3306 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
3307 urtw_pause_ms(sc, 1);
3308 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
3309 urtw_8225v2b_rxgain[i]);
3310 urtw_pause_ms(sc, 1);
3311 }
3312
3313 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080);
3314 urtw_pause_ms(sc, 1);
3315 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004);
3316 urtw_pause_ms(sc, 1);
3317 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7);
3318 urtw_pause_ms(sc, 1);
3319 urtw_pause_ms(sc, 3000);
3320 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d);
3321 urtw_pause_ms(sc, 2000);
3322 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d);
3323 urtw_pause_ms(sc, 1);
3324 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf);
3325 urtw_pause_ms(sc, 1);
3326
3327 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03);
3328 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07);
3329 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03);
3330
3331 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12);
3332 for (i = 0; i < 128; i++) {
3333 uint32_t addr, data;
3334
3335 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f;
3336 addr = ((i + 0x80) << 8) | 0x0000008e;
3337
3338 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff);
3339 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff);
3340 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00);
3341 }
3342 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10);
3343
3344 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++)
3345 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val);
3346
3347 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c);
3348 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c);
3349 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c);
3350 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c);
3351
3352 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46);
3353 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6);
3354 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc);
3355 urtw_8187_write_phy_cck(sc, 0xc1, 0x88);
3356
3357 fail:
3358 return (error);
3359 }
3360
3361 static usb_error_t
urtw_8225v2b_rf_set_chan(struct urtw_softc * sc,int chan)3362 urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan)
3363 {
3364 usb_error_t error;
3365
3366 error = urtw_8225v2b_set_txpwrlvl(sc, chan);
3367 if (error)
3368 goto fail;
3369
3370 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3371 urtw_pause_ms(sc, 10);
3372 fail:
3373 return (error);
3374 }
3375
3376 static usb_error_t
urtw_8225v2b_set_txpwrlvl(struct urtw_softc * sc,int chan)3377 urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan)
3378 {
3379 int i;
3380 uint8_t *cck_pwrtable;
3381 uint8_t cck_pwrlvl_max = 15;
3382 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3383 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3384 usb_error_t error;
3385
3386 /* CCK power setting */
3387 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ?
3388 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) :
3389 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7));
3390 cck_pwrlvl += sc->sc_txpwr_cck_base;
3391 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3392 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 :
3393 urtw_8225v2b_txpwr_cck;
3394
3395 if (sc->sc_flags & URTW_RTL8187B_REV_B)
3396 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 :
3397 ((cck_pwrlvl <= 11) ? 8 : 16);
3398 else
3399 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 :
3400 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24));
3401
3402 for (i = 0; i < 8; i++)
3403 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3404
3405 urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3406 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1);
3407 urtw_pause_ms(sc, 1);
3408
3409 /* OFDM power setting */
3410 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ?
3411 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) :
3412 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10));
3413 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3414 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3415
3416 urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3417 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1);
3418
3419 if (sc->sc_flags & URTW_RTL8187B_REV_B) {
3420 if (ofdm_pwrlvl <= 11) {
3421 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60);
3422 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60);
3423 } else {
3424 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3425 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3426 }
3427 } else {
3428 if (ofdm_pwrlvl <= 11) {
3429 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3430 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3431 } else if (ofdm_pwrlvl <= 17) {
3432 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54);
3433 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54);
3434 } else {
3435 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50);
3436 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50);
3437 }
3438 }
3439 urtw_pause_ms(sc, 1);
3440 fail:
3441 return (error);
3442 }
3443
3444 static usb_error_t
urtw_read8e(struct urtw_softc * sc,int val,uint8_t * data)3445 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)
3446 {
3447 struct usb_device_request req;
3448 usb_error_t error;
3449
3450 req.bmRequestType = UT_READ_VENDOR_DEVICE;
3451 req.bRequest = URTW_8187_GETREGS_REQ;
3452 USETW(req.wValue, val | 0xfe00);
3453 USETW(req.wIndex, 0);
3454 USETW(req.wLength, sizeof(uint8_t));
3455
3456 error = urtw_do_request(sc, &req, data);
3457 return (error);
3458 }
3459
3460 static usb_error_t
urtw_write8e(struct urtw_softc * sc,int val,uint8_t data)3461 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)
3462 {
3463 struct usb_device_request req;
3464
3465 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
3466 req.bRequest = URTW_8187_SETREGS_REQ;
3467 USETW(req.wValue, val | 0xfe00);
3468 USETW(req.wIndex, 0);
3469 USETW(req.wLength, sizeof(uint8_t));
3470
3471 return (urtw_do_request(sc, &req, &data));
3472 }
3473
3474 static usb_error_t
urtw_8180_set_anaparam(struct urtw_softc * sc,uint32_t val)3475 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)
3476 {
3477 uint8_t data;
3478 usb_error_t error;
3479
3480 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3481 if (error)
3482 goto fail;
3483
3484 urtw_read8_m(sc, URTW_CONFIG3, &data);
3485 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3486 urtw_write32_m(sc, URTW_ANAPARAM, val);
3487 urtw_read8_m(sc, URTW_CONFIG3, &data);
3488 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3489
3490 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3491 if (error)
3492 goto fail;
3493 fail:
3494 return (error);
3495 }
3496
3497 static usb_error_t
urtw_8185_set_anaparam2(struct urtw_softc * sc,uint32_t val)3498 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)
3499 {
3500 uint8_t data;
3501 usb_error_t error;
3502
3503 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3504 if (error)
3505 goto fail;
3506
3507 urtw_read8_m(sc, URTW_CONFIG3, &data);
3508 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3509 urtw_write32_m(sc, URTW_ANAPARAM2, val);
3510 urtw_read8_m(sc, URTW_CONFIG3, &data);
3511 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3512
3513 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3514 if (error)
3515 goto fail;
3516 fail:
3517 return (error);
3518 }
3519
3520 static usb_error_t
urtw_intr_enable(struct urtw_softc * sc)3521 urtw_intr_enable(struct urtw_softc *sc)
3522 {
3523 usb_error_t error;
3524
3525 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff);
3526 fail:
3527 return (error);
3528 }
3529
3530 static usb_error_t
urtw_intr_disable(struct urtw_softc * sc)3531 urtw_intr_disable(struct urtw_softc *sc)
3532 {
3533 usb_error_t error;
3534
3535 urtw_write16_m(sc, URTW_INTR_MASK, 0);
3536 fail:
3537 return (error);
3538 }
3539
3540 static usb_error_t
urtw_reset(struct urtw_softc * sc)3541 urtw_reset(struct urtw_softc *sc)
3542 {
3543 uint8_t data;
3544 usb_error_t error;
3545
3546 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3547 if (error)
3548 goto fail;
3549 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3550 if (error)
3551 goto fail;
3552
3553 error = urtw_intr_disable(sc);
3554 if (error)
3555 goto fail;
3556 urtw_pause_ms(sc, 100);
3557
3558 error = urtw_write8e(sc, 0x18, 0x10);
3559 if (error != 0)
3560 goto fail;
3561 error = urtw_write8e(sc, 0x18, 0x11);
3562 if (error != 0)
3563 goto fail;
3564 error = urtw_write8e(sc, 0x18, 0x00);
3565 if (error != 0)
3566 goto fail;
3567 urtw_pause_ms(sc, 100);
3568
3569 urtw_read8_m(sc, URTW_CMD, &data);
3570 data = (data & 0x2) | URTW_CMD_RST;
3571 urtw_write8_m(sc, URTW_CMD, data);
3572 urtw_pause_ms(sc, 100);
3573
3574 urtw_read8_m(sc, URTW_CMD, &data);
3575 if (data & URTW_CMD_RST) {
3576 device_printf(sc->sc_dev, "reset timeout\n");
3577 goto fail;
3578 }
3579
3580 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD);
3581 if (error)
3582 goto fail;
3583 urtw_pause_ms(sc, 100);
3584
3585 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3586 if (error)
3587 goto fail;
3588 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3589 if (error)
3590 goto fail;
3591 fail:
3592 return (error);
3593 }
3594
3595 static usb_error_t
urtw_led_ctl(struct urtw_softc * sc,int mode)3596 urtw_led_ctl(struct urtw_softc *sc, int mode)
3597 {
3598 usb_error_t error = 0;
3599
3600 switch (sc->sc_strategy) {
3601 case URTW_SW_LED_MODE0:
3602 error = urtw_led_mode0(sc, mode);
3603 break;
3604 case URTW_SW_LED_MODE1:
3605 error = urtw_led_mode1(sc, mode);
3606 break;
3607 case URTW_SW_LED_MODE2:
3608 error = urtw_led_mode2(sc, mode);
3609 break;
3610 case URTW_SW_LED_MODE3:
3611 error = urtw_led_mode3(sc, mode);
3612 break;
3613 default:
3614 DPRINTF(sc, URTW_DEBUG_STATE,
3615 "unsupported LED mode %d\n", sc->sc_strategy);
3616 error = USB_ERR_INVAL;
3617 break;
3618 }
3619
3620 return (error);
3621 }
3622
3623 static usb_error_t
urtw_led_mode0(struct urtw_softc * sc,int mode)3624 urtw_led_mode0(struct urtw_softc *sc, int mode)
3625 {
3626
3627 switch (mode) {
3628 case URTW_LED_CTL_POWER_ON:
3629 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK;
3630 break;
3631 case URTW_LED_CTL_TX:
3632 if (sc->sc_gpio_ledinprogress == 1)
3633 return (0);
3634
3635 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL;
3636 sc->sc_gpio_blinktime = 2;
3637 break;
3638 case URTW_LED_CTL_LINK:
3639 sc->sc_gpio_ledstate = URTW_LED_ON;
3640 break;
3641 default:
3642 DPRINTF(sc, URTW_DEBUG_STATE,
3643 "unsupported LED mode 0x%x", mode);
3644 return (USB_ERR_INVAL);
3645 }
3646
3647 switch (sc->sc_gpio_ledstate) {
3648 case URTW_LED_ON:
3649 if (sc->sc_gpio_ledinprogress != 0)
3650 break;
3651 urtw_led_on(sc, URTW_LED_GPIO);
3652 break;
3653 case URTW_LED_BLINK_NORMAL:
3654 if (sc->sc_gpio_ledinprogress != 0)
3655 break;
3656 sc->sc_gpio_ledinprogress = 1;
3657 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ?
3658 URTW_LED_OFF : URTW_LED_ON;
3659 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3660 break;
3661 case URTW_LED_POWER_ON_BLINK:
3662 urtw_led_on(sc, URTW_LED_GPIO);
3663 urtw_pause_ms(sc, 100);
3664 urtw_led_off(sc, URTW_LED_GPIO);
3665 break;
3666 default:
3667 DPRINTF(sc, URTW_DEBUG_STATE,
3668 "unknown LED status 0x%x", sc->sc_gpio_ledstate);
3669 return (USB_ERR_INVAL);
3670 }
3671 return (0);
3672 }
3673
3674 static usb_error_t
urtw_led_mode1(struct urtw_softc * sc,int mode)3675 urtw_led_mode1(struct urtw_softc *sc, int mode)
3676 {
3677 return (USB_ERR_INVAL);
3678 }
3679
3680 static usb_error_t
urtw_led_mode2(struct urtw_softc * sc,int mode)3681 urtw_led_mode2(struct urtw_softc *sc, int mode)
3682 {
3683 return (USB_ERR_INVAL);
3684 }
3685
3686 static usb_error_t
urtw_led_mode3(struct urtw_softc * sc,int mode)3687 urtw_led_mode3(struct urtw_softc *sc, int mode)
3688 {
3689 return (USB_ERR_INVAL);
3690 }
3691
3692 static usb_error_t
urtw_led_on(struct urtw_softc * sc,int type)3693 urtw_led_on(struct urtw_softc *sc, int type)
3694 {
3695 usb_error_t error;
3696
3697 if (type == URTW_LED_GPIO) {
3698 switch (sc->sc_gpio_ledpin) {
3699 case URTW_LED_PIN_GPIO0:
3700 urtw_write8_m(sc, URTW_GPIO, 0x01);
3701 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00);
3702 break;
3703 default:
3704 DPRINTF(sc, URTW_DEBUG_STATE,
3705 "unsupported LED PIN type 0x%x",
3706 sc->sc_gpio_ledpin);
3707 error = USB_ERR_INVAL;
3708 goto fail;
3709 }
3710 } else {
3711 DPRINTF(sc, URTW_DEBUG_STATE,
3712 "unsupported LED type 0x%x", type);
3713 error = USB_ERR_INVAL;
3714 goto fail;
3715 }
3716
3717 sc->sc_gpio_ledon = 1;
3718 fail:
3719 return (error);
3720 }
3721
3722 static usb_error_t
urtw_led_off(struct urtw_softc * sc,int type)3723 urtw_led_off(struct urtw_softc *sc, int type)
3724 {
3725 usb_error_t error;
3726
3727 if (type == URTW_LED_GPIO) {
3728 switch (sc->sc_gpio_ledpin) {
3729 case URTW_LED_PIN_GPIO0:
3730 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1);
3731 urtw_write8_m(sc,
3732 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1);
3733 break;
3734 default:
3735 DPRINTF(sc, URTW_DEBUG_STATE,
3736 "unsupported LED PIN type 0x%x",
3737 sc->sc_gpio_ledpin);
3738 error = USB_ERR_INVAL;
3739 goto fail;
3740 }
3741 } else {
3742 DPRINTF(sc, URTW_DEBUG_STATE,
3743 "unsupported LED type 0x%x", type);
3744 error = USB_ERR_INVAL;
3745 goto fail;
3746 }
3747
3748 sc->sc_gpio_ledon = 0;
3749
3750 fail:
3751 return (error);
3752 }
3753
3754 static void
urtw_led_ch(void * arg)3755 urtw_led_ch(void *arg)
3756 {
3757 struct urtw_softc *sc = arg;
3758 struct ieee80211com *ic = &sc->sc_ic;
3759
3760 ieee80211_runtask(ic, &sc->sc_led_task);
3761 }
3762
3763 static void
urtw_ledtask(void * arg,int pending)3764 urtw_ledtask(void *arg, int pending)
3765 {
3766 struct urtw_softc *sc = arg;
3767
3768 if (sc->sc_strategy != URTW_SW_LED_MODE0) {
3769 DPRINTF(sc, URTW_DEBUG_STATE,
3770 "could not process a LED strategy 0x%x",
3771 sc->sc_strategy);
3772 return;
3773 }
3774
3775 URTW_LOCK(sc);
3776 urtw_led_blink(sc);
3777 URTW_UNLOCK(sc);
3778 }
3779
3780 static usb_error_t
urtw_led_blink(struct urtw_softc * sc)3781 urtw_led_blink(struct urtw_softc *sc)
3782 {
3783 uint8_t ing = 0;
3784
3785 if (sc->sc_gpio_blinkstate == URTW_LED_ON)
3786 urtw_led_on(sc, URTW_LED_GPIO);
3787 else
3788 urtw_led_off(sc, URTW_LED_GPIO);
3789 sc->sc_gpio_blinktime--;
3790 if (sc->sc_gpio_blinktime == 0)
3791 ing = 1;
3792 else {
3793 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL &&
3794 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY &&
3795 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3)
3796 ing = 1;
3797 }
3798 if (ing == 1) {
3799 if (sc->sc_gpio_ledstate == URTW_LED_ON &&
3800 sc->sc_gpio_ledon == 0)
3801 urtw_led_on(sc, URTW_LED_GPIO);
3802 else if (sc->sc_gpio_ledstate == URTW_LED_OFF &&
3803 sc->sc_gpio_ledon == 1)
3804 urtw_led_off(sc, URTW_LED_GPIO);
3805
3806 sc->sc_gpio_blinktime = 0;
3807 sc->sc_gpio_ledinprogress = 0;
3808 return (0);
3809 }
3810
3811 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ?
3812 URTW_LED_ON : URTW_LED_OFF;
3813
3814 switch (sc->sc_gpio_ledstate) {
3815 case URTW_LED_BLINK_NORMAL:
3816 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3817 break;
3818 default:
3819 DPRINTF(sc, URTW_DEBUG_STATE,
3820 "unknown LED status 0x%x",
3821 sc->sc_gpio_ledstate);
3822 return (USB_ERR_INVAL);
3823 }
3824 return (0);
3825 }
3826
3827 static usb_error_t
urtw_rx_enable(struct urtw_softc * sc)3828 urtw_rx_enable(struct urtw_softc *sc)
3829 {
3830 uint8_t data;
3831 usb_error_t error;
3832
3833 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ?
3834 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]);
3835
3836 error = urtw_rx_setconf(sc);
3837 if (error != 0)
3838 goto fail;
3839
3840 if ((sc->sc_flags & URTW_RTL8187B) == 0) {
3841 urtw_read8_m(sc, URTW_CMD, &data);
3842 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE);
3843 }
3844 fail:
3845 return (error);
3846 }
3847
3848 static usb_error_t
urtw_tx_enable(struct urtw_softc * sc)3849 urtw_tx_enable(struct urtw_softc *sc)
3850 {
3851 uint8_t data8;
3852 uint32_t data;
3853 usb_error_t error;
3854
3855 if (sc->sc_flags & URTW_RTL8187B) {
3856 urtw_read32_m(sc, URTW_TX_CONF, &data);
3857 data &= ~URTW_TX_LOOPBACK_MASK;
3858 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3859 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3860 data &= ~URTW_TX_SWPLCPLEN;
3861 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE |
3862 (7 << 8) | /* short retry limit */
3863 (7 << 0) | /* long retry limit */
3864 (7 << 21); /* MAX TX DMA */
3865 urtw_write32_m(sc, URTW_TX_CONF, data);
3866
3867 urtw_read8_m(sc, URTW_MSR, &data8);
3868 data8 |= URTW_MSR_LINK_ENEDCA;
3869 urtw_write8_m(sc, URTW_MSR, data8);
3870 return (error);
3871 }
3872
3873 urtw_read8_m(sc, URTW_CW_CONF, &data8);
3874 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY);
3875 urtw_write8_m(sc, URTW_CW_CONF, data8);
3876
3877 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3878 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN;
3879 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL;
3880 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT;
3881 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3882
3883 urtw_read32_m(sc, URTW_TX_CONF, &data);
3884 data &= ~URTW_TX_LOOPBACK_MASK;
3885 data |= URTW_TX_LOOPBACK_NONE;
3886 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3887 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT;
3888 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT;
3889 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3890 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW;
3891 data &= ~URTW_TX_SWPLCPLEN;
3892 data |= URTW_TX_NOICV;
3893 urtw_write32_m(sc, URTW_TX_CONF, data);
3894
3895 urtw_read8_m(sc, URTW_CMD, &data8);
3896 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE);
3897 fail:
3898 return (error);
3899 }
3900
3901 static usb_error_t
urtw_rx_setconf(struct urtw_softc * sc)3902 urtw_rx_setconf(struct urtw_softc *sc)
3903 {
3904 struct ieee80211com *ic = &sc->sc_ic;
3905 uint32_t data;
3906 usb_error_t error;
3907
3908 urtw_read32_m(sc, URTW_RX, &data);
3909 data = data &~ URTW_RX_FILTER_MASK;
3910 if (sc->sc_flags & URTW_RTL8187B) {
3911 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA |
3912 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST |
3913 URTW_RX_FIFO_THRESHOLD_NONE |
3914 URTW_MAX_RX_DMA_2048 |
3915 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT;
3916 } else {
3917 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA;
3918 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST;
3919
3920 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
3921 data = data | URTW_RX_FILTER_ICVERR;
3922 data = data | URTW_RX_FILTER_PWR;
3923 }
3924 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR)
3925 data = data | URTW_RX_FILTER_CRCERR;
3926
3927 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK;
3928 data = data | URTW_RX_FIFO_THRESHOLD_NONE |
3929 URTW_RX_AUTORESETPHY;
3930 data = data &~ URTW_MAX_RX_DMA_MASK;
3931 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT;
3932 }
3933
3934 /* XXX allmulti should not be checked here... */
3935 if (ic->ic_opmode == IEEE80211_M_MONITOR ||
3936 ic->ic_promisc > 0 || ic->ic_allmulti > 0) {
3937 data = data | URTW_RX_FILTER_CTL;
3938 data = data | URTW_RX_FILTER_ALLMAC;
3939 } else {
3940 data = data | URTW_RX_FILTER_NICMAC;
3941 data = data | URTW_RX_CHECK_BSSID;
3942 }
3943
3944 urtw_write32_m(sc, URTW_RX, data);
3945 fail:
3946 return (error);
3947 }
3948
3949 static struct mbuf *
urtw_rxeof(struct usb_xfer * xfer,struct urtw_data * data,int * rssi_p,int8_t * nf_p)3950 urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p,
3951 int8_t *nf_p)
3952 {
3953 int actlen, flen, rssi;
3954 struct ieee80211_frame *wh;
3955 struct mbuf *m, *mnew;
3956 struct urtw_softc *sc = data->sc;
3957 struct ieee80211com *ic = &sc->sc_ic;
3958 uint8_t noise = 0, rate;
3959 uint64_t mactime;
3960
3961 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
3962
3963 if (sc->sc_flags & URTW_RTL8187B) {
3964 struct urtw_8187b_rxhdr *rx;
3965
3966 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN)
3967 goto fail;
3968
3969 rx = (struct urtw_8187b_rxhdr *)(data->buf +
3970 (actlen - (sizeof(struct urtw_8187b_rxhdr))));
3971 flen = le32toh(rx->flag) & 0xfff;
3972 if (flen > actlen - sizeof(*rx))
3973 goto fail;
3974
3975 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
3976 /* XXX correct? */
3977 rssi = rx->rssi & URTW_RX_RSSI_MASK;
3978 noise = rx->noise;
3979
3980 if (ieee80211_radiotap_active(ic))
3981 mactime = rx->mactime;
3982 } else {
3983 struct urtw_8187l_rxhdr *rx;
3984
3985 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN)
3986 goto fail;
3987
3988 rx = (struct urtw_8187l_rxhdr *)(data->buf +
3989 (actlen - (sizeof(struct urtw_8187l_rxhdr))));
3990 flen = le32toh(rx->flag) & 0xfff;
3991 if (flen > actlen - sizeof(*rx))
3992 goto fail;
3993
3994 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
3995 /* XXX correct? */
3996 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK;
3997 noise = rx->noise;
3998
3999 if (ieee80211_radiotap_active(ic))
4000 mactime = rx->mactime;
4001 }
4002
4003 if (flen < IEEE80211_ACK_LEN)
4004 goto fail;
4005
4006 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
4007 if (mnew == NULL)
4008 goto fail;
4009
4010 m = data->m;
4011 data->m = mnew;
4012 data->buf = mtod(mnew, uint8_t *);
4013
4014 /* finalize mbuf */
4015 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN;
4016
4017 if (ieee80211_radiotap_active(ic)) {
4018 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap;
4019
4020 tap->wr_tsf = mactime;
4021 tap->wr_flags = 0;
4022 tap->wr_dbm_antsignal = (int8_t)rssi;
4023 }
4024
4025 wh = mtod(m, struct ieee80211_frame *);
4026 if (IEEE80211_IS_DATA(wh))
4027 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate;
4028
4029 *rssi_p = rssi;
4030 *nf_p = noise; /* XXX correct? */
4031
4032 return (m);
4033
4034 fail:
4035 counter_u64_add(ic->ic_ierrors, 1);
4036 return (NULL);
4037 }
4038
4039 static void
urtw_bulk_rx_callback(struct usb_xfer * xfer,usb_error_t error)4040 urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
4041 {
4042 struct urtw_softc *sc = usbd_xfer_softc(xfer);
4043 struct ieee80211com *ic = &sc->sc_ic;
4044 struct ieee80211_node *ni;
4045 struct mbuf *m = NULL;
4046 struct urtw_data *data;
4047 int8_t nf = -95;
4048 int rssi = 1;
4049
4050 URTW_ASSERT_LOCKED(sc);
4051
4052 switch (USB_GET_STATE(xfer)) {
4053 case USB_ST_TRANSFERRED:
4054 data = STAILQ_FIRST(&sc->sc_rx_active);
4055 if (data == NULL)
4056 goto setup;
4057 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4058 m = urtw_rxeof(xfer, data, &rssi, &nf);
4059 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4060 /* FALLTHROUGH */
4061 case USB_ST_SETUP:
4062 setup:
4063 data = STAILQ_FIRST(&sc->sc_rx_inactive);
4064 if (data == NULL) {
4065 KASSERT(m == NULL, ("mbuf isn't NULL"));
4066 return;
4067 }
4068 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
4069 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
4070 usbd_xfer_set_frame_data(xfer, 0, data->buf,
4071 usbd_xfer_max_len(xfer));
4072 usbd_transfer_submit(xfer);
4073
4074 /*
4075 * To avoid LOR we should unlock our private mutex here to call
4076 * ieee80211_input() because here is at the end of a USB
4077 * callback and safe to unlock.
4078 */
4079 URTW_UNLOCK(sc);
4080 if (m != NULL) {
4081 if (m->m_pkthdr.len >=
4082 sizeof(struct ieee80211_frame_min)) {
4083 ni = ieee80211_find_rxnode(ic,
4084 mtod(m, struct ieee80211_frame_min *));
4085 } else
4086 ni = NULL;
4087
4088 if (ni != NULL) {
4089 (void) ieee80211_input(ni, m, rssi, nf);
4090 /* node is no longer needed */
4091 ieee80211_free_node(ni);
4092 } else
4093 (void) ieee80211_input_all(ic, m, rssi, nf);
4094 m = NULL;
4095 }
4096 URTW_LOCK(sc);
4097 break;
4098 default:
4099 /* needs it to the inactive queue due to a error. */
4100 data = STAILQ_FIRST(&sc->sc_rx_active);
4101 if (data != NULL) {
4102 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4103 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4104 }
4105 if (error != USB_ERR_CANCELLED) {
4106 usbd_xfer_set_stall(xfer);
4107 counter_u64_add(ic->ic_ierrors, 1);
4108 goto setup;
4109 }
4110 break;
4111 }
4112 }
4113
4114 #define URTW_STATUS_TYPE_TXCLOSE 1
4115 #define URTW_STATUS_TYPE_BEACON_INTR 0
4116
4117 static void
urtw_txstatus_eof(struct usb_xfer * xfer)4118 urtw_txstatus_eof(struct usb_xfer *xfer)
4119 {
4120 struct urtw_softc *sc = usbd_xfer_softc(xfer);
4121 struct ieee80211com *ic = &sc->sc_ic;
4122 int actlen, type, pktretry;
4123 uint64_t val;
4124
4125 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
4126
4127 if (actlen != sizeof(uint64_t))
4128 return;
4129
4130 val = le64toh(sc->sc_txstatus);
4131 type = (val >> 30) & 0x3;
4132 if (type == URTW_STATUS_TYPE_TXCLOSE) {
4133 pktretry = val & 0xff;
4134 if (pktretry == URTW_TX_MAXRETRY)
4135 counter_u64_add(ic->ic_oerrors, 1);
4136 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n",
4137 pktretry, (val >> 16) & 0xff);
4138 }
4139 }
4140
4141 static void
urtw_bulk_tx_status_callback(struct usb_xfer * xfer,usb_error_t error)4142 urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error)
4143 {
4144 struct urtw_softc *sc = usbd_xfer_softc(xfer);
4145 struct ieee80211com *ic = &sc->sc_ic;
4146 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0);
4147
4148 URTW_ASSERT_LOCKED(sc);
4149
4150 switch (USB_GET_STATE(xfer)) {
4151 case USB_ST_TRANSFERRED:
4152 urtw_txstatus_eof(xfer);
4153 /* FALLTHROUGH */
4154 case USB_ST_SETUP:
4155 setup:
4156 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t));
4157 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t));
4158 usbd_transfer_submit(xfer);
4159 break;
4160 default:
4161 if (error != USB_ERR_CANCELLED) {
4162 usbd_xfer_set_stall(xfer);
4163 counter_u64_add(ic->ic_ierrors, 1);
4164 goto setup;
4165 }
4166 break;
4167 }
4168 }
4169
4170 static void
urtw_txeof(struct usb_xfer * xfer,struct urtw_data * data)4171 urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data)
4172 {
4173 struct urtw_softc *sc = usbd_xfer_softc(xfer);
4174
4175 URTW_ASSERT_LOCKED(sc);
4176
4177 if (data->m) {
4178 /* XXX status? */
4179 ieee80211_tx_complete(data->ni, data->m, 0);
4180 data->m = NULL;
4181 data->ni = NULL;
4182 }
4183 sc->sc_txtimer = 0;
4184 }
4185
4186 static void
urtw_bulk_tx_callback(struct usb_xfer * xfer,usb_error_t error)4187 urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
4188 {
4189 struct urtw_softc *sc = usbd_xfer_softc(xfer);
4190 struct urtw_data *data;
4191
4192 URTW_ASSERT_LOCKED(sc);
4193
4194 switch (USB_GET_STATE(xfer)) {
4195 case USB_ST_TRANSFERRED:
4196 data = STAILQ_FIRST(&sc->sc_tx_active);
4197 if (data == NULL)
4198 goto setup;
4199 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next);
4200 urtw_txeof(xfer, data);
4201 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next);
4202 /* FALLTHROUGH */
4203 case USB_ST_SETUP:
4204 setup:
4205 data = STAILQ_FIRST(&sc->sc_tx_pending);
4206 if (data == NULL) {
4207 DPRINTF(sc, URTW_DEBUG_XMIT,
4208 "%s: empty pending queue\n", __func__);
4209 return;
4210 }
4211 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next);
4212 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next);
4213
4214 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
4215 usbd_transfer_submit(xfer);
4216
4217 urtw_start(sc);
4218 break;
4219 default:
4220 data = STAILQ_FIRST(&sc->sc_tx_active);
4221 if (data == NULL)
4222 goto setup;
4223 if (data->ni != NULL) {
4224 if_inc_counter(data->ni->ni_vap->iv_ifp,
4225 IFCOUNTER_OERRORS, 1);
4226 ieee80211_free_node(data->ni);
4227 data->ni = NULL;
4228 }
4229 if (error != USB_ERR_CANCELLED) {
4230 usbd_xfer_set_stall(xfer);
4231 goto setup;
4232 }
4233 break;
4234 }
4235 }
4236
4237 static struct urtw_data *
_urtw_getbuf(struct urtw_softc * sc)4238 _urtw_getbuf(struct urtw_softc *sc)
4239 {
4240 struct urtw_data *bf;
4241
4242 bf = STAILQ_FIRST(&sc->sc_tx_inactive);
4243 if (bf != NULL)
4244 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
4245 else
4246 bf = NULL;
4247 if (bf == NULL)
4248 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__,
4249 "out of xmit buffers");
4250 return (bf);
4251 }
4252
4253 static struct urtw_data *
urtw_getbuf(struct urtw_softc * sc)4254 urtw_getbuf(struct urtw_softc *sc)
4255 {
4256 struct urtw_data *bf;
4257
4258 URTW_ASSERT_LOCKED(sc);
4259
4260 bf = _urtw_getbuf(sc);
4261 if (bf == NULL)
4262 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__);
4263 return (bf);
4264 }
4265
4266 static int
urtw_isbmode(uint16_t rate)4267 urtw_isbmode(uint16_t rate)
4268 {
4269
4270 return ((rate <= 22 && rate != 12 && rate != 18) ||
4271 rate == 44) ? (1) : (0);
4272 }
4273
4274 static uint16_t
urtw_rate2dbps(uint16_t rate)4275 urtw_rate2dbps(uint16_t rate)
4276 {
4277
4278 switch(rate) {
4279 case 12:
4280 case 18:
4281 case 24:
4282 case 36:
4283 case 48:
4284 case 72:
4285 case 96:
4286 case 108:
4287 return (rate * 2);
4288 default:
4289 break;
4290 }
4291 return (24);
4292 }
4293
4294 static int
urtw_compute_txtime(uint16_t framelen,uint16_t rate,uint8_t ismgt,uint8_t isshort)4295 urtw_compute_txtime(uint16_t framelen, uint16_t rate,
4296 uint8_t ismgt, uint8_t isshort)
4297 {
4298 uint16_t ceiling, frametime, n_dbps;
4299
4300 if (urtw_isbmode(rate)) {
4301 if (ismgt || !isshort || rate == 2)
4302 frametime = (uint16_t)(144 + 48 +
4303 (framelen * 8 / (rate / 2)));
4304 else
4305 frametime = (uint16_t)(72 + 24 +
4306 (framelen * 8 / (rate / 2)));
4307 if ((framelen * 8 % (rate / 2)) != 0)
4308 frametime++;
4309 } else {
4310 n_dbps = urtw_rate2dbps(rate);
4311 ceiling = (16 + 8 * framelen + 6) / n_dbps
4312 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0);
4313 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6);
4314 }
4315 return (frametime);
4316 }
4317
4318 /*
4319 * Callback from the 802.11 layer to update the
4320 * slot time based on the current setting.
4321 */
4322 static void
urtw_updateslot(struct ieee80211com * ic)4323 urtw_updateslot(struct ieee80211com *ic)
4324 {
4325 struct urtw_softc *sc = ic->ic_softc;
4326
4327 ieee80211_runtask(ic, &sc->sc_updateslot_task);
4328 }
4329
4330 static void
urtw_updateslottask(void * arg,int pending)4331 urtw_updateslottask(void *arg, int pending)
4332 {
4333 struct urtw_softc *sc = arg;
4334 struct ieee80211com *ic = &sc->sc_ic;
4335 int error;
4336
4337 URTW_LOCK(sc);
4338 if ((sc->sc_flags & URTW_RUNNING) == 0) {
4339 URTW_UNLOCK(sc);
4340 return;
4341 }
4342 if (sc->sc_flags & URTW_RTL8187B) {
4343 urtw_write8_m(sc, URTW_SIFS, 0x22);
4344 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
4345 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT);
4346 else
4347 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT);
4348 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b);
4349 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b);
4350 } else {
4351 urtw_write8_m(sc, URTW_SIFS, 0x22);
4352 if (sc->sc_state == IEEE80211_S_ASSOC &&
4353 ic->ic_flags & IEEE80211_F_SHSLOT)
4354 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT);
4355 else
4356 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT);
4357 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
4358 urtw_write8_m(sc, URTW_DIFS, 0x14);
4359 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14);
4360 urtw_write8_m(sc, URTW_CW_VAL, 0x73);
4361 } else {
4362 urtw_write8_m(sc, URTW_DIFS, 0x24);
4363 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24);
4364 urtw_write8_m(sc, URTW_CW_VAL, 0xa5);
4365 }
4366 }
4367 fail:
4368 URTW_UNLOCK(sc);
4369 }
4370
4371 static void
urtw_sysctl_node(struct urtw_softc * sc)4372 urtw_sysctl_node(struct urtw_softc *sc)
4373 {
4374 #define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \
4375 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
4376 struct sysctl_ctx_list *ctx;
4377 struct sysctl_oid_list *child, *parent;
4378 struct sysctl_oid *tree;
4379 struct urtw_stats *stats = &sc->sc_stats;
4380
4381 ctx = device_get_sysctl_ctx(sc->sc_dev);
4382 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev));
4383
4384 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats",
4385 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "URTW statistics");
4386 parent = SYSCTL_CHILDREN(tree);
4387
4388 /* Tx statistics. */
4389 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx",
4390 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Tx MAC statistics");
4391 child = SYSCTL_CHILDREN(tree);
4392 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0],
4393 "1 Mbit/s");
4394 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1],
4395 "2 Mbit/s");
4396 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2],
4397 "5.5 Mbit/s");
4398 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4],
4399 "6 Mbit/s");
4400 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5],
4401 "9 Mbit/s");
4402 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3],
4403 "11 Mbit/s");
4404 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6],
4405 "12 Mbit/s");
4406 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7],
4407 "18 Mbit/s");
4408 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8],
4409 "24 Mbit/s");
4410 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9],
4411 "36 Mbit/s");
4412 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10],
4413 "48 Mbit/s");
4414 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11],
4415 "54 Mbit/s");
4416 #undef URTW_SYSCTL_STAT_ADD32
4417 }
4418
4419 static device_method_t urtw_methods[] = {
4420 DEVMETHOD(device_probe, urtw_match),
4421 DEVMETHOD(device_attach, urtw_attach),
4422 DEVMETHOD(device_detach, urtw_detach),
4423 DEVMETHOD_END
4424 };
4425
4426 static driver_t urtw_driver = {
4427 .name = "urtw",
4428 .methods = urtw_methods,
4429 .size = sizeof(struct urtw_softc)
4430 };
4431
4432 DRIVER_MODULE(urtw, uhub, urtw_driver, NULL, NULL);
4433 MODULE_DEPEND(urtw, wlan, 1, 1, 1);
4434 MODULE_DEPEND(urtw, usb, 1, 1, 1);
4435 MODULE_VERSION(urtw, 1);
4436 USB_PNP_HOST_INFO(urtw_devs);
4437