1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */
2
3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
5 *
6 * Copyright (c) 2007, Takanori Watanabe
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * Copyright (c) 2007 The NetBSD Foundation, Inc.
33 * All rights reserved.
34 *
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Takuya SHIOZAKI (tshiozak@netbsd.org).
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
57 * POSSIBILITY OF SUCH DAMAGE.
58 */
59
60 /*
61 * Driver for WinChipHead CH9102/343/341/340.
62 */
63
64 #include <sys/stdint.h>
65 #include <sys/stddef.h>
66 #include <sys/param.h>
67 #include <sys/queue.h>
68 #include <sys/types.h>
69 #include <sys/systm.h>
70 #include <sys/kernel.h>
71 #include <sys/bus.h>
72 #include <sys/module.h>
73 #include <sys/lock.h>
74 #include <sys/mutex.h>
75 #include <sys/condvar.h>
76 #include <sys/sysctl.h>
77 #include <sys/sx.h>
78 #include <sys/unistd.h>
79 #include <sys/callout.h>
80 #include <sys/malloc.h>
81 #include <sys/priv.h>
82
83 #include <dev/usb/usb.h>
84 #include <dev/usb/usbdi.h>
85 #include <dev/usb/usbdi_util.h>
86 #include "usbdevs.h"
87
88 #define USB_DEBUG_VAR uchcom_debug
89 #include <dev/usb/usb_debug.h>
90 #include <dev/usb/usb_process.h>
91
92 #include <dev/usb/serial/usb_serial.h>
93
94 #ifdef USB_DEBUG
95 static int uchcom_debug = 0;
96
97 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
98 "USB uchcom");
99 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RWTUN,
100 &uchcom_debug, 0, "uchcom debug level");
101 #endif
102
103 #define UCHCOM_IFACE_INDEX 0
104 #define UCHCOM_CONFIG_INDEX 0
105 #define UCHCOM_SECOND_IFACE_INDEX 1
106
107 #define UCHCOM_REV_CH340 0x0250
108 #define UCHCOM_INPUT_BUF_SIZE 8
109
110 #define UCHCOM_REQ_GET_VERSION 0x5F
111 #define UCHCOM_REQ_READ_REG 0x95
112 #define UCHCOM_REQ_WRITE_REG 0x9A
113 #define UCHCOM_REQ_RESET 0xA1
114 #define UCHCOM_REQ_SET_DTRRTS 0xA4
115 #define UCHCOM_REQ_CH343_WRITE_REG 0xA8
116
117 #define UCHCOM_REG_STAT1 0x06
118 #define UCHCOM_REG_STAT2 0x07
119 #define UCHCOM_REG_BPS_PRE 0x12
120 #define UCHCOM_REG_BPS_DIV 0x13
121 #define UCHCOM_REG_BPS_MOD 0x14
122 #define UCHCOM_REG_BPS_PAD 0x0F
123 #define UCHCOM_REG_BREAK1 0x05
124 #define UCHCOM_REG_LCR1 0x18
125 #define UCHCOM_REG_LCR2 0x25
126
127 #define UCHCOM_VER_20 0x20
128 #define UCHCOM_VER_30 0x30
129
130 #define UCHCOM_BASE_UNKNOWN 0
131 #define UCHCOM_BPS_MOD_BASE 20000000
132 #define UCHCOM_BPS_MOD_BASE_OFS 1100
133
134 #define UCHCOM_DTR_MASK 0x20
135 #define UCHCOM_RTS_MASK 0x40
136
137 #define UCHCOM_BRK_MASK 0x01
138 #define UCHCOM_ABRK_MASK 0x10
139 #define UCHCOM_CH343_BRK_MASK 0x80
140
141 #define UCHCOM_LCR1_MASK 0xAF
142 #define UCHCOM_LCR2_MASK 0x07
143 #define UCHCOM_LCR1_RX 0x80
144 #define UCHCOM_LCR1_TX 0x40
145 #define UCHCOM_LCR1_PARENB 0x08
146 #define UCHCOM_LCR1_CS5 0x00
147 #define UCHCOM_LCR1_CS6 0x01
148 #define UCHCOM_LCR1_CS7 0x02
149 #define UCHCOM_LCR1_CS8 0x03
150 #define UCHCOM_LCR1_STOPB 0x04
151 #define UCHCOM_LCR1_PARODD 0x00
152 #define UCHCOM_LCR1_PAREVEN 0x10
153 #define UCHCOM_LCR2_PAREVEN 0x07
154 #define UCHCOM_LCR2_PARODD 0x06
155 #define UCHCOM_LCR2_PARMARK 0x05
156 #define UCHCOM_LCR2_PARSPACE 0x04
157
158 #define UCHCOM_INTR_STAT1 0x02
159 #define UCHCOM_INTR_STAT2 0x03
160 #define UCHCOM_INTR_LEAST 4
161
162 #define UCHCOM_T 0x08
163 #define UCHCOM_CL 0x04
164 #define UCHCOM_CH343_CT 0x80
165 #define UCHCOM_CT 0x90
166
167 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */
168
169 #define TYPE_CH343 1
170
171 enum {
172 UCHCOM_BULK_DT_WR,
173 UCHCOM_BULK_DT_RD,
174 UCHCOM_N_TRANSFER,
175 };
176
177 struct uchcom_softc {
178 struct ucom_super_softc sc_super_ucom;
179 struct ucom_softc sc_ucom;
180
181 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER];
182 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */
183 struct usb_device *sc_udev;
184 struct mtx sc_mtx;
185
186 uint8_t sc_dtr; /* local copy */
187 uint8_t sc_rts; /* local copy */
188 uint8_t sc_version;
189 uint8_t sc_msr;
190 uint8_t sc_lsr; /* local status register */
191 uint8_t sc_chiptype; /* type of chip */
192 uint8_t sc_ctrl_iface_no;
193 uint8_t sc_iface_index;
194 };
195
196 static const STRUCT_USB_HOST_ID uchcom_devs[] = {
197 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)},
198 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)},
199 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)},
200 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_3, 0)},
201 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH343SER, 0)},
202 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH9102SER, 0)},
203 };
204
205 /* protypes */
206
207 static void uchcom_free(struct ucom_softc *);
208 static int uchcom_pre_param(struct ucom_softc *, struct termios *);
209 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *,
210 uint8_t *);
211 static void uchcom_cfg_open(struct ucom_softc *ucom);
212 static void uchcom_cfg_param(struct ucom_softc *, struct termios *);
213 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t);
214 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t);
215 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t);
216 static void uchcom_start_read(struct ucom_softc *);
217 static void uchcom_start_write(struct ucom_softc *);
218 static void uchcom_stop_read(struct ucom_softc *);
219 static void uchcom_stop_write(struct ucom_softc *);
220 static void uchcom_update_version(struct uchcom_softc *);
221 static void uchcom_convert_status(struct uchcom_softc *, uint8_t);
222 static void uchcom_update_status(struct uchcom_softc *);
223 static void uchcom_set_dtr_rts(struct uchcom_softc *);
224 static void uchcom_calc_baudrate(struct uchcom_softc *, uint32_t, uint8_t *,
225 uint8_t *);
226 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t, uint16_t);
227 static void uchcom_poll(struct ucom_softc *ucom);
228
229 static device_probe_t uchcom_probe;
230 static device_attach_t uchcom_attach;
231 static device_detach_t uchcom_detach;
232 static void uchcom_free_softc(struct uchcom_softc *);
233
234 static usb_callback_t uchcom_intr_callback;
235 static usb_callback_t uchcom_write_callback;
236 static usb_callback_t uchcom_read_callback;
237
238 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = {
239 [UCHCOM_BULK_DT_WR] = {
240 .type = UE_BULK,
241 .endpoint = UE_ADDR_ANY,
242 .direction = UE_DIR_OUT,
243 .bufsize = UCHCOM_BULK_BUF_SIZE,
244 .flags = {.pipe_bof = 1,},
245 .callback = &uchcom_write_callback,
246 },
247
248 [UCHCOM_BULK_DT_RD] = {
249 .type = UE_BULK,
250 .endpoint = UE_ADDR_ANY,
251 .direction = UE_DIR_IN,
252 .bufsize = UCHCOM_BULK_BUF_SIZE,
253 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
254 .callback = &uchcom_read_callback,
255 },
256 };
257
258 static const struct usb_config uchcom_intr_config_data[1] = {
259 [0] = {
260 .type = UE_INTERRUPT,
261 .endpoint = UE_ADDR_ANY,
262 .direction = UE_DIR_IN,
263 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
264 .bufsize = 0, /* use wMaxPacketSize */
265 .callback = &uchcom_intr_callback,
266 },
267 };
268
269 static struct ucom_callback uchcom_callback = {
270 .ucom_cfg_get_status = &uchcom_cfg_get_status,
271 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr,
272 .ucom_cfg_set_rts = &uchcom_cfg_set_rts,
273 .ucom_cfg_set_break = &uchcom_cfg_set_break,
274 .ucom_cfg_open = &uchcom_cfg_open,
275 .ucom_cfg_param = &uchcom_cfg_param,
276 .ucom_pre_param = &uchcom_pre_param,
277 .ucom_start_read = &uchcom_start_read,
278 .ucom_stop_read = &uchcom_stop_read,
279 .ucom_start_write = &uchcom_start_write,
280 .ucom_stop_write = &uchcom_stop_write,
281 .ucom_poll = &uchcom_poll,
282 .ucom_free = &uchcom_free,
283 };
284
285 /* ----------------------------------------------------------------------
286 * driver entry points
287 */
288
289 static int
uchcom_probe(device_t dev)290 uchcom_probe(device_t dev)
291 {
292 struct usb_attach_arg *uaa = device_get_ivars(dev);
293
294 DPRINTFN(11, "\n");
295
296 if (uaa->usb_mode != USB_MODE_HOST) {
297 return (ENXIO);
298 }
299 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) {
300 return (ENXIO);
301 }
302 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) {
303 return (ENXIO);
304 }
305 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa));
306 }
307
308 static int
uchcom_attach(device_t dev)309 uchcom_attach(device_t dev)
310 {
311 struct uchcom_softc *sc = device_get_softc(dev);
312 struct usb_attach_arg *uaa = device_get_ivars(dev);
313 struct usb_interface *iface;
314 struct usb_interface_descriptor *id;
315 int error;
316
317 DPRINTFN(11, "\n");
318
319 device_set_usb_desc(dev);
320 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF);
321 ucom_ref(&sc->sc_super_ucom);
322
323 sc->sc_udev = uaa->device;
324
325 switch (uaa->info.idProduct) {
326 case USB_PRODUCT_WCH2_CH341SER:
327 device_printf(dev, "CH340 detected\n");
328 break;
329 case USB_PRODUCT_WCH2_CH341SER_2:
330 case USB_PRODUCT_WCH2_CH341SER_3:
331 device_printf(dev, "CH341 detected\n");
332 break;
333 case USB_PRODUCT_WCH2_CH343SER:
334 device_printf(dev, "CH343 detected\n");
335 break;
336 case USB_PRODUCT_WCH2_CH9102SER:
337 device_printf(dev, "CH9102 detected\n");
338 break;
339 default:
340 device_printf(dev, "New CH340/CH341/CH343/CH9102 product "
341 "0x%04x detected\n", uaa->info.idProduct);
342 break;
343 }
344
345 /* CH343/CH9102 has two interfaces. */
346 sc->sc_ctrl_iface_no = uaa->info.bIfaceNum;
347
348 iface = usbd_get_iface(uaa->device, UCHCOM_SECOND_IFACE_INDEX);
349 if (iface) {
350 id = usbd_get_interface_descriptor(iface);
351 if (id == NULL) {
352 device_printf(dev, "no interface descriptor\n");
353 goto detach;
354 }
355 sc->sc_iface_index = UCHCOM_SECOND_IFACE_INDEX;
356 usbd_set_parent_iface(uaa->device, UCHCOM_SECOND_IFACE_INDEX,
357 uaa->info.bIfaceIndex);
358 sc->sc_chiptype = TYPE_CH343;
359 } else {
360 sc->sc_iface_index = UCHCOM_IFACE_INDEX;
361 }
362
363 /* Setup all transfers. */
364 error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index,
365 sc->sc_xfer, uchcom_config_data, UCHCOM_N_TRANSFER, sc,
366 &sc->sc_mtx);
367 if (error) {
368 device_printf(dev, "could not allocate all pipes\n");
369 goto detach;
370 }
371 error = usbd_transfer_setup(uaa->device, &sc->sc_ctrl_iface_no,
372 &sc->sc_intr_xfer, uchcom_intr_config_data, 1, sc, &sc->sc_mtx);
373 if (error) {
374 device_printf(dev, "allocating USB transfers failed for "
375 "interrupt\n");
376 goto detach;
377 }
378
379 /* clear stall at first run */
380 mtx_lock(&sc->sc_mtx);
381 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
382 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
383 mtx_unlock(&sc->sc_mtx);
384
385 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
386 &uchcom_callback, &sc->sc_mtx);
387 if (error) {
388 goto detach;
389 }
390 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
391
392 return (0);
393
394 detach:
395 uchcom_detach(dev);
396 return (ENXIO);
397 }
398
399 static int
uchcom_detach(device_t dev)400 uchcom_detach(device_t dev)
401 {
402 struct uchcom_softc *sc = device_get_softc(dev);
403
404 DPRINTFN(11, "\n");
405
406 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom);
407 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER);
408
409 device_claim_softc(dev);
410
411 uchcom_free_softc(sc);
412
413 return (0);
414 }
415
416 UCOM_UNLOAD_DRAIN(uchcom);
417
418 static void
uchcom_free_softc(struct uchcom_softc * sc)419 uchcom_free_softc(struct uchcom_softc *sc)
420 {
421 if (ucom_unref(&sc->sc_super_ucom)) {
422 mtx_destroy(&sc->sc_mtx);
423 device_free_softc(sc);
424 }
425 }
426
427 static void
uchcom_free(struct ucom_softc * ucom)428 uchcom_free(struct ucom_softc *ucom)
429 {
430 uchcom_free_softc(ucom->sc_parent);
431 }
432
433 /* ----------------------------------------------------------------------
434 * low level i/o
435 */
436
437 static void
uchcom_ctrl_write(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index)438 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno,
439 uint16_t value, uint16_t index)
440 {
441 struct usb_device_request req;
442
443 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
444 req.bRequest = reqno;
445 USETW(req.wValue, value);
446 USETW(req.wIndex, index);
447 USETW(req.wLength, 0);
448
449 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n",
450 reqno, value, index);
451 ucom_cfg_do_request(sc->sc_udev,
452 &sc->sc_ucom, &req, NULL, 0, 1000);
453 }
454
455 static void
uchcom_ctrl_read(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index,void * buf,uint16_t buflen)456 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno,
457 uint16_t value, uint16_t index, void *buf, uint16_t buflen)
458 {
459 struct usb_device_request req;
460
461 req.bmRequestType = UT_READ_VENDOR_DEVICE;
462 req.bRequest = reqno;
463 USETW(req.wValue, value);
464 USETW(req.wIndex, index);
465 USETW(req.wLength, buflen);
466
467 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n",
468 reqno, value, index, buflen);
469 ucom_cfg_do_request(sc->sc_udev,
470 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000);
471 }
472
473 static void
uchcom_write_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t val1,uint8_t reg2,uint8_t val2)474 uchcom_write_reg(struct uchcom_softc *sc,
475 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2)
476 {
477 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n",
478 (unsigned)reg1, (unsigned)val1,
479 (unsigned)reg2, (unsigned)val2);
480 uchcom_ctrl_write(
481 sc,
482 (sc->sc_chiptype != TYPE_CH343) ?
483 UCHCOM_REQ_WRITE_REG : UCHCOM_REQ_CH343_WRITE_REG,
484 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8));
485 }
486
487 static void
uchcom_read_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t * rval1,uint8_t reg2,uint8_t * rval2)488 uchcom_read_reg(struct uchcom_softc *sc,
489 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2)
490 {
491 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
492
493 uchcom_ctrl_read(
494 sc, UCHCOM_REQ_READ_REG,
495 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf));
496
497 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n",
498 (unsigned)reg1, (unsigned)buf[0],
499 (unsigned)reg2, (unsigned)buf[1]);
500
501 if (rval1)
502 *rval1 = buf[0];
503 if (rval2)
504 *rval2 = buf[1];
505 }
506
507 static void
uchcom_get_version(struct uchcom_softc * sc,uint8_t * rver)508 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver)
509 {
510 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
511
512 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf));
513
514 if (rver)
515 *rver = buf[0];
516 }
517
518 static void
uchcom_get_status(struct uchcom_softc * sc,uint8_t * rval)519 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval)
520 {
521 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
522 }
523
524 static void
uchcom_set_dtr_rts_10(struct uchcom_softc * sc,uint8_t val)525 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)
526 {
527 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
528 }
529
530 static void
uchcom_set_dtr_rts_20(struct uchcom_softc * sc,uint8_t val)531 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)
532 {
533 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
534 }
535
536 /* ----------------------------------------------------------------------
537 * middle layer
538 */
539
540 static void
uchcom_update_version(struct uchcom_softc * sc)541 uchcom_update_version(struct uchcom_softc *sc)
542 {
543 uchcom_get_version(sc, &sc->sc_version);
544 DPRINTF("Chip version: 0x%02x\n", sc->sc_version);
545 }
546
547 static void
uchcom_convert_status(struct uchcom_softc * sc,uint8_t cur)548 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur)
549 {
550 cur = ~cur & 0x0F;
551 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur);
552 }
553
554 static void
uchcom_update_status(struct uchcom_softc * sc)555 uchcom_update_status(struct uchcom_softc *sc)
556 {
557 uint8_t cur;
558
559 uchcom_get_status(sc, &cur);
560 uchcom_convert_status(sc, cur);
561 }
562
563 static void
uchcom_set_dtr_rts(struct uchcom_softc * sc)564 uchcom_set_dtr_rts(struct uchcom_softc *sc)
565 {
566 uint8_t val = 0;
567
568 if (sc->sc_dtr)
569 val |= UCHCOM_DTR_MASK;
570 if (sc->sc_rts)
571 val |= UCHCOM_RTS_MASK;
572
573 if (sc->sc_version < UCHCOM_VER_20)
574 uchcom_set_dtr_rts_10(sc, ~val);
575 else
576 uchcom_set_dtr_rts_20(sc, ~val);
577 }
578
579 static void
uchcom_cfg_set_break(struct ucom_softc * ucom,uint8_t onoff)580 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
581 {
582 struct uchcom_softc *sc = ucom->sc_parent;
583 uint8_t brk1;
584 uint8_t brk2;
585
586 if (sc->sc_chiptype == TYPE_CH343) {
587 brk1 = UCHCOM_CH343_BRK_MASK;
588 if (!onoff)
589 brk1 |= UCHCOM_ABRK_MASK;
590 uchcom_write_reg(sc, brk1, 0, 0, 0);
591 } else {
592 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1,
593 &brk2);
594 if (onoff) {
595 /* on - clear bits */
596 brk1 &= ~UCHCOM_BRK_MASK;
597 brk2 &= ~UCHCOM_LCR1_TX;
598 } else {
599 /* off - set bits */
600 brk1 |= UCHCOM_BRK_MASK;
601 brk2 |= UCHCOM_LCR1_TX;
602 }
603 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1,
604 brk2);
605 }
606 }
607
608 static void
uchcom_calc_baudrate(struct uchcom_softc * sc,uint32_t rate,uint8_t * divisor,uint8_t * factor)609 uchcom_calc_baudrate(struct uchcom_softc *sc, uint32_t rate, uint8_t *divisor,
610 uint8_t *factor)
611 {
612 uint32_t clk = 12000000;
613
614 if (rate >= 256000 && sc->sc_chiptype == TYPE_CH343)
615 *divisor = 7;
616 else if (rate > 23529) {
617 clk /= 2;
618 *divisor = 3;
619 } else if (rate > 2941) {
620 clk /= 16;
621 *divisor = 2;
622 } else if (rate > 367) {
623 clk /= 128;
624 *divisor = 1;
625 } else {
626 clk = 11719;
627 *divisor = 0;
628 }
629
630 *factor = 256 - clk / rate;
631
632 if (rate == 921600 && sc->sc_chiptype != TYPE_CH343) {
633 *divisor = 7;
634 *factor = 243;
635 }
636 }
637
638 static void
uchcom_set_baudrate(struct uchcom_softc * sc,uint32_t rate,uint16_t lcr)639 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate, uint16_t lcr)
640 {
641 uint16_t idx;
642 uint8_t factor, div;
643
644 uchcom_calc_baudrate(sc, rate, &div, &factor);
645 div |= (sc->sc_chiptype != TYPE_CH343) ? 0x80 : 0x00;
646 idx = (factor << 8) | div;
647
648 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, lcr, idx);
649 }
650
651 /* ----------------------------------------------------------------------
652 * methods for ucom
653 */
654 static void
uchcom_cfg_get_status(struct ucom_softc * ucom,uint8_t * lsr,uint8_t * msr)655 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
656 {
657 struct uchcom_softc *sc = ucom->sc_parent;
658
659 DPRINTF("\n");
660
661 /* XXX Note: sc_lsr is always zero */
662 *lsr = sc->sc_lsr;
663 *msr = sc->sc_msr;
664 }
665
666 static void
uchcom_cfg_set_dtr(struct ucom_softc * ucom,uint8_t onoff)667 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
668 {
669 struct uchcom_softc *sc = ucom->sc_parent;
670
671 DPRINTF("onoff = %d\n", onoff);
672
673 sc->sc_dtr = onoff;
674 uchcom_set_dtr_rts(sc);
675 }
676
677 static void
uchcom_cfg_set_rts(struct ucom_softc * ucom,uint8_t onoff)678 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
679 {
680 struct uchcom_softc *sc = ucom->sc_parent;
681
682 DPRINTF("onoff = %d\n", onoff);
683
684 sc->sc_rts = onoff;
685 uchcom_set_dtr_rts(sc);
686 }
687
688 static void
uchcom_cfg_open(struct ucom_softc * ucom)689 uchcom_cfg_open(struct ucom_softc *ucom)
690 {
691 struct uchcom_softc *sc = ucom->sc_parent;
692
693 DPRINTF("\n");
694
695 if (sc->sc_chiptype != TYPE_CH343) {
696 /* Set default configuration. */
697 uchcom_get_version(sc, NULL);
698 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0);
699 uchcom_write_reg(sc, UCHCOM_REG_BPS_PRE, 0x82,
700 UCHCOM_REG_BPS_DIV, 0xd9);
701 uchcom_write_reg(sc, 0x2c, 0x07, UCHCOM_REG_BPS_PAD, 0);
702 }
703 uchcom_update_version(sc);
704 uchcom_update_status(sc);
705 }
706
707 static int
uchcom_pre_param(struct ucom_softc * ucom,struct termios * t)708 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t)
709 {
710 struct uchcom_softc *sc = ucom->sc_parent;
711
712 /*
713 * Check requested baud rate.
714 * The CH340/CH341 can set any baud rate up to 2Mb.
715 * The CH9102/CH343 can set any baud rate up to 6Mb.
716 */
717 switch (sc->sc_chiptype) {
718 case TYPE_CH343:
719 if (t->c_ospeed <= 6000000)
720 return (0);
721 break;
722 default:
723 if (t->c_ospeed <= 2000000)
724 return (0);
725 break;
726 }
727
728 return (EIO);
729 }
730
731 static void
uchcom_cfg_param(struct ucom_softc * ucom,struct termios * t)732 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t)
733 {
734 struct uchcom_softc *sc = ucom->sc_parent;
735 uint8_t lcr;
736
737 lcr = UCHCOM_LCR1_RX | UCHCOM_LCR1_TX;
738
739 if (t->c_cflag & CSTOPB)
740 lcr |= UCHCOM_LCR1_STOPB;
741
742 if (t->c_cflag & PARENB) {
743 lcr |= UCHCOM_LCR1_PARENB;
744 if (t->c_cflag & PARODD)
745 lcr |= UCHCOM_LCR1_PARODD;
746 else
747 lcr |= UCHCOM_LCR1_PAREVEN;
748 }
749
750 switch (t->c_cflag & CSIZE) {
751 case CS5:
752 lcr |= UCHCOM_LCR1_CS5;
753 break;
754 case CS6:
755 lcr |= UCHCOM_LCR1_CS6;
756 break;
757 case CS7:
758 lcr |= UCHCOM_LCR1_CS7;
759 break;
760 case CS8:
761 default:
762 lcr |= UCHCOM_LCR1_CS8;
763 break;
764 }
765
766 if (sc->sc_chiptype == TYPE_CH343)
767 uchcom_set_baudrate(sc, t->c_ospeed,
768 UCHCOM_T | UCHCOM_CL | UCHCOM_CH343_CT | lcr << 8);
769 else
770 uchcom_set_baudrate(sc, t->c_ospeed,
771 UCHCOM_T | UCHCOM_CL | UCHCOM_CT | lcr << 8);
772
773 uchcom_set_dtr_rts(sc);
774 uchcom_update_status(sc);
775 }
776
777 static void
uchcom_start_read(struct ucom_softc * ucom)778 uchcom_start_read(struct ucom_softc *ucom)
779 {
780 struct uchcom_softc *sc = ucom->sc_parent;
781
782 /* start interrupt endpoint */
783 usbd_transfer_start(sc->sc_intr_xfer);
784
785 /* start read endpoint */
786 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
787 }
788
789 static void
uchcom_stop_read(struct ucom_softc * ucom)790 uchcom_stop_read(struct ucom_softc *ucom)
791 {
792 struct uchcom_softc *sc = ucom->sc_parent;
793
794 /* stop interrupt endpoint */
795 usbd_transfer_stop(sc->sc_intr_xfer);
796
797 /* stop read endpoint */
798 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
799 }
800
801 static void
uchcom_start_write(struct ucom_softc * ucom)802 uchcom_start_write(struct ucom_softc *ucom)
803 {
804 struct uchcom_softc *sc = ucom->sc_parent;
805
806 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
807 }
808
809 static void
uchcom_stop_write(struct ucom_softc * ucom)810 uchcom_stop_write(struct ucom_softc *ucom)
811 {
812 struct uchcom_softc *sc = ucom->sc_parent;
813
814 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
815 }
816
817 /* ----------------------------------------------------------------------
818 * callback when the modem status is changed.
819 */
820 static void
uchcom_intr_callback(struct usb_xfer * xfer,usb_error_t error)821 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error)
822 {
823 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
824 struct usb_page_cache *pc;
825 uint32_t intrstat;
826 uint8_t buf[16];
827 int actlen;
828
829 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
830
831 switch (USB_GET_STATE(xfer)) {
832 case USB_ST_TRANSFERRED:
833
834 DPRINTF("actlen = %u\n", actlen);
835
836 if (actlen >= UCHCOM_INTR_LEAST) {
837 pc = usbd_xfer_get_frame(xfer, 0);
838 usbd_copy_out(pc, 0, buf, sizeof(buf));
839
840 intrstat = (sc->sc_chiptype == TYPE_CH343) ?
841 actlen - 1 : UCHCOM_INTR_STAT1;
842
843 uchcom_convert_status(sc, buf[intrstat]);
844 ucom_status_change(&sc->sc_ucom);
845 }
846 case USB_ST_SETUP:
847 tr_setup:
848 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
849 usbd_transfer_submit(xfer);
850 break;
851
852 default: /* Error */
853 if (error != USB_ERR_CANCELLED) {
854 /* try to clear stall first */
855 usbd_xfer_set_stall(xfer);
856 goto tr_setup;
857 }
858 break;
859 }
860 }
861
862 static void
uchcom_write_callback(struct usb_xfer * xfer,usb_error_t error)863 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error)
864 {
865 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
866 struct usb_page_cache *pc;
867 uint32_t actlen;
868
869 switch (USB_GET_STATE(xfer)) {
870 case USB_ST_SETUP:
871 case USB_ST_TRANSFERRED:
872 tr_setup:
873 pc = usbd_xfer_get_frame(xfer, 0);
874 if (ucom_get_data(&sc->sc_ucom, pc, 0,
875 usbd_xfer_max_len(xfer), &actlen)) {
876 DPRINTF("actlen = %d\n", actlen);
877
878 usbd_xfer_set_frame_len(xfer, 0, actlen);
879 usbd_transfer_submit(xfer);
880 }
881 break;
882
883 default: /* Error */
884 if (error != USB_ERR_CANCELLED) {
885 /* try to clear stall first */
886 usbd_xfer_set_stall(xfer);
887 goto tr_setup;
888 }
889 break;
890 }
891 }
892
893 static void
uchcom_read_callback(struct usb_xfer * xfer,usb_error_t error)894 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error)
895 {
896 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
897 struct usb_page_cache *pc;
898 int actlen;
899
900 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
901
902 switch (USB_GET_STATE(xfer)) {
903 case USB_ST_TRANSFERRED:
904
905 if (actlen > 0) {
906 pc = usbd_xfer_get_frame(xfer, 0);
907 ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
908 }
909
910 case USB_ST_SETUP:
911 tr_setup:
912 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
913 usbd_transfer_submit(xfer);
914 break;
915
916 default: /* Error */
917 if (error != USB_ERR_CANCELLED) {
918 /* try to clear stall first */
919 usbd_xfer_set_stall(xfer);
920 goto tr_setup;
921 }
922 break;
923 }
924 }
925
926 static void
uchcom_poll(struct ucom_softc * ucom)927 uchcom_poll(struct ucom_softc *ucom)
928 {
929 struct uchcom_softc *sc = ucom->sc_parent;
930 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER);
931 }
932
933 static device_method_t uchcom_methods[] = {
934 /* Device interface */
935 DEVMETHOD(device_probe, uchcom_probe),
936 DEVMETHOD(device_attach, uchcom_attach),
937 DEVMETHOD(device_detach, uchcom_detach),
938 DEVMETHOD_END
939 };
940
941 static driver_t uchcom_driver = {
942 .name = "uchcom",
943 .methods = uchcom_methods,
944 .size = sizeof(struct uchcom_softc)
945 };
946
947 DRIVER_MODULE(uchcom, uhub, uchcom_driver, NULL, NULL);
948 MODULE_DEPEND(uchcom, ucom, 1, 1, 1);
949 MODULE_DEPEND(uchcom, usb, 1, 1, 1);
950 MODULE_VERSION(uchcom, 1);
951 USB_PNP_HOST_INFO(uchcom_devs);
952