1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2021, Adrian Chadd <adrian@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31
32 #include <sys/bus.h>
33 #include <sys/interrupt.h>
34 #include <sys/malloc.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <sys/gpio.h>
41
42 #include <vm/vm.h>
43 #include <vm/pmap.h>
44 #include <vm/vm_extern.h>
45
46 #include <machine/bus.h>
47 #include <machine/cpu.h>
48
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/fdt/fdt_pinctrl.h>
51
52 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
55
56 #include <dev/qcom_tcsr/qcom_tcsr_var.h>
57 #include <dev/qcom_tcsr/qcom_tcsr_reg.h>
58
59 /*
60 * The linux-msm branches that support IPQ4018 use "ipq,tcsr".
61 * The openwrt addons use qcom,tcsr. So for now support both.
62 *
63 * Also, it's not quite clear yet (since this is the first port!)
64 * whether these options and registers are specific to the QCA IPQ401x
65 * part or show up in different linux branches as different registers
66 * but with the same driver/naming here. Let's hope that doesn't
67 * happen.
68 */
69 static struct ofw_compat_data compat_data[] = {
70 { "qcom,tcsr", 1 },
71 { "ipq,tcsr", 1 },
72 { NULL, 0 }
73 };
74
75 static int
qcom_tcsr_probe(device_t dev)76 qcom_tcsr_probe(device_t dev)
77 {
78
79 if (!ofw_bus_status_okay(dev))
80 return (ENXIO);
81
82 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
83 return (ENXIO);
84
85 device_set_desc(dev, "Qualcomm Core Top Control and Status Driver");
86 return (BUS_PROBE_DEFAULT);
87 }
88
89 static int
qcom_tcsr_attach(device_t dev)90 qcom_tcsr_attach(device_t dev)
91 {
92 struct qcom_tcsr_softc *sc = device_get_softc(dev);
93 int rid, ret;
94 uint32_t val;
95
96 sc->sc_dev = dev;
97
98 /*
99 * Hardware version is stored in the ofw_compat_data table.
100 */
101 sc->hw_version =
102 ofw_bus_search_compatible(dev, compat_data)->ocd_data;
103
104 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
105
106 rid = 0;
107 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
108 RF_ACTIVE);
109 if (!sc->sc_mem_res) {
110 device_printf(dev, "ERROR: Could not map memory\n");
111 ret = ENXIO;
112 goto error;
113 }
114
115 /*
116 * Parse out the open firmware entries to see which particular
117 * configurations we need to set here.
118 */
119
120 /*
121 * USB control select.
122 *
123 * For linux-msm on the IPQ401x, it actually calls into the SCM
124 * to make the change. OpenWRT just does a register write.
125 * We'll do the register write for now.
126 */
127 if (OF_getencprop(ofw_bus_get_node(dev), "qcom,usb-ctrl-select",
128 &val, sizeof(val)) > 0) {
129 if (bootverbose)
130 device_printf(sc->sc_dev,
131 "USB control select (val 0x%x)\n",
132 val);
133 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_USB_PORT_SEL, val);
134 }
135
136 /*
137 * USB high speed phy mode select.
138 */
139 if (OF_getencprop(ofw_bus_get_node(dev), "qcom,usb-hsphy-mode-select",
140 &val, sizeof(val)) > 0) {
141 if (bootverbose)
142 device_printf(sc->sc_dev,
143 "USB high speed PHY mode select (val 0x%x)\n",
144 val);
145 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_USB_HSPHY_CONFIG, val);
146 }
147
148 /*
149 * Ethernet switch subsystem interface type select.
150 */
151 if (OF_getencprop(ofw_bus_get_node(dev), "qcom,ess-interface-select",
152 &val, sizeof(val)) > 0) {
153 uint32_t reg;
154
155 if (bootverbose)
156 device_printf(sc->sc_dev,
157 "ESS external interface select (val 0x%x)\n",
158 val);
159 reg = QCOM_TCSR_READ_4(sc, QCOM_TCSR_ESS_INTERFACE_SEL_OFFSET);
160 reg &= ~QCOM_TCSR_ESS_INTERFACE_SEL_MASK;
161 reg |= (val & QCOM_TCSR_ESS_INTERFACE_SEL_MASK);
162 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_ESS_INTERFACE_SEL_OFFSET, reg);
163 }
164
165 /*
166 * WiFi GLB select.
167 */
168 if (OF_getencprop(ofw_bus_get_node(dev), "qcom,wifi_glb_cfg",
169 &val, sizeof(val)) > 0) {
170 if (bootverbose)
171 device_printf(sc->sc_dev,
172 "WIFI GLB select (val 0x%x)\n",
173 val);
174 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_WIFI0_GLB_CFG_OFFSET, val);
175 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_WIFI1_GLB_CFG_OFFSET, val);
176 }
177
178 /*
179 * WiFi NOC interconnect memory type.
180 */
181 if (OF_getencprop(ofw_bus_get_node(dev),
182 "qcom,wifi_noc_memtype_m0_m2",
183 &val, sizeof(val)) > 0) {
184 if (bootverbose)
185 device_printf(sc->sc_dev,
186 "WiFi NOC memory type (val 0x%x)\n",
187 val);
188 QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_PNOC_SNOC_MEMTYPE_M0_M2, val);
189 }
190
191 return (0);
192
193 error:
194 if (sc->sc_mem_res)
195 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
196 mtx_destroy(&sc->sc_mtx);
197 return (ret);
198 }
199
200 static int
qcom_tcsr_detach(device_t dev)201 qcom_tcsr_detach(device_t dev)
202 {
203 struct qcom_tcsr_softc *sc = device_get_softc(dev);
204
205 if (sc->sc_mem_res)
206 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
207
208 mtx_destroy(&sc->sc_mtx);
209
210 return (0);
211 }
212
213 static device_method_t qcom_tcsr_methods[] = {
214 /* Device interface */
215 DEVMETHOD(device_probe, qcom_tcsr_probe),
216 DEVMETHOD(device_attach, qcom_tcsr_attach),
217 DEVMETHOD(device_detach, qcom_tcsr_detach),
218
219 DEVMETHOD_END
220 };
221
222 static driver_t qcom_tcsr_driver = {
223 "qcom_tcsr",
224 qcom_tcsr_methods,
225 sizeof(struct qcom_tcsr_softc),
226 };
227
228 /*
229 * This has to be run early, before the rest of the hardware is potentially
230 * probed/attached.
231 */
232 EARLY_DRIVER_MODULE(qcom_tcsr, simplebus, qcom_tcsr_driver, 0, 0,
233 BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
234 SIMPLEBUS_PNP_INFO(compat_data);
235