1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright 1997, Stefan Esser <se@freebsd.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/bus.h>
30 #include <sys/kernel.h>
31 #include <sys/module.h>
32
33 #include <dev/pci/pcivar.h>
34 #include <dev/pci/pcireg.h>
35
36 /*
37 * Provide a device to "eat" the host->pci bridge devices that show up
38 * on PCI buses and stop them showing up twice on the probes. This also
39 * stops them showing up as 'none' in pciconf -l. If the host bridge
40 * provides an AGP capability then we create a child agp device for the
41 * agp GART driver to attach to.
42 */
43 static int
pci_hostb_probe(device_t dev)44 pci_hostb_probe(device_t dev)
45 {
46 u_int32_t id;
47
48 id = pci_get_devid(dev);
49
50 switch (id) {
51 /* VIA VT82C596 Power Management Function */
52 case 0x30501106:
53 return (ENXIO);
54
55 default:
56 break;
57 }
58
59 if (pci_get_class(dev) == PCIC_BRIDGE &&
60 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
61 device_set_desc(dev, "Host to PCI bridge");
62 device_quiet(dev);
63 return (-10000);
64 }
65 return (ENXIO);
66 }
67
68 static int
pci_hostb_attach(device_t dev)69 pci_hostb_attach(device_t dev)
70 {
71
72 bus_identify_children(dev);
73
74 /*
75 * If AGP capabilities are present on this device, then create
76 * an AGP child.
77 */
78 if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
79 device_add_child(dev, "agp", DEVICE_UNIT_ANY);
80 bus_attach_children(dev);
81 return (0);
82 }
83
84 /* Bus interface. */
85
86 static int
pci_hostb_read_ivar(device_t dev,device_t child,int which,uintptr_t * result)87 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
88 {
89
90 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
91 }
92
93 static int
pci_hostb_write_ivar(device_t dev,device_t child,int which,uintptr_t value)94 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
95 {
96
97 return (EINVAL);
98 }
99
100 static struct resource *
pci_hostb_alloc_resource(device_t dev,device_t child,int type,int * rid,rman_res_t start,rman_res_t end,rman_res_t count,u_int flags)101 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
102 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
103 {
104
105 return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
106 }
107
108 static int
pci_hostb_release_resource(device_t dev,device_t child,struct resource * r)109 pci_hostb_release_resource(device_t dev, device_t child, struct resource *r)
110 {
111
112 return (bus_release_resource(dev, r));
113 }
114
115 /* PCI interface. */
116
117 static uint32_t
pci_hostb_read_config(device_t dev,device_t child,int reg,int width)118 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
119 {
120
121 return (pci_read_config(dev, reg, width));
122 }
123
124 static void
pci_hostb_write_config(device_t dev,device_t child,int reg,uint32_t val,int width)125 pci_hostb_write_config(device_t dev, device_t child, int reg,
126 uint32_t val, int width)
127 {
128
129 pci_write_config(dev, reg, val, width);
130 }
131
132 static int
pci_hostb_enable_busmaster(device_t dev,device_t child)133 pci_hostb_enable_busmaster(device_t dev, device_t child)
134 {
135
136 device_printf(dev, "child %s requested pci_enable_busmaster\n",
137 device_get_nameunit(child));
138 return (pci_enable_busmaster(dev));
139 }
140
141 static int
pci_hostb_disable_busmaster(device_t dev,device_t child)142 pci_hostb_disable_busmaster(device_t dev, device_t child)
143 {
144
145 device_printf(dev, "child %s requested pci_disable_busmaster\n",
146 device_get_nameunit(child));
147 return (pci_disable_busmaster(dev));
148 }
149
150 static int
pci_hostb_enable_io(device_t dev,device_t child,int space)151 pci_hostb_enable_io(device_t dev, device_t child, int space)
152 {
153
154 device_printf(dev, "child %s requested pci_enable_io\n",
155 device_get_nameunit(child));
156 return (pci_enable_io(dev, space));
157 }
158
159 static int
pci_hostb_disable_io(device_t dev,device_t child,int space)160 pci_hostb_disable_io(device_t dev, device_t child, int space)
161 {
162
163 device_printf(dev, "child %s requested pci_disable_io\n",
164 device_get_nameunit(child));
165 return (pci_disable_io(dev, space));
166 }
167
168 static int
pci_hostb_set_powerstate(device_t dev,device_t child,int state)169 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
170 {
171
172 device_printf(dev, "child %s requested pci_set_powerstate\n",
173 device_get_nameunit(child));
174 return (pci_set_powerstate(dev, state));
175 }
176
177 static int
pci_hostb_get_powerstate(device_t dev,device_t child)178 pci_hostb_get_powerstate(device_t dev, device_t child)
179 {
180
181 device_printf(dev, "child %s requested pci_get_powerstate\n",
182 device_get_nameunit(child));
183 return (pci_get_powerstate(dev));
184 }
185
186 static int
pci_hostb_assign_interrupt(device_t dev,device_t child)187 pci_hostb_assign_interrupt(device_t dev, device_t child)
188 {
189
190 device_printf(dev, "child %s requested pci_assign_interrupt\n",
191 device_get_nameunit(child));
192 return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
193 }
194
195 static int
pci_hostb_find_cap(device_t dev,device_t child,int capability,int * capreg)196 pci_hostb_find_cap(device_t dev, device_t child, int capability,
197 int *capreg)
198 {
199
200 return (pci_find_cap(dev, capability, capreg));
201 }
202
203 static int
pci_hostb_find_next_cap(device_t dev,device_t child,int capability,int start,int * capreg)204 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
205 int start, int *capreg)
206 {
207
208 return (pci_find_next_cap(dev, capability, start, capreg));
209 }
210
211 static int
pci_hostb_find_extcap(device_t dev,device_t child,int capability,int * capreg)212 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
213 int *capreg)
214 {
215
216 return (pci_find_extcap(dev, capability, capreg));
217 }
218
219 static int
pci_hostb_find_next_extcap(device_t dev,device_t child,int capability,int start,int * capreg)220 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
221 int start, int *capreg)
222 {
223
224 return (pci_find_next_extcap(dev, capability, start, capreg));
225 }
226
227 static int
pci_hostb_find_htcap(device_t dev,device_t child,int capability,int * capreg)228 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
229 int *capreg)
230 {
231
232 return (pci_find_htcap(dev, capability, capreg));
233 }
234
235 static int
pci_hostb_find_next_htcap(device_t dev,device_t child,int capability,int start,int * capreg)236 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
237 int start, int *capreg)
238 {
239
240 return (pci_find_next_htcap(dev, capability, start, capreg));
241 }
242
243 static device_method_t pci_hostb_methods[] = {
244 /* Device interface */
245 DEVMETHOD(device_probe, pci_hostb_probe),
246 DEVMETHOD(device_attach, pci_hostb_attach),
247 DEVMETHOD(device_shutdown, bus_generic_shutdown),
248 DEVMETHOD(device_suspend, bus_generic_suspend),
249 DEVMETHOD(device_resume, bus_generic_resume),
250
251 /* Bus interface */
252 DEVMETHOD(bus_read_ivar, pci_hostb_read_ivar),
253 DEVMETHOD(bus_write_ivar, pci_hostb_write_ivar),
254 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
255 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
256
257 DEVMETHOD(bus_alloc_resource, pci_hostb_alloc_resource),
258 DEVMETHOD(bus_release_resource, pci_hostb_release_resource),
259 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
260 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
261
262 /* PCI interface */
263 DEVMETHOD(pci_read_config, pci_hostb_read_config),
264 DEVMETHOD(pci_write_config, pci_hostb_write_config),
265 DEVMETHOD(pci_enable_busmaster, pci_hostb_enable_busmaster),
266 DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
267 DEVMETHOD(pci_enable_io, pci_hostb_enable_io),
268 DEVMETHOD(pci_disable_io, pci_hostb_disable_io),
269 DEVMETHOD(pci_get_powerstate, pci_hostb_get_powerstate),
270 DEVMETHOD(pci_set_powerstate, pci_hostb_set_powerstate),
271 DEVMETHOD(pci_assign_interrupt, pci_hostb_assign_interrupt),
272 DEVMETHOD(pci_find_cap, pci_hostb_find_cap),
273 DEVMETHOD(pci_find_next_cap, pci_hostb_find_next_cap),
274 DEVMETHOD(pci_find_extcap, pci_hostb_find_extcap),
275 DEVMETHOD(pci_find_next_extcap, pci_hostb_find_next_extcap),
276 DEVMETHOD(pci_find_htcap, pci_hostb_find_htcap),
277 DEVMETHOD(pci_find_next_htcap, pci_hostb_find_next_htcap),
278 { 0, 0 }
279 };
280
281 static driver_t pci_hostb_driver = {
282 "hostb",
283 pci_hostb_methods,
284 1,
285 };
286
287 DRIVER_MODULE(hostb, pci, pci_hostb_driver, 0, 0);
288