1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 IronPort Systems
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28 /*-
29 * Copyright (c) 2007 LSI Corp.
30 * Copyright (c) 2007 Rajesh Prabhakaran.
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
46 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
52 * SUCH DAMAGE.
53 */
54
55 #include <sys/cdefs.h>
56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */
57
58 #include "opt_mfi.h"
59
60 #include <sys/param.h>
61 #include <sys/bio.h>
62 #include <sys/bus.h>
63 #include <sys/conf.h>
64 #include <sys/eventhandler.h>
65 #include <sys/kernel.h>
66 #include <sys/lock.h>
67 #include <sys/module.h>
68 #include <sys/malloc.h>
69 #include <sys/mutex.h>
70 #include <sys/selinfo.h>
71 #include <sys/sysctl.h>
72 #include <sys/systm.h>
73 #include <sys/uio.h>
74
75 #include <machine/bus.h>
76 #include <machine/resource.h>
77 #include <sys/rman.h>
78
79 #include <dev/pci/pcireg.h>
80 #include <dev/pci/pcivar.h>
81
82 #include <dev/mfi/mfireg.h>
83 #include <dev/mfi/mfi_ioctl.h>
84 #include <dev/mfi/mfivar.h>
85
86 static int mfi_pci_probe(device_t);
87 static int mfi_pci_attach(device_t);
88 static int mfi_pci_detach(device_t);
89 static int mfi_pci_suspend(device_t);
90 static int mfi_pci_resume(device_t);
91 static void mfi_pci_free(struct mfi_softc *);
92
93 static device_method_t mfi_methods[] = {
94 DEVMETHOD(device_probe, mfi_pci_probe),
95 DEVMETHOD(device_attach, mfi_pci_attach),
96 DEVMETHOD(device_detach, mfi_pci_detach),
97 DEVMETHOD(device_suspend, mfi_pci_suspend),
98 DEVMETHOD(device_resume, mfi_pci_resume),
99
100 DEVMETHOD_END
101 };
102
103 static driver_t mfi_pci_driver = {
104 "mfi",
105 mfi_methods,
106 sizeof(struct mfi_softc)
107 };
108
109 static int mfi_msi = 1;
110 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0,
111 "Enable use of MSI interrupts");
112
113 static int mfi_mrsas_enable;
114 SYSCTL_INT(_hw_mfi, OID_AUTO, mrsas_enable, CTLFLAG_RDTUN, &mfi_mrsas_enable,
115 0, "Allow mrsas to take newer cards");
116
117 struct mfi_ident {
118 uint16_t vendor;
119 uint16_t device;
120 uint16_t subvendor;
121 uint16_t subdevice;
122 int flags;
123 const char *desc;
124 } mfi_identifiers[] = {
125 {0x1000, 0x005b, 0x1028, 0x1fc9, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H840 Adapter"},
126 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H810 Adapter"},
127 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Embedded"},
128 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Adapter"},
129 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (blades)"},
130 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (monolithics)"},
131 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"},
132 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"},
133 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"},
134 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"},
135 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"},
136 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"},
137 {0x1000, 0x005d, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_INVADER, "Invader"},
138 {0x1000, 0x005f, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_FURY, "Fury"},
139 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"},
140 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
141 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
142 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
143 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
144 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"},
145 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"},
146 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"},
147 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"},
148 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"},
149 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"},
150 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"},
151 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"},
152 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
153 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
154 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */
155 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */
156 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"},
157 {0, 0, 0, 0, 0, NULL}
158 };
159
160 DRIVER_MODULE(mfi, pci, mfi_pci_driver, 0, 0);
161 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mfi,
162 mfi_identifiers, nitems(mfi_identifiers) - 1);
163 MODULE_VERSION(mfi, 1);
164
165 static struct mfi_ident *
mfi_find_ident(device_t dev)166 mfi_find_ident(device_t dev)
167 {
168 struct mfi_ident *m;
169
170 for (m = mfi_identifiers; m->vendor != 0; m++) {
171 if ((m->vendor == pci_get_vendor(dev)) &&
172 (m->device == pci_get_device(dev)) &&
173 ((m->subvendor == pci_get_subvendor(dev)) ||
174 (m->subvendor == 0xffff)) &&
175 ((m->subdevice == pci_get_subdevice(dev)) ||
176 (m->subdevice == 0xffff)))
177 return (m);
178 }
179
180 return (NULL);
181 }
182
183 static int
mfi_pci_probe(device_t dev)184 mfi_pci_probe(device_t dev)
185 {
186 struct mfi_ident *id;
187
188 if ((id = mfi_find_ident(dev)) != NULL) {
189 device_set_desc(dev, id->desc);
190
191 /* give priority to mrsas if tunable set */
192 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable)
193 return (BUS_PROBE_LOW_PRIORITY);
194 else
195 return (BUS_PROBE_DEFAULT);
196 }
197 return (ENXIO);
198 }
199
200 static int
mfi_pci_attach(device_t dev)201 mfi_pci_attach(device_t dev)
202 {
203 struct mfi_softc *sc;
204 struct mfi_ident *m;
205 int count, error;
206
207 sc = device_get_softc(dev);
208 bzero(sc, sizeof(*sc));
209 sc->mfi_dev = dev;
210 m = mfi_find_ident(dev);
211 sc->mfi_flags = m->flags;
212
213 /* Ensure busmastering is enabled */
214 pci_enable_busmaster(dev);
215
216 /* Allocate PCI registers */
217 if ((sc->mfi_flags & MFI_FLAGS_1064R) ||
218 (sc->mfi_flags & MFI_FLAGS_1078)) {
219 /* 1068/1078: Memory mapped BAR is at offset 0x10 */
220 sc->mfi_regs_rid = PCIR_BAR(0);
221 }
222 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) ||
223 (sc->mfi_flags & MFI_FLAGS_SKINNY) ||
224 (sc->mfi_flags & MFI_FLAGS_TBOLT)) {
225 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */
226 sc->mfi_regs_rid = PCIR_BAR(1);
227 }
228 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev,
229 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) {
230 device_printf(dev, "Cannot allocate PCI registers\n");
231 return (ENXIO);
232 }
233 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource);
234 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource);
235
236 error = ENOMEM;
237
238 /* Allocate parent DMA tag */
239 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */
240 1, 0, /* algnmnt, boundary */
241 BUS_SPACE_MAXADDR, /* lowaddr */
242 BUS_SPACE_MAXADDR, /* highaddr */
243 NULL, NULL, /* filter, filterarg */
244 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
245 BUS_SPACE_UNRESTRICTED, /* nsegments */
246 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
247 0, /* flags */
248 NULL, NULL, /* lockfunc, lockarg */
249 &sc->mfi_parent_dmat)) {
250 device_printf(dev, "Cannot allocate parent DMA tag\n");
251 goto out;
252 }
253
254 /* Allocate IRQ resource. */
255 sc->mfi_irq_rid = 0;
256 count = 1;
257 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) {
258 device_printf(sc->mfi_dev, "Using MSI\n");
259 sc->mfi_irq_rid = 1;
260 }
261 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ,
262 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
263 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n");
264 error = EINVAL;
265 goto out;
266 }
267
268 error = mfi_attach(sc);
269 out:
270 if (error) {
271 mfi_free(sc);
272 mfi_pci_free(sc);
273 }
274
275 return (error);
276 }
277
278 static int
mfi_pci_detach(device_t dev)279 mfi_pci_detach(device_t dev)
280 {
281 struct mfi_softc *sc;
282 int error;
283
284 sc = device_get_softc(dev);
285
286 sx_xlock(&sc->mfi_config_lock);
287 mtx_lock(&sc->mfi_io_lock);
288 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) {
289 mtx_unlock(&sc->mfi_io_lock);
290 sx_xunlock(&sc->mfi_config_lock);
291 return (EBUSY);
292 }
293 sc->mfi_detaching = 1;
294 mtx_unlock(&sc->mfi_io_lock);
295
296 error = bus_generic_detach(sc->mfi_dev);
297 if (error != 0) {
298 sx_xunlock(&sc->mfi_config_lock);
299 return error;
300 }
301 sx_xunlock(&sc->mfi_config_lock);
302
303 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh);
304
305 mfi_shutdown(sc);
306 mfi_free(sc);
307 mfi_pci_free(sc);
308 return (0);
309 }
310
311 static void
mfi_pci_free(struct mfi_softc * sc)312 mfi_pci_free(struct mfi_softc *sc)
313 {
314
315 if (sc->mfi_regs_resource != NULL) {
316 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY,
317 sc->mfi_regs_rid, sc->mfi_regs_resource);
318 }
319 if (sc->mfi_irq_rid != 0)
320 pci_release_msi(sc->mfi_dev);
321
322 return;
323 }
324
325 static int
mfi_pci_suspend(device_t dev)326 mfi_pci_suspend(device_t dev)
327 {
328
329 return (EINVAL);
330 }
331
332 static int
mfi_pci_resume(device_t dev)333 mfi_pci_resume(device_t dev)
334 {
335
336 return (EINVAL);
337 }
338