1 /*-
2 * Copyright (c) 1998, 1999, 2001 Nicolas Souchu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * Power Management support for the Acer M15x3 chipsets
29 */
30
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/lock.h>
35 #include <sys/module.h>
36 #include <sys/mutex.h>
37 #include <sys/systm.h>
38
39 #include <machine/bus.h>
40 #include <machine/resource.h>
41 #include <sys/rman.h>
42
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcireg.h>
45
46 #include <dev/smbus/smbconf.h>
47 #include "smbus_if.h"
48
49 #define ALPM_DEBUG(x) if (alpm_debug) (x)
50
51 #ifdef DEBUG
52 static int alpm_debug = 1;
53 #else
54 static int alpm_debug = 0;
55 #endif
56
57 #define ACER_M1543_PMU_ID 0x710110b9
58
59 /*
60 * I/O registers offsets - the base address is programmed via the
61 * SMBBA PCI configuration register
62 */
63 #define SMBSTS 0x0 /* SMBus host/slave status register */
64 #define SMBCMD 0x1 /* SMBus host/slave command register */
65 #define SMBSTART 0x2 /* start to generate programmed cycle */
66 #define SMBHADDR 0x3 /* host address register */
67 #define SMBHDATA 0x4 /* data A register for host controller */
68 #define SMBHDATB 0x5 /* data B register for host controller */
69 #define SMBHBLOCK 0x6 /* block register for host controller */
70 #define SMBHCMD 0x7 /* command register for host controller */
71
72 /* SMBHADDR mask. */
73 #define LSB 0x1 /* XXX: Better name: Read/Write? */
74
75 /* SMBSTS masks */
76 #define TERMINATE 0x80
77 #define BUS_COLLI 0x40
78 #define DEVICE_ERR 0x20
79 #define SMI_I_STS 0x10
80 #define HST_BSY 0x08
81 #define IDL_STS 0x04
82 #define HSTSLV_STS 0x02
83 #define HSTSLV_BSY 0x01
84
85 /* SMBCMD masks */
86 #define SMB_BLK_CLR 0x80
87 #define T_OUT_CMD 0x08
88 #define ABORT_HOST 0x04
89
90 /* SMBus commands */
91 #define SMBQUICK 0x00
92 #define SMBSRBYTE 0x10 /* send/receive byte */
93 #define SMBWRBYTE 0x20 /* write/read byte */
94 #define SMBWRWORD 0x30 /* write/read word */
95 #define SMBWRBLOCK 0x40 /* write/read block */
96
97 /* PCI configuration registers and masks
98 */
99 #define COM 0x4
100 #define COM_ENABLE_IO 0x1
101
102 #define SMBBA PCIR_BAR(1)
103
104 #define ATPC 0x5b
105 #define ATPC_SMBCTRL 0x04 /* XX linux has this as 0x6 */
106
107 #define SMBHSI 0xe0
108 #define SMBHSI_SLAVE 0x2
109 #define SMBHSI_HOST 0x1
110
111 #define SMBHCBC 0xe2
112 #define SMBHCBC_CLOCK 0x70
113
114 #define SMBCLOCK_149K 0x0
115 #define SMBCLOCK_74K 0x20
116 #define SMBCLOCK_37K 0x40
117 #define SMBCLOCK_223K 0x80
118 #define SMBCLOCK_111K 0xa0
119 #define SMBCLOCK_55K 0xc0
120
121 struct alpm_softc {
122 int base;
123 struct resource *res;
124 bus_space_tag_t smbst;
125 bus_space_handle_t smbsh;
126 device_t smbus;
127 struct mtx lock;
128 };
129
130 #define ALPM_LOCK(alpm) mtx_lock(&(alpm)->lock)
131 #define ALPM_UNLOCK(alpm) mtx_unlock(&(alpm)->lock)
132 #define ALPM_LOCK_ASSERT(alpm) mtx_assert(&(alpm)->lock, MA_OWNED)
133
134 #define ALPM_SMBINB(alpm,register) \
135 (bus_space_read_1(alpm->smbst, alpm->smbsh, register))
136 #define ALPM_SMBOUTB(alpm,register,value) \
137 (bus_space_write_1(alpm->smbst, alpm->smbsh, register, value))
138
139 static int alpm_detach(device_t dev);
140
141 static int
alpm_probe(device_t dev)142 alpm_probe(device_t dev)
143 {
144
145 if (pci_get_devid(dev) == ACER_M1543_PMU_ID) {
146 device_set_desc(dev, "AcerLabs M15x3 Power Management Unit");
147
148 return (BUS_PROBE_DEFAULT);
149 }
150
151 return (ENXIO);
152 }
153
154 static int
alpm_attach(device_t dev)155 alpm_attach(device_t dev)
156 {
157 int rid;
158 u_int32_t l;
159 struct alpm_softc *alpm;
160
161 alpm = device_get_softc(dev);
162
163 /* Unlock SMBIO base register access */
164 l = pci_read_config(dev, ATPC, 1);
165 pci_write_config(dev, ATPC, l & ~ATPC_SMBCTRL, 1);
166
167 /*
168 * XX linux sets clock to 74k, should we?
169 l = pci_read_config(dev, SMBHCBC, 1);
170 l &= 0x1f;
171 l |= SMBCLOCK_74K;
172 pci_write_config(dev, SMBHCBC, l, 1);
173 */
174
175 if (bootverbose || alpm_debug) {
176 l = pci_read_config(dev, SMBHSI, 1);
177 device_printf(dev, "%s/%s",
178 (l & SMBHSI_HOST) ? "host":"nohost",
179 (l & SMBHSI_SLAVE) ? "slave":"noslave");
180
181 l = pci_read_config(dev, SMBHCBC, 1);
182 switch (l & SMBHCBC_CLOCK) {
183 case SMBCLOCK_149K:
184 printf(" 149K");
185 break;
186 case SMBCLOCK_74K:
187 printf(" 74K");
188 break;
189 case SMBCLOCK_37K:
190 printf(" 37K");
191 break;
192 case SMBCLOCK_223K:
193 printf(" 223K");
194 break;
195 case SMBCLOCK_111K:
196 printf(" 111K");
197 break;
198 case SMBCLOCK_55K:
199 printf(" 55K");
200 break;
201 default:
202 printf("unknown");
203 break;
204 }
205 printf("\n");
206 }
207
208 rid = SMBBA;
209 alpm->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
210 RF_ACTIVE);
211
212 if (alpm->res == NULL) {
213 device_printf(dev,"Could not allocate Bus space\n");
214 return (ENXIO);
215 }
216 alpm->smbst = rman_get_bustag(alpm->res);
217 alpm->smbsh = rman_get_bushandle(alpm->res);
218 mtx_init(&alpm->lock, device_get_nameunit(dev), "alpm", MTX_DEF);
219
220 /* attach the smbus */
221 alpm->smbus = device_add_child(dev, "smbus", DEVICE_UNIT_ANY);
222 if (alpm->smbus == NULL) {
223 alpm_detach(dev);
224 return (EINVAL);
225 }
226 bus_attach_children(dev);
227
228 return (0);
229 }
230
231 static int
alpm_detach(device_t dev)232 alpm_detach(device_t dev)
233 {
234 struct alpm_softc *alpm = device_get_softc(dev);
235 int error;
236
237 error = bus_generic_detach(dev);
238 if (error != 0)
239 return (error);
240
241 mtx_destroy(&alpm->lock);
242
243 if (alpm->res)
244 bus_release_resource(dev, SYS_RES_IOPORT, SMBBA, alpm->res);
245
246 return (0);
247 }
248
249 static int
alpm_callback(device_t dev,int index,void * data)250 alpm_callback(device_t dev, int index, void *data)
251 {
252 int error = 0;
253
254 switch (index) {
255 case SMB_REQUEST_BUS:
256 case SMB_RELEASE_BUS:
257 /* ok, bus allocation accepted */
258 break;
259 default:
260 error = EINVAL;
261 }
262
263 return (error);
264 }
265
266 static int
alpm_clear(struct alpm_softc * sc)267 alpm_clear(struct alpm_softc *sc)
268 {
269 ALPM_SMBOUTB(sc, SMBSTS, 0xff);
270 DELAY(10);
271
272 return (0);
273 }
274
275 #if 0
276 static int
277 alpm_abort(struct alpm_softc *sc)
278 {
279 ALPM_SMBOUTB(sc, SMBCMD, T_OUT_CMD | ABORT_HOST);
280
281 return (0);
282 }
283 #endif
284
285 static int
alpm_idle(struct alpm_softc * sc)286 alpm_idle(struct alpm_softc *sc)
287 {
288 u_char sts;
289
290 sts = ALPM_SMBINB(sc, SMBSTS);
291
292 ALPM_DEBUG(printf("alpm: idle? STS=0x%x\n", sts));
293
294 return (sts & IDL_STS);
295 }
296
297 /*
298 * Poll the SMBus controller
299 */
300 static int
alpm_wait(struct alpm_softc * sc)301 alpm_wait(struct alpm_softc *sc)
302 {
303 int count = 10000;
304 u_char sts = 0;
305 int error;
306
307 /* wait for command to complete and SMBus controller is idle */
308 while (count--) {
309 DELAY(10);
310 sts = ALPM_SMBINB(sc, SMBSTS);
311 if (sts & SMI_I_STS)
312 break;
313 }
314
315 ALPM_DEBUG(printf("alpm: STS=0x%x\n", sts));
316
317 error = SMB_ENOERR;
318
319 if (!count)
320 error |= SMB_ETIMEOUT;
321
322 if (sts & TERMINATE)
323 error |= SMB_EABORT;
324
325 if (sts & BUS_COLLI)
326 error |= SMB_ENOACK;
327
328 if (sts & DEVICE_ERR)
329 error |= SMB_EBUSERR;
330
331 if (error != SMB_ENOERR)
332 alpm_clear(sc);
333
334 return (error);
335 }
336
337 static int
alpm_quick(device_t dev,u_char slave,int how)338 alpm_quick(device_t dev, u_char slave, int how)
339 {
340 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
341 int error;
342
343 ALPM_LOCK(sc);
344 alpm_clear(sc);
345 if (!alpm_idle(sc)) {
346 ALPM_UNLOCK(sc);
347 return (EBUSY);
348 }
349
350 switch (how) {
351 case SMB_QWRITE:
352 ALPM_DEBUG(printf("alpm: QWRITE to 0x%x", slave));
353 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
354 break;
355 case SMB_QREAD:
356 ALPM_DEBUG(printf("alpm: QREAD to 0x%x", slave));
357 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
358 break;
359 default:
360 panic("%s: unknown QUICK command (%x)!", __func__,
361 how);
362 }
363 ALPM_SMBOUTB(sc, SMBCMD, SMBQUICK);
364 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
365
366 error = alpm_wait(sc);
367
368 ALPM_DEBUG(printf(", error=0x%x\n", error));
369 ALPM_UNLOCK(sc);
370
371 return (error);
372 }
373
374 static int
alpm_sendb(device_t dev,u_char slave,char byte)375 alpm_sendb(device_t dev, u_char slave, char byte)
376 {
377 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
378 int error;
379
380 ALPM_LOCK(sc);
381 alpm_clear(sc);
382 if (!alpm_idle(sc)) {
383 ALPM_UNLOCK(sc);
384 return (SMB_EBUSY);
385 }
386
387 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
388 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
389 ALPM_SMBOUTB(sc, SMBHDATA, byte);
390 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
391
392 error = alpm_wait(sc);
393
394 ALPM_DEBUG(printf("alpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
395 ALPM_UNLOCK(sc);
396
397 return (error);
398 }
399
400 static int
alpm_recvb(device_t dev,u_char slave,char * byte)401 alpm_recvb(device_t dev, u_char slave, char *byte)
402 {
403 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
404 int error;
405
406 ALPM_LOCK(sc);
407 alpm_clear(sc);
408 if (!alpm_idle(sc)) {
409 ALPM_UNLOCK(sc);
410 return (SMB_EBUSY);
411 }
412
413 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
414 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
415 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
416
417 if ((error = alpm_wait(sc)) == SMB_ENOERR)
418 *byte = ALPM_SMBINB(sc, SMBHDATA);
419
420 ALPM_DEBUG(printf("alpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
421 ALPM_UNLOCK(sc);
422
423 return (error);
424 }
425
426 static int
alpm_writeb(device_t dev,u_char slave,char cmd,char byte)427 alpm_writeb(device_t dev, u_char slave, char cmd, char byte)
428 {
429 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
430 int error;
431
432 ALPM_LOCK(sc);
433 alpm_clear(sc);
434 if (!alpm_idle(sc)) {
435 ALPM_UNLOCK(sc);
436 return (SMB_EBUSY);
437 }
438
439 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
440 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
441 ALPM_SMBOUTB(sc, SMBHDATA, byte);
442 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
443 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
444
445 error = alpm_wait(sc);
446
447 ALPM_DEBUG(printf("alpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
448 ALPM_UNLOCK(sc);
449
450 return (error);
451 }
452
453 static int
alpm_readb(device_t dev,u_char slave,char cmd,char * byte)454 alpm_readb(device_t dev, u_char slave, char cmd, char *byte)
455 {
456 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
457 int error;
458
459 ALPM_LOCK(sc);
460 alpm_clear(sc);
461 if (!alpm_idle(sc)) {
462 ALPM_UNLOCK(sc);
463 return (SMB_EBUSY);
464 }
465
466 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
467 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
468 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
469 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
470
471 if ((error = alpm_wait(sc)) == SMB_ENOERR)
472 *byte = ALPM_SMBINB(sc, SMBHDATA);
473
474 ALPM_DEBUG(printf("alpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
475 ALPM_UNLOCK(sc);
476
477 return (error);
478 }
479
480 static int
alpm_writew(device_t dev,u_char slave,char cmd,short word)481 alpm_writew(device_t dev, u_char slave, char cmd, short word)
482 {
483 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
484 int error;
485
486 ALPM_LOCK(sc);
487 alpm_clear(sc);
488 if (!alpm_idle(sc)) {
489 ALPM_UNLOCK(sc);
490 return (SMB_EBUSY);
491 }
492
493 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
494 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
495 ALPM_SMBOUTB(sc, SMBHDATA, word & 0x00ff);
496 ALPM_SMBOUTB(sc, SMBHDATB, (word & 0xff00) >> 8);
497 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
498 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
499
500 error = alpm_wait(sc);
501
502 ALPM_DEBUG(printf("alpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
503 ALPM_UNLOCK(sc);
504
505 return (error);
506 }
507
508 static int
alpm_readw(device_t dev,u_char slave,char cmd,short * word)509 alpm_readw(device_t dev, u_char slave, char cmd, short *word)
510 {
511 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
512 int error;
513 u_char high, low;
514
515 ALPM_LOCK(sc);
516 alpm_clear(sc);
517 if (!alpm_idle(sc)) {
518 ALPM_UNLOCK(sc);
519 return (SMB_EBUSY);
520 }
521
522 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
523 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
524 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
525 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
526
527 if ((error = alpm_wait(sc)) == SMB_ENOERR) {
528 low = ALPM_SMBINB(sc, SMBHDATA);
529 high = ALPM_SMBINB(sc, SMBHDATB);
530
531 *word = ((high & 0xff) << 8) | (low & 0xff);
532 }
533
534 ALPM_DEBUG(printf("alpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
535 ALPM_UNLOCK(sc);
536
537 return (error);
538 }
539
540 static int
alpm_bwrite(device_t dev,u_char slave,char cmd,u_char count,char * buf)541 alpm_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
542 {
543 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
544 u_char i;
545 int error;
546
547 if (count < 1 || count > 32)
548 return (SMB_EINVAL);
549
550 ALPM_LOCK(sc);
551 alpm_clear(sc);
552 if(!alpm_idle(sc)) {
553 ALPM_UNLOCK(sc);
554 return (SMB_EBUSY);
555 }
556
557 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
558
559 /* set the cmd and reset the
560 * 32-byte long internal buffer */
561 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
562
563 ALPM_SMBOUTB(sc, SMBHDATA, count);
564
565 /* fill the 32-byte internal buffer */
566 for (i = 0; i < count; i++) {
567 ALPM_SMBOUTB(sc, SMBHBLOCK, buf[i]);
568 DELAY(2);
569 }
570 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
571 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
572
573 error = alpm_wait(sc);
574
575 ALPM_DEBUG(printf("alpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
576 ALPM_UNLOCK(sc);
577
578 return (error);
579 }
580
581 static int
alpm_bread(device_t dev,u_char slave,char cmd,u_char * count,char * buf)582 alpm_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
583 {
584 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
585 u_char data, len, i;
586 int error;
587
588 if (*count < 1 || *count > 32)
589 return (SMB_EINVAL);
590
591 ALPM_LOCK(sc);
592 alpm_clear(sc);
593 if (!alpm_idle(sc)) {
594 ALPM_UNLOCK(sc);
595 return (SMB_EBUSY);
596 }
597
598 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
599
600 /* set the cmd and reset the
601 * 32-byte long internal buffer */
602 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
603
604 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
605 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
606
607 if ((error = alpm_wait(sc)) != SMB_ENOERR)
608 goto error;
609
610 len = ALPM_SMBINB(sc, SMBHDATA);
611
612 /* read the 32-byte internal buffer */
613 for (i = 0; i < len; i++) {
614 data = ALPM_SMBINB(sc, SMBHBLOCK);
615 if (i < *count)
616 buf[i] = data;
617 DELAY(2);
618 }
619 *count = len;
620
621 error:
622 ALPM_DEBUG(printf("alpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, *count, cmd, error));
623 ALPM_UNLOCK(sc);
624
625 return (error);
626 }
627
628 static device_method_t alpm_methods[] = {
629 /* device interface */
630 DEVMETHOD(device_probe, alpm_probe),
631 DEVMETHOD(device_attach, alpm_attach),
632 DEVMETHOD(device_detach, alpm_detach),
633
634 /* smbus interface */
635 DEVMETHOD(smbus_callback, alpm_callback),
636 DEVMETHOD(smbus_quick, alpm_quick),
637 DEVMETHOD(smbus_sendb, alpm_sendb),
638 DEVMETHOD(smbus_recvb, alpm_recvb),
639 DEVMETHOD(smbus_writeb, alpm_writeb),
640 DEVMETHOD(smbus_readb, alpm_readb),
641 DEVMETHOD(smbus_writew, alpm_writew),
642 DEVMETHOD(smbus_readw, alpm_readw),
643 DEVMETHOD(smbus_bwrite, alpm_bwrite),
644 DEVMETHOD(smbus_bread, alpm_bread),
645 { 0, 0 }
646 };
647
648 static driver_t alpm_driver = {
649 "alpm",
650 alpm_methods,
651 sizeof(struct alpm_softc)
652 };
653
654 DRIVER_MODULE(alpm, pci, alpm_driver, 0, 0);
655 DRIVER_MODULE(smbus, alpm, smbus_driver, 0, 0);
656 MODULE_DEPEND(alpm, pci, 1, 1, 1);
657 MODULE_DEPEND(alpm, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
658 MODULE_VERSION(alpm, 1);
659