1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34#include <machine/asmacros.h> 35#include <machine/specialreg.h> 36 37#include "assym.inc" 38#include "opt_sched.h" 39 40/*****************************************************************************/ 41/* Scheduling */ 42/*****************************************************************************/ 43 44 .text 45 46/* 47 * cpu_throw() 48 * 49 * This is the second half of cpu_switch(). It is used when the current 50 * thread is either a dummy or slated to die, and we no longer care 51 * about its state. This is only a slight optimization and is probably 52 * not worth it anymore. Note that we need to clear the pm_active bits so 53 * we do need the old proc if it still exists. 54 * %rdi = oldtd 55 * %rsi = newtd 56 */ 57ENTRY(cpu_throw) 58 movq %rsi,%r12 59 movq %rsi,%rdi 60 call pmap_activate_sw 61 jmp sw1 62END(cpu_throw) 63 64/* 65 * cpu_switch(old, new, mtx) 66 * 67 * Save the current thread state, then select the next thread to run 68 * and load its state. 69 * %rdi = oldtd 70 * %rsi = newtd 71 * %rdx = mtx 72 */ 73ENTRY(cpu_switch) 74 /* Switch to new thread. First, save context. */ 75 leaq TD_MD_PCB(%rdi),%r8 76 77 movq (%rsp),%rax /* Hardware registers */ 78 movq %r15,PCB_R15(%r8) 79 movq %r14,PCB_R14(%r8) 80 movq %r13,PCB_R13(%r8) 81 movq %r12,PCB_R12(%r8) 82 movq %rbp,PCB_RBP(%r8) 83 movq %rsp,PCB_RSP(%r8) 84 movq %rbx,PCB_RBX(%r8) 85 movq %rax,PCB_RIP(%r8) 86 87 testl $PCB_FULL_IRET,PCB_FLAGS(%r8) 88 jnz 2f 89 orl $PCB_FULL_IRET,PCB_FLAGS(%r8) 90 testl $TDP_KTHREAD,TD_PFLAGS(%rdi) 91 jnz 2f 92 testb $CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip) 93 jz 2f 94 rdfsbase %rax 95 movq %rax,PCB_FSBASE(%r8) 96 movq %rdx,%r12 97 movl $MSR_KGSBASE,%ecx /* Read user gs base */ 98 rdmsr 99 shlq $32,%rdx 100 orq %rdx,%rax 101 movq %rax,PCB_GSBASE(%r8) 102 movq %r12,%rdx 103 1042: 105 testl $PCB_DBREGS,PCB_FLAGS(%r8) 106 jnz store_dr /* static predict not taken */ 107done_store_dr: 108 109 /* have we used fp, and need a save? */ 110 cmpq %rdi,PCPU(FPCURTHREAD) 111 jne ctx_switch_fpusave_done 112 movq PCB_SAVEFPU(%r8),%r9 113 clts 114 cmpl $0,use_xsave(%rip) 115 jne 1f 116 fxsave (%r9) 117 jmp ctx_switch_fpusave_done 1181: movq %rdx,%rcx 119 movl xsave_mask,%eax 120 movl xsave_mask+4,%edx 121 testl $PCB_32BIT,PCB_FLAGS(%r8) 122 jne ctx_switch_xsave32 123 .globl ctx_switch_xsave 124ctx_switch_xsave: 125 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */ 126 xsave64 (%r9) 127ctx_switch_xsave_done: 128 movq %rcx,%rdx 129ctx_switch_fpusave_done: 130 /* Save is done. Now fire up new thread. Leave old vmspace. */ 131 movq %rsi,%r12 132 movq %rdi,%r13 133 movq %rdx,%r15 134 movq %rsi,%rdi 135 callq pmap_activate_sw 136 movq %r15,TD_LOCK(%r13) /* Release the old thread */ 137sw1: 138 leaq TD_MD_PCB(%r12),%r8 139#if defined(SCHED_ULE) && defined(SMP) 140 movq $blocked_lock, %rdx 141 movq TD_LOCK(%r12),%rcx 142 cmpq %rcx, %rdx 143 je sw1wait 144sw1cont: 145#endif 146 /* 147 * At this point, we've switched address spaces and are ready 148 * to load up the rest of the next context. 149 */ 150 151 /* Skip loading LDT and user fsbase/gsbase for kthreads */ 152 testl $TDP_KTHREAD,TD_PFLAGS(%r12) 153 jnz do_kthread 154 155 /* 156 * Load ldt register 157 */ 158 movq TD_PROC(%r12),%rcx 159 cmpq $0, P_MD+MD_LDT(%rcx) 160 jne do_ldt 161 xorl %eax,%eax 162ld_ldt: lldt %ax 163 164 /* Restore fs base in GDT */ 165 movl PCB_FSBASE(%r8),%eax 166 movq PCPU(FS32P),%rdx 167 movw %ax,2(%rdx) 168 shrl $16,%eax 169 movb %al,4(%rdx) 170 shrl $8,%eax 171 movb %al,7(%rdx) 172 173 /* Restore gs base in GDT */ 174 movl PCB_GSBASE(%r8),%eax 175 movq PCPU(GS32P),%rdx 176 movw %ax,2(%rdx) 177 shrl $16,%eax 178 movb %al,4(%rdx) 179 shrl $8,%eax 180 movb %al,7(%rdx) 181 182do_kthread: 183 /* Do we need to reload tss ? */ 184 movq PCPU(TSSP),%rax 185 movq PCB_TSSP(%r8),%rdx 186 movq PCPU(PRVSPACE),%r13 187 addq $PC_COMMONTSS,%r13 188 testq %rdx,%rdx 189 cmovzq %r13,%rdx 190 cmpq %rax,%rdx 191 jne do_tss 192done_tss: 193 movq TD_MD_STACK_BASE(%r12),%r9 194 movq %r9,PCPU(RSP0) 195 movq %r8,PCPU(CURPCB) 196 movq PCPU(PTI_RSP0),%rax 197 cmpq $~0,PCPU(UCR3) 198 cmove %r9,%rax 199 movq %rax,TSS_RSP0(%rdx) 200 movq %r12,PCPU(CURTHREAD) /* into next thread */ 201 202 /* Test if debug registers should be restored. */ 203 testl $PCB_DBREGS,PCB_FLAGS(%r8) 204 jnz load_dr /* static predict not taken */ 205done_load_dr: 206 207 /* Restore context. */ 208 movq PCB_R15(%r8),%r15 209 movq PCB_R14(%r8),%r14 210 movq PCB_R13(%r8),%r13 211 movq PCB_R12(%r8),%r12 212 movq PCB_RBP(%r8),%rbp 213 movq PCB_RSP(%r8),%rsp 214 movq PCB_RBX(%r8),%rbx 215 movq PCB_RIP(%r8),%rax 216 movq %rax,(%rsp) 217 movq PCPU(CURTHREAD),%rdi 218 call fpu_activate_sw 219 cmpb $0,cpu_flush_rsb_ctxsw(%rip) 220 jne rsb_flush 221 ret 222 223 /* 224 * We order these strangely for several reasons. 225 * 1: I wanted to use static branch prediction hints 226 * 2: Most athlon64/opteron cpus don't have them. They define 227 * a forward branch as 'predict not taken'. Intel cores have 228 * the 'rep' prefix to invert this. 229 * So, to make it work on both forms of cpu we do the detour. 230 * We use jumps rather than call in order to avoid the stack. 231 */ 232 233store_dr: 234 movq %dr7,%rax /* yes, do the save */ 235 movq %dr0,%r15 236 movq %dr1,%r14 237 movq %dr2,%r13 238 movq %dr3,%r12 239 movq %dr6,%r11 240 movq %r15,PCB_DR0(%r8) 241 movq %r14,PCB_DR1(%r8) 242 movq %r13,PCB_DR2(%r8) 243 movq %r12,PCB_DR3(%r8) 244 movq %r11,PCB_DR6(%r8) 245 movq %rax,PCB_DR7(%r8) 246 andq $0x0000fc00, %rax /* disable all watchpoints */ 247 movq %rax,%dr7 248 jmp done_store_dr 249 250load_dr: 251 movq %dr7,%rax 252 movq PCB_DR0(%r8),%r15 253 movq PCB_DR1(%r8),%r14 254 movq PCB_DR2(%r8),%r13 255 movq PCB_DR3(%r8),%r12 256 movq PCB_DR6(%r8),%r11 257 movq PCB_DR7(%r8),%rcx 258 movq %r15,%dr0 259 movq %r14,%dr1 260 /* Preserve reserved bits in %dr7 */ 261 andq $0x0000fc00,%rax 262 andq $~0x0000fc00,%rcx 263 movq %r13,%dr2 264 movq %r12,%dr3 265 orq %rcx,%rax 266 movq %r11,%dr6 267 movq %rax,%dr7 268 jmp done_load_dr 269 270do_tss: movq %rdx,PCPU(TSSP) 271 movq %rdx,%rcx 272 movq PCPU(TSS),%rax 273 movw %cx,2(%rax) 274 shrq $16,%rcx 275 movb %cl,4(%rax) 276 shrq $8,%rcx 277 movb %cl,7(%rax) 278 shrq $8,%rcx 279 movl %ecx,8(%rax) 280 movb $0x89,5(%rax) /* unset busy */ 281 movl $TSSSEL,%eax 282 ltr %ax 283 jmp done_tss 284 285do_ldt: movq PCPU(LDT),%rax 286 movq P_MD+MD_LDT_SD(%rcx),%rdx 287 movq %rdx,(%rax) 288 movq P_MD+MD_LDT_SD+8(%rcx),%rdx 289 movq %rdx,8(%rax) 290 movl $LDTSEL,%eax 291 jmp ld_ldt 292 293 .globl ctx_switch_xsave32 294ctx_switch_xsave32: 295 xsave (%r9) 296 jmp ctx_switch_xsave_done 297END(cpu_switch) 298 299/* 300 * savectx(pcb) 301 * Update pcb, saving current processor state. 302 */ 303ENTRY(savectx) 304 /* Save caller's return address. */ 305 movq (%rsp),%rax 306 movq %rax,PCB_RIP(%rdi) 307 308 movq %rbx,PCB_RBX(%rdi) 309 movq %rsp,PCB_RSP(%rdi) 310 movq %rbp,PCB_RBP(%rdi) 311 movq %r12,PCB_R12(%rdi) 312 movq %r13,PCB_R13(%rdi) 313 movq %r14,PCB_R14(%rdi) 314 movq %r15,PCB_R15(%rdi) 315 316 movq %cr0,%rax 317 movq %rax,PCB_CR0(%rdi) 318 movq %cr2,%rax 319 movq %rax,PCB_CR2(%rdi) 320 movq %cr3,%rax 321 movq %rax,PCB_CR3(%rdi) 322 movq %cr4,%rax 323 movq %rax,PCB_CR4(%rdi) 324 325 movq %dr0,%rax 326 movq %rax,PCB_DR0(%rdi) 327 movq %dr1,%rax 328 movq %rax,PCB_DR1(%rdi) 329 movq %dr2,%rax 330 movq %rax,PCB_DR2(%rdi) 331 movq %dr3,%rax 332 movq %rax,PCB_DR3(%rdi) 333 movq %dr6,%rax 334 movq %rax,PCB_DR6(%rdi) 335 movq %dr7,%rax 336 movq %rax,PCB_DR7(%rdi) 337 338 movl $MSR_FSBASE,%ecx 339 rdmsr 340 movl %eax,PCB_FSBASE(%rdi) 341 movl %edx,PCB_FSBASE+4(%rdi) 342 movl $MSR_GSBASE,%ecx 343 rdmsr 344 movl %eax,PCB_GSBASE(%rdi) 345 movl %edx,PCB_GSBASE+4(%rdi) 346 movl $MSR_KGSBASE,%ecx 347 rdmsr 348 movl %eax,PCB_KGSBASE(%rdi) 349 movl %edx,PCB_KGSBASE+4(%rdi) 350 movl $MSR_EFER,%ecx 351 rdmsr 352 movl %eax,PCB_EFER(%rdi) 353 movl %edx,PCB_EFER+4(%rdi) 354 movl $MSR_STAR,%ecx 355 rdmsr 356 movl %eax,PCB_STAR(%rdi) 357 movl %edx,PCB_STAR+4(%rdi) 358 movl $MSR_LSTAR,%ecx 359 rdmsr 360 movl %eax,PCB_LSTAR(%rdi) 361 movl %edx,PCB_LSTAR+4(%rdi) 362 movl $MSR_CSTAR,%ecx 363 rdmsr 364 movl %eax,PCB_CSTAR(%rdi) 365 movl %edx,PCB_CSTAR+4(%rdi) 366 movl $MSR_SF_MASK,%ecx 367 rdmsr 368 movl %eax,PCB_SFMASK(%rdi) 369 movl %edx,PCB_SFMASK+4(%rdi) 370 371 sgdt PCB_GDT(%rdi) 372 sidt PCB_IDT(%rdi) 373 sldt PCB_LDT(%rdi) 374 str PCB_TR(%rdi) 375 376 movl $1,%eax 377 ret 378END(savectx) 379 380/* 381 * resumectx(pcb) 382 * Resuming processor state from pcb. 383 */ 384ENTRY(resumectx) 385 /* Switch to KPML5/4phys. */ 386 movq KPML4phys,%rax 387 movq KPML5phys,%rcx 388 cmpl $0, la57 389 cmovne %rcx, %rax 390 movq %rax,%cr3 391 392 /* Force kernel segment registers. */ 393 movl $KDSEL,%eax 394 movw %ax,%ds 395 movw %ax,%es 396 movw %ax,%ss 397 movl $KUF32SEL,%eax 398 movw %ax,%fs 399 movl $KUG32SEL,%eax 400 movw %ax,%gs 401 402 movl $MSR_FSBASE,%ecx 403 movl PCB_FSBASE(%rdi),%eax 404 movl 4 + PCB_FSBASE(%rdi),%edx 405 wrmsr 406 movl $MSR_GSBASE,%ecx 407 movl PCB_GSBASE(%rdi),%eax 408 movl 4 + PCB_GSBASE(%rdi),%edx 409 wrmsr 410 movl $MSR_KGSBASE,%ecx 411 movl PCB_KGSBASE(%rdi),%eax 412 movl 4 + PCB_KGSBASE(%rdi),%edx 413 wrmsr 414 415 /* Restore EFER one more time. */ 416 movl $MSR_EFER,%ecx 417 movl PCB_EFER(%rdi),%eax 418 wrmsr 419 420 /* Restore fast syscall stuff. */ 421 movl $MSR_STAR,%ecx 422 movl PCB_STAR(%rdi),%eax 423 movl 4 + PCB_STAR(%rdi),%edx 424 wrmsr 425 movl $MSR_LSTAR,%ecx 426 movl PCB_LSTAR(%rdi),%eax 427 movl 4 + PCB_LSTAR(%rdi),%edx 428 wrmsr 429 movl $MSR_CSTAR,%ecx 430 movl PCB_CSTAR(%rdi),%eax 431 movl 4 + PCB_CSTAR(%rdi),%edx 432 wrmsr 433 movl $MSR_SF_MASK,%ecx 434 movl PCB_SFMASK(%rdi),%eax 435 wrmsr 436 437 /* Restore CR0, CR2, CR4 and CR3. */ 438 movq PCB_CR0(%rdi),%rax 439 movq %rax,%cr0 440 movq PCB_CR2(%rdi),%rax 441 movq %rax,%cr2 442 movq PCB_CR4(%rdi),%rax 443 movq %rax,%cr4 444 movq PCB_CR3(%rdi),%rax 445 movq %rax,%cr3 446 447 /* Restore descriptor tables. */ 448 lidt PCB_IDT(%rdi) 449 lldt PCB_LDT(%rdi) 450 451#define SDT_SYSTSS 9 452#define SDT_SYSBSY 11 453 454 /* Clear "task busy" bit and reload TR. */ 455 movq PCPU(TSS),%rax 456 andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax) 457 movw PCB_TR(%rdi),%ax 458 ltr %ax 459 460#undef SDT_SYSTSS 461#undef SDT_SYSBSY 462 463 /* Restore debug registers. */ 464 movq PCB_DR0(%rdi),%rax 465 movq %rax,%dr0 466 movq PCB_DR1(%rdi),%rax 467 movq %rax,%dr1 468 movq PCB_DR2(%rdi),%rax 469 movq %rax,%dr2 470 movq PCB_DR3(%rdi),%rax 471 movq %rax,%dr3 472 movq PCB_DR6(%rdi),%rax 473 movq %rax,%dr6 474 movq PCB_DR7(%rdi),%rax 475 movq %rax,%dr7 476 477 /* Restore other callee saved registers. */ 478 movq PCB_R15(%rdi),%r15 479 movq PCB_R14(%rdi),%r14 480 movq PCB_R13(%rdi),%r13 481 movq PCB_R12(%rdi),%r12 482 movq PCB_RBP(%rdi),%rbp 483 movq PCB_RSP(%rdi),%rsp 484 movq PCB_RBX(%rdi),%rbx 485 486 /* Restore return address. */ 487 movq PCB_RIP(%rdi),%rax 488 movq %rax,(%rsp) 489 490 xorl %eax,%eax 491 ret 492END(resumectx) 493 494/* Wait for the new thread to become unblocked */ 495#if defined(SCHED_ULE) && defined(SMP) 496sw1wait: 4971: 498 pause 499 movq TD_LOCK(%r12),%rcx 500 cmpq %rcx, %rdx 501 je 1b 502 jmp sw1cont 503#endif 504