1MAX77620 Power management IC from Maxim Semiconductor. 2 3Required properties: 4------------------- 5- compatible: Must be one of 6 "maxim,max77620" 7 "maxim,max20024" 8 "maxim,max77663" 9- reg: I2C device address. 10 11Optional properties: 12------------------- 13- interrupts: The interrupt on the parent the controller is 14 connected to. 15- interrupt-controller: Marks the device node as an interrupt controller. 16- #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 18 IRQ numbers for different interrupt source of MAX77620 19 are defined at dt-bindings/mfd/max77620.h. 20 21- system-power-controller: Indicates that this PMIC is controlling the 22 system power, see [1] for more details. 23 24[1] Documentation/devicetree/bindings/power/power-controller.txt 25 26Optional subnodes and their properties: 27======================================= 28 29Flexible power sequence configurations: 30-------------------------------------- 31The Flexible Power Sequencer (FPS) allows each regulator to power up under 32hardware or software control. Additionally, each regulator can power on 33independently or among a group of other regulators with an adjustable power-up 34and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed 35to be part of a sequence allowing external regulators to be sequenced along 36with internal regulators. 32KHz clock can be programmed to be part of a 37sequence. 38 39The flexible sequencing structure consists of two hardware enable inputs 40(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2. 41Each master sequencing timer is programmable through its configuration 42register to have a hardware enable source (EN1 or EN2) or a software enable 43source (SW). When enabled/disabled, the master sequencing timer generates 44eight sequencing events on different time periods called slots. The time 45period between each event is programmable within the configuration register. 46Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power 47sequence slave register which allows its enable source to be specified as 48a flexible power sequencer timer or a software bit. When a FPS source of 49regulators, GPIOs and clocks specifies the enable source to be a flexible 50power sequencer, the power up and power down delays can be specified in 51the regulators, GPIOs and clocks flexible power sequencer configuration 52registers. 53 54When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz 55clock are set into following state at the sequencing event that 56corresponds to its flexible sequencer configuration register. 57 Sleep state: In this state, regulators, GPIOs 58 and 32KHz clock get disabled at 59 the sequencing event. 60 Global Low Power Mode (GLPM): In this state, regulators are set in 61 low power mode at the sequencing event. 62 63The configuration parameters of FPS is provided through sub-node "fps" 64and their child for FPS specific. The child node name for FPS are "fps0", 65"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively. 66 67The FPS configurations like FPS source, power up and power down slots for 68regulators, GPIOs and 32kHz clocks are provided in their respective 69configuration nodes which is explained in respective sub-system DT 70binding document. 71 72There is need for different FPS configuration parameters based on system 73state like when system state changed from active to suspend or active to 74power off (shutdown). 75 76Optional properties: 77------------------- 78-maxim,fps-event-source: u32, FPS event source like external 79 hardware input to PMIC i.e. EN0, EN1 or 80 software (SW). 81 The macros are defined on 82 dt-bindings/mfd/max77620.h 83 for different control source. 84 - MAX77620_FPS_EVENT_SRC_EN0 85 for hardware input pin EN0. 86 - MAX77620_FPS_EVENT_SRC_EN1 87 for hardware input pin EN1. 88 - MAX77620_FPS_EVENT_SRC_SW 89 for software control. 90 91-maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds 92 when system enters in to shutdown 93 state. 94 95-maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds 96 when system enters in to suspend state. 97 98-maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS 99 event cleared (set to LOW) whether it 100 should go to sleep state or low-power 101 state. Following are valid values: 102 - MAX77620_FPS_INACTIVE_STATE_SLEEP 103 to set the PMIC state to sleep. 104 - MAX77620_FPS_INACTIVE_STATE_LOW_POWER 105 to set the PMIC state to low 106 power. 107 Absence of this property or other value 108 will not change device state when FPS 109 event get cleared. 110 111Here supported time periods by device in microseconds are as follows: 112MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds. 113MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds. 114MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds. 115 116-maxim,power-ok-control: configure map power ok bit 117 1: Enables POK(Power OK) to control nRST_IO and GPIO1 118 POK function. 119 0: Disables POK control. 120 if property missing, do not configure MPOK bit. 121 If POK mapping is enabled for GPIO1/nRST_IO then, 122 GPIO1/nRST_IO pins are HIGH only if all rails 123 that have POK control enabled are HIGH. 124 If any of the rails goes down(which are enabled for POK 125 control) then, GPIO1/nRST_IO goes LOW. 126 this property is valid for max20024 only. 127 128For DT binding details of different sub modules like GPIO, pincontrol, 129regulator, power, please refer respective device-tree binding document 130under their respective sub-system directories. 131 132Example: 133-------- 134#include <dt-bindings/mfd/max77620.h> 135 136max77620@3c { 137 compatible = "maxim,max77620"; 138 reg = <0x3c>; 139 140 interrupt-parent = <&intc>; 141 interrupts = <0 86 IRQ_TYPE_NONE>; 142 143 interrupt-controller; 144 #interrupt-cells = <2>; 145 146 fps { 147 fps0 { 148 maxim,shutdown-fps-time-period-us = <1280>; 149 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 150 }; 151 152 fps1 { 153 maxim,shutdown-fps-time-period-us = <1280>; 154 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 155 }; 156 157 fps2 { 158 maxim,shutdown-fps-time-period-us = <1280>; 159 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>; 160 }; 161 }; 162}; 163