1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 1997 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _ATA_FSM_H 28 #define _ATA_FSM_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 /* 38 * 39 * The interrupt reason can be interpreted from other bits as follows: 40 * 41 * IO CoD DRQ 42 * -- --- --- 43 * 0 0 1 == 1 Data to device 44 * 0 1 0 == 2 Idle 45 * 0 1 1 == 3 Send ATAPI CDB to device 46 * 1 0 1 == 5 Data from device 47 * 1 1 0 == 6 Status ready 48 * 1 1 1 == 7 Future use 49 * 50 */ 51 52 /* 53 * This macro encodes the interrupt reason into a one byte 54 * event code which is used to index the FSM tables 55 */ 56 #define ATAPI_EVENT(drq, intr) \ 57 (((unsigned char)((drq) & ATS_DRQ) >> 3) \ 58 | (((intr) & (ATI_IO | ATI_COD)) << 1)) 59 60 /* 61 * These are the names for the encoded ATAPI events 62 */ 63 #define ATAPI_EVENT_0 0 64 #define ATAPI_EVENT_IDLE ATAPI_EVENT(0, ATI_COD) 65 #define ATAPI_EVENT_2 2 66 #define ATAPI_EVENT_STATUS ATAPI_EVENT(0, ATI_IO | ATI_COD) 67 #define ATAPI_EVENT_PIO_OUT ATAPI_EVENT(ATS_DRQ, 0) 68 #define ATAPI_EVENT_CDB ATAPI_EVENT(ATS_DRQ, ATI_COD) 69 #define ATAPI_EVENT_PIO_IN ATAPI_EVENT(ATS_DRQ, ATI_IO) 70 #define ATAPI_EVENT_UNKNOWN ATAPI_EVENT(ATS_DRQ, (ATI_IO | ATI_COD)) 71 72 #define ATAPI_NEVENTS 8 73 74 /* 75 * Actions for the ATAPI PIO FSM 76 * 77 */ 78 79 enum { 80 A_UNK, /* invalid event detected */ 81 A_NADA, /* do nothing */ 82 A_CDB, /* send the CDB */ 83 A_IN, /* transfer data out to the device */ 84 A_OUT, /* transfer data in from the device */ 85 A_IDLE, /* unexpected idle phase */ 86 A_RE, /* read the error code register */ 87 A_REX /* alternate read the error code register */ 88 }; 89 90 /* 91 * States for the ATAPI PIO FSM 92 */ 93 94 enum { 95 S_IDLE, /* idle or fatal error state */ 96 S_CMD, /* command byte sent */ 97 S_CDB, /* CDB sent */ 98 S_IN, /* transferring data in from device */ 99 S_OUT, /* transferring data out to device */ 100 S_DMA, /* dma transfer active */ 101 102 ATAPI_NSTATES 103 }; 104 105 #define S_X S_IDLE /* alias for idle */ 106 107 /* 108 * controller and device functions 109 */ 110 enum { 111 ATA_FSM_START0, 112 ATA_FSM_START1, 113 ATA_FSM_INTR, 114 ATA_FSM_FINI, 115 ATA_FSM_RESET, 116 117 ATA_CTLR_NFUNCS 118 }; 119 120 121 /* 122 * FSM return codes 123 */ 124 enum { 125 ATA_FSM_RC_OKAY, 126 ATA_FSM_RC_BUSY, 127 ATA_FSM_RC_INTR, 128 ATA_FSM_RC_FINI 129 }; 130 131 /* 132 * states for the controller FSM 133 */ 134 enum { 135 AS_IDLE, 136 AS_ACTIVE0, 137 AS_ACTIVE1, 138 139 ATA_CTLR_NSTATES 140 }; 141 142 /* 143 * actions for the controller FSM 144 */ 145 enum { 146 AC_NADA, 147 AC_START, 148 AC_INTR, 149 AC_FINI, 150 AC_BUSY, 151 AC_RESET_I, 152 AC_RESET_A 153 }; 154 155 #ifdef __cplusplus 156 } 157 #endif 158 159 #endif /* _ATA_FSM_H */ 160