xref: /titanic_41/usr/src/uts/intel/io/dktp/controller/ata/ata_cmd.h (revision 2df1fe9ca32bb227b9158c67f5c00b54c20b10fd)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _ATA_CMD_H
28 #define	_ATA_CMD_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Common ATA commands.
38  */
39 #define	ATC_DIAG	0x90    /* diagnose command 			*/
40 #define	ATC_RECAL	0x10	/* restore cmd, bottom 4 bits step rate */
41 #define	ATC_FORMAT	0x50	/* format track command 		*/
42 #define	ATC_SET_FEAT	0xef	/* set features				*/
43 #define	ATC_IDLE_IMMED	0xe1	/* idle immediate			*/
44 #define	ATC_STANDBY_IM	0xe0	/* standby immediate			*/
45 #define	ATC_DOOR_LOCK	0xde	/* door lock				*/
46 #define	ATC_DOOR_UNLOCK	0xdf	/* door unlock				*/
47 #define	ATC_IDLE	0xe3	/* idle					*/
48 #define	ATC_SLEEP	0xe6	/* sleep				*/
49 
50 /*
51  * ATA/ATAPI-4 disk commands.
52  */
53 #define	ATC_DEVICE_RESET	0x08    /* ATAPI device reset */
54 #define	ATC_EJECT		0xed	/* media eject */
55 #define	ATC_FLUSH_CACHE		0xe7	/* flush write-cache */
56 #define	ATC_ID_DEVICE		0xec    /* IDENTIFY DEVICE */
57 #define	ATC_ID_PACKET_DEVICE	0xa1	/* ATAPI identify packet device */
58 #define	ATC_INIT_DEVPARMS	0x91	/* initialize device parameters */
59 #define	ATC_PACKET		0xa0	/* ATAPI packet */
60 #define	ATC_RDMULT		0xc4	/* read multiple */
61 #define	ATC_RDSEC		0x20    /* read sector */
62 #define	ATC_RDVER		0x40	/* read verify */
63 #define	ATC_READ_DMA		0xc8	/* read (multiple) w/DMA */
64 #define	ATC_SEEK		0x70    /* seek */
65 #define	ATC_SERVICE		0xa2	/* queued/overlap service */
66 #define	ATC_SETMULT		0xc6	/* set multiple mode */
67 #define	ATC_WRITE_DMA		0xca	/* write (multiple) w/DMA */
68 #define	ATC_WRMULT		0xc5	/* write multiple */
69 #define	ATC_WRSEC		0x30    /* write sector */
70 
71 /*
72  * Low bits for Read/Write commands...
73  */
74 #define	ATCM_ECCRETRY	0x01    /* Enable ECC and RETRY by controller 	*/
75 				/* enabled if bit is CLEARED!!! 	*/
76 #define	ATCM_LONGMODE	0x02    /* Use Long Mode (get/send data & ECC) 	*/
77 
78 
79 /*
80  * Obsolete ATA commands.
81  */
82 
83 #define	ATC_RDLONG	0x23    /* read long without retry	*/
84 #define	ATC_ACK_MC	0xdb	/* acknowledge media change		*/
85 
86 #ifdef	__cplusplus
87 }
88 #endif
89 
90 #endif /* _ATA_CMD_H */
91