xref: /freebsd/sys/arm64/arm64/exec_machdep.c (revision e45132e978030f0aa964d975a9fbad5614f260bd)
1 /*-
2  * Copyright (c) 2014 Andrew Turner
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  */
27 
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/exec.h>
31 #include <sys/imgact.h>
32 #include <sys/kdb.h>
33 #include <sys/kernel.h>
34 #include <sys/ktr.h>
35 #include <sys/limits.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/proc.h>
39 #include <sys/ptrace.h>
40 #include <sys/reg.h>
41 #include <sys/rwlock.h>
42 #include <sys/signalvar.h>
43 #include <sys/syscallsubr.h>
44 #include <sys/sysent.h>
45 #include <sys/sysproto.h>
46 #include <sys/ucontext.h>
47 
48 #include <vm/vm.h>
49 #include <vm/vm_param.h>
50 #include <vm/pmap.h>
51 #include <vm/vm_map.h>
52 
53 #include <machine/armreg.h>
54 #include <machine/kdb.h>
55 #include <machine/md_var.h>
56 #include <machine/pcb.h>
57 
58 #ifdef VFP
59 #include <machine/vfp.h>
60 #endif
61 
62 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
63 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
64 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
65 
66 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
67 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
68 
69 int
fill_regs(struct thread * td,struct reg * regs)70 fill_regs(struct thread *td, struct reg *regs)
71 {
72 	struct trapframe *frame;
73 
74 	frame = td->td_frame;
75 	regs->sp = frame->tf_sp;
76 	regs->lr = frame->tf_lr;
77 	regs->elr = frame->tf_elr;
78 	regs->spsr = frame->tf_spsr;
79 
80 	memcpy(regs->x, frame->tf_x, sizeof(regs->x));
81 
82 #ifdef COMPAT_FREEBSD32
83 	/*
84 	 * We may be called here for a 32bits process, if we're using a
85 	 * 64bits debugger. If so, put PC and SPSR where it expects it.
86 	 */
87 	if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
88 		regs->x[15] = frame->tf_elr;
89 		regs->x[16] = frame->tf_spsr;
90 	}
91 #endif
92 	return (0);
93 }
94 
95 int
set_regs(struct thread * td,struct reg * regs)96 set_regs(struct thread *td, struct reg *regs)
97 {
98 	struct trapframe *frame;
99 
100 	frame = td->td_frame;
101 	frame->tf_sp = regs->sp;
102 	frame->tf_lr = regs->lr;
103 
104 	memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
105 
106 #ifdef COMPAT_FREEBSD32
107 	if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
108 		/*
109 		 * We may be called for a 32bits process if we're using
110 		 * a 64bits debugger. If so, get PC and SPSR from where
111 		 * it put it.
112 		 */
113 		frame->tf_elr = regs->x[15];
114 		frame->tf_spsr &= ~PSR_SETTABLE_32;
115 		frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
116 		/* Don't allow userspace to ask to continue single stepping.
117 		 * The SPSR.SS field doesn't exist when the EL1 is AArch32.
118 		 * As the SPSR.DIT field has moved in its place don't
119 		 * allow userspace to set the SPSR.SS field.
120 		 */
121 	} else
122 #endif
123 	{
124 		frame->tf_elr = regs->elr;
125 		/*
126 		 * frame->tf_spsr and regs->spsr on FreeBSD 13 was 32-bit
127 		 * where from 14 they are 64 bit. As PSR_SETTABLE_64 clears
128 		 * the upper 32 bits no compatibility handling is needed,
129 		 * however if this is ever not the case we will need to add
130 		 * these, similar to how it is done in set_mcontext.
131 		 */
132 		frame->tf_spsr &= ~PSR_SETTABLE_64;
133 		frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
134 		/* Enable single stepping if userspace asked fot it */
135 		if ((frame->tf_spsr & PSR_SS) != 0) {
136 			td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
137 
138 			WRITE_SPECIALREG(mdscr_el1,
139 			    READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
140 			isb();
141 		}
142 	}
143 	return (0);
144 }
145 
146 int
fill_fpregs(struct thread * td,struct fpreg * regs)147 fill_fpregs(struct thread *td, struct fpreg *regs)
148 {
149 #ifdef VFP
150 	struct pcb *pcb;
151 
152 	pcb = td->td_pcb;
153 	if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
154 		/*
155 		 * If we have just been running VFP instructions we will
156 		 * need to save the state to memcpy it below.
157 		 */
158 		if (td == curthread)
159 			vfp_save_state(td, pcb);
160 	}
161 
162 	KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
163 	    ("Called fill_fpregs while the kernel is using the VFP"));
164 	memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
165 	    sizeof(regs->fp_q));
166 	regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
167 	regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
168 #else
169 	memset(regs, 0, sizeof(*regs));
170 #endif
171 	return (0);
172 }
173 
174 int
set_fpregs(struct thread * td,struct fpreg * regs)175 set_fpregs(struct thread *td, struct fpreg *regs)
176 {
177 #ifdef VFP
178 	struct pcb *pcb;
179 
180 	pcb = td->td_pcb;
181 	KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
182 	    ("Called set_fpregs while the kernel is using the VFP"));
183 	memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
184 	pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
185 	pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
186 #endif
187 	return (0);
188 }
189 
190 int
fill_dbregs(struct thread * td,struct dbreg * regs)191 fill_dbregs(struct thread *td, struct dbreg *regs)
192 {
193 	struct debug_monitor_state *monitor;
194 	int i;
195 	uint8_t debug_ver, nbkpts, nwtpts;
196 
197 	memset(regs, 0, sizeof(*regs));
198 
199 	extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
200 	    &debug_ver);
201 	extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
202 	    &nbkpts);
203 	extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
204 	    &nwtpts);
205 
206 	/*
207 	 * The BRPs field contains the number of breakpoints - 1. Armv8-A
208 	 * allows the hardware to provide 2-16 breakpoints so this won't
209 	 * overflow an 8 bit value. The same applies to the WRPs field.
210 	 */
211 	nbkpts++;
212 	nwtpts++;
213 
214 	regs->db_debug_ver = debug_ver;
215 	regs->db_nbkpts = nbkpts;
216 	regs->db_nwtpts = nwtpts;
217 
218 	monitor = &td->td_pcb->pcb_dbg_regs;
219 	if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
220 		for (i = 0; i < nbkpts; i++) {
221 			regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
222 			regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
223 		}
224 		for (i = 0; i < nwtpts; i++) {
225 			regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
226 			regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
227 		}
228 	}
229 
230 	return (0);
231 }
232 
233 int
set_dbregs(struct thread * td,struct dbreg * regs)234 set_dbregs(struct thread *td, struct dbreg *regs)
235 {
236 	struct debug_monitor_state *monitor;
237 	uint64_t addr;
238 	uint32_t ctrl;
239 	int i;
240 
241 	monitor = &td->td_pcb->pcb_dbg_regs;
242 	monitor->dbg_enable_count = 0;
243 
244 	for (i = 0; i < DBG_BRP_MAX; i++) {
245 		addr = regs->db_breakregs[i].dbr_addr;
246 		ctrl = regs->db_breakregs[i].dbr_ctrl;
247 
248 		/*
249 		 * Don't let the user set a breakpoint on a kernel or
250 		 * non-canonical user address.
251 		 */
252 		if (addr >= VM_MAXUSER_ADDRESS)
253 			return (EINVAL);
254 
255 		/*
256 		 * The lowest 2 bits are ignored, so record the effective
257 		 * address.
258 		 */
259 		addr = rounddown2(addr, 4);
260 
261 		/*
262 		 * Some control fields are ignored, and other bits reserved.
263 		 * Only unlinked, address-matching breakpoints are supported.
264 		 *
265 		 * XXX: fields that appear unvalidated, such as BAS, have
266 		 * constrained undefined behaviour. If the user mis-programs
267 		 * these, there is no risk to the system.
268 		 */
269 		ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
270 		if ((ctrl & DBGBCR_EN) != 0) {
271 			/* Only target EL0. */
272 			if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
273 				return (EINVAL);
274 
275 			monitor->dbg_enable_count++;
276 		}
277 
278 		monitor->dbg_bvr[i] = addr;
279 		monitor->dbg_bcr[i] = ctrl;
280 	}
281 
282 	for (i = 0; i < DBG_WRP_MAX; i++) {
283 		addr = regs->db_watchregs[i].dbw_addr;
284 		ctrl = regs->db_watchregs[i].dbw_ctrl;
285 
286 		/*
287 		 * Don't let the user set a watchpoint on a kernel or
288 		 * non-canonical user address.
289 		 */
290 		if (addr >= VM_MAXUSER_ADDRESS)
291 			return (EINVAL);
292 
293 		/*
294 		 * Some control fields are ignored, and other bits reserved.
295 		 * Only unlinked watchpoints are supported.
296 		 */
297 		ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
298 		    DBGWCR_MASK;
299 
300 		if ((ctrl & DBGWCR_EN) != 0) {
301 			/* Only target EL0. */
302 			if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
303 				return (EINVAL);
304 
305 			/* Must set at least one of the load/store bits. */
306 			if ((ctrl & DBGWCR_LSC) == 0)
307 				return (EINVAL);
308 
309 			/*
310 			 * When specifying the address range with BAS, the MASK
311 			 * field must be zero.
312 			 */
313 			if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
314 			    (ctrl & DBGWCR_MASK) != 0)
315 				return (EINVAL);
316 
317 			monitor->dbg_enable_count++;
318 		}
319 		monitor->dbg_wvr[i] = addr;
320 		monitor->dbg_wcr[i] = ctrl;
321 	}
322 
323 	if (monitor->dbg_enable_count > 0)
324 		monitor->dbg_flags |= DBGMON_ENABLED;
325 
326 	return (0);
327 }
328 
329 #ifdef COMPAT_FREEBSD32
330 int
fill_regs32(struct thread * td,struct reg32 * regs)331 fill_regs32(struct thread *td, struct reg32 *regs)
332 {
333 	int i;
334 	struct trapframe *tf;
335 
336 	tf = td->td_frame;
337 	for (i = 0; i < 13; i++)
338 		regs->r[i] = tf->tf_x[i];
339 	/* For arm32, SP is r13 and LR is r14 */
340 	regs->r_sp = tf->tf_x[13];
341 	regs->r_lr = tf->tf_x[14];
342 	regs->r_pc = tf->tf_elr;
343 	regs->r_cpsr = tf->tf_spsr;
344 
345 	return (0);
346 }
347 
348 int
set_regs32(struct thread * td,struct reg32 * regs)349 set_regs32(struct thread *td, struct reg32 *regs)
350 {
351 	int i;
352 	struct trapframe *tf;
353 
354 	tf = td->td_frame;
355 	for (i = 0; i < 13; i++)
356 		tf->tf_x[i] = regs->r[i];
357 	/* For arm 32, SP is r13 an LR is r14 */
358 	tf->tf_x[13] = regs->r_sp;
359 	tf->tf_x[14] = regs->r_lr;
360 	tf->tf_elr = regs->r_pc;
361 	tf->tf_spsr &= ~PSR_SETTABLE_32;
362 	tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
363 
364 	return (0);
365 }
366 
367 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
368 int
fill_fpregs32(struct thread * td,struct fpreg32 * regs)369 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
370 {
371 
372 	memset(regs, 0, sizeof(*regs));
373 	return (0);
374 }
375 
376 int
set_fpregs32(struct thread * td,struct fpreg32 * regs)377 set_fpregs32(struct thread *td, struct fpreg32 *regs)
378 {
379 
380 	return (0);
381 }
382 
383 int
fill_dbregs32(struct thread * td,struct dbreg32 * regs)384 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
385 {
386 
387 	memset(regs, 0, sizeof(*regs));
388 	return (0);
389 }
390 
391 int
set_dbregs32(struct thread * td,struct dbreg32 * regs)392 set_dbregs32(struct thread *td, struct dbreg32 *regs)
393 {
394 
395 	return (0);
396 }
397 #endif
398 
399 void
exec_setregs(struct thread * td,struct image_params * imgp,uintptr_t stack)400 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
401 {
402 	struct trapframe *tf = td->td_frame;
403 	struct pcb *pcb = td->td_pcb;
404 
405 	memset(tf, 0, sizeof(struct trapframe));
406 
407 	tf->tf_x[0] = stack;
408 	tf->tf_sp = STACKALIGN(stack);
409 	tf->tf_lr = imgp->entry_addr;
410 	tf->tf_elr = imgp->entry_addr;
411 
412 	td->td_pcb->pcb_tpidr_el0 = 0;
413 	td->td_pcb->pcb_tpidrro_el0 = 0;
414 	WRITE_SPECIALREG(tpidrro_el0, 0);
415 	WRITE_SPECIALREG(tpidr_el0, 0);
416 
417 #ifdef VFP
418 	vfp_reset_state(td, pcb);
419 #endif
420 
421 	/*
422 	 * Clear debug register state. It is not applicable to the new process.
423 	 */
424 	bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
425 
426 	/* Generate new pointer authentication keys */
427 	ptrauth_exec(td);
428 }
429 
430 /* Sanity check these are the same size, they will be memcpy'd to and from */
431 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
432     sizeof((struct gpregs *)0)->gp_x);
433 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
434     sizeof((struct reg *)0)->x);
435 
436 int
get_mcontext(struct thread * td,mcontext_t * mcp,int clear_ret)437 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
438 {
439 	struct trapframe *tf = td->td_frame;
440 
441 	if (clear_ret & GET_MC_CLEAR_RET) {
442 		mcp->mc_gpregs.gp_x[0] = 0;
443 		mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
444 	} else {
445 		mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
446 		mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
447 	}
448 
449 	memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
450 	    sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
451 
452 	mcp->mc_gpregs.gp_sp = tf->tf_sp;
453 	mcp->mc_gpregs.gp_lr = tf->tf_lr;
454 	mcp->mc_gpregs.gp_elr = tf->tf_elr;
455 	get_fpcontext(td, mcp);
456 
457 	return (0);
458 }
459 
460 int
set_mcontext(struct thread * td,mcontext_t * mcp)461 set_mcontext(struct thread *td, mcontext_t *mcp)
462 {
463 #define	PSR_13_MASK	0xfffffffful
464 	struct arm64_reg_context ctx;
465 	struct trapframe *tf = td->td_frame;
466 	struct pcb *pcb;
467 	uint64_t spsr;
468 	vm_offset_t addr;
469 	int error, seen_types;
470 	bool done;
471 
472 	spsr = mcp->mc_gpregs.gp_spsr;
473 #ifdef COMPAT_FREEBSD13
474 	if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
475 		/*
476 		 * Before FreeBSD 14 gp_spsr was 32 bit. The size of mc_gpregs
477 		 * was identical because of padding so mask of the upper bits
478 		 * that may be invalid on earlier releases.
479 		 */
480 		spsr &= PSR_13_MASK;
481 	}
482 #endif
483 
484 	if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
485 	    (spsr & PSR_AARCH32) != 0 ||
486 	    (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
487 		return (EINVAL);
488 
489 	memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
490 
491 	tf->tf_sp = mcp->mc_gpregs.gp_sp;
492 	tf->tf_lr = mcp->mc_gpregs.gp_lr;
493 	tf->tf_elr = mcp->mc_gpregs.gp_elr;
494 #ifdef COMPAT_FREEBSD13
495 	if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
496 		/* Keep the upper 32 bits of spsr on older releases */
497 		tf->tf_spsr &= ~PSR_13_MASK;
498 		tf->tf_spsr |= spsr;
499 	} else
500 #endif
501 		tf->tf_spsr = spsr;
502 	if ((tf->tf_spsr & PSR_SS) != 0) {
503 		td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
504 
505 		WRITE_SPECIALREG(mdscr_el1,
506 		    READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
507 		isb();
508 	}
509 
510 	set_fpcontext(td, mcp);
511 
512 	/* Read any register contexts we find */
513 	if (mcp->mc_ptr != 0) {
514 		addr = mcp->mc_ptr;
515 		pcb = td->td_pcb;
516 
517 #define	CTX_TYPE_FLAG_SVE	(1 << 0)
518 
519 		seen_types = 0;
520 		done = false;
521 		do {
522 			if (!__is_aligned(addr,
523 			    _Alignof(struct arm64_reg_context)))
524 				return (EINVAL);
525 
526 			error = copyin((const void *)addr, &ctx, sizeof(ctx));
527 			if (error != 0)
528 				return (error);
529 
530 			switch (ctx.ctx_id) {
531 #ifdef VFP
532 			case ARM64_CTX_SVE: {
533 				struct sve_context sve_ctx;
534 				size_t buf_size;
535 
536 				if ((seen_types & CTX_TYPE_FLAG_SVE) != 0)
537 					return (EINVAL);
538 				seen_types |= CTX_TYPE_FLAG_SVE;
539 
540 				if (pcb->pcb_svesaved == NULL)
541 					return (EINVAL);
542 
543 				/* XXX: Check pcb_svesaved is valid */
544 
545 				buf_size = sve_buf_size(td);
546 				/* Check the size is valid */
547 				if (ctx.ctx_size !=
548 				    (sizeof(sve_ctx) + buf_size))
549 					return (EINVAL);
550 
551 				memset(pcb->pcb_svesaved, 0,
552 				    sve_max_buf_size());
553 
554 				/* Copy the SVE registers from userspace */
555 				if (copyin((void *)(addr + sizeof(sve_ctx)),
556 				    pcb->pcb_svesaved, buf_size) != 0)
557 					return (EINVAL);
558 
559 				pcb->pcb_fpflags |= PCB_FP_SVEVALID;
560 				break;
561 			}
562 #endif
563 			case ARM64_CTX_END:
564 				done = true;
565 				break;
566 			default:
567 				return (EINVAL);
568 			}
569 
570 			addr += ctx.ctx_size;
571 		} while (!done);
572 
573 #undef CTX_TYPE_FLAG_SVE
574 	}
575 
576 	return (0);
577 #undef PSR_13_MASK
578 }
579 
580 static void
get_fpcontext(struct thread * td,mcontext_t * mcp)581 get_fpcontext(struct thread *td, mcontext_t *mcp)
582 {
583 #ifdef VFP
584 	struct pcb *curpcb;
585 
586 	MPASS(td == curthread);
587 
588 	curpcb = curthread->td_pcb;
589 	if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
590 		/*
591 		 * If we have just been running VFP instructions we will
592 		 * need to save the state to memcpy it below.
593 		 */
594 		vfp_save_state(td, curpcb);
595 	}
596 
597 	KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
598 	    ("Called get_fpcontext while the kernel is using the VFP"));
599 	KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
600 	    ("Non-userspace FPU flags set in get_fpcontext"));
601 	memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
602 	    sizeof(mcp->mc_fpregs.fp_q));
603 	mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
604 	mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
605 	mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
606 	mcp->mc_flags |= _MC_FP_VALID;
607 #endif
608 }
609 
610 static void
set_fpcontext(struct thread * td,mcontext_t * mcp)611 set_fpcontext(struct thread *td, mcontext_t *mcp)
612 {
613 #ifdef VFP
614 	struct pcb *curpcb;
615 
616 	MPASS(td == curthread);
617 	if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
618 		curpcb = curthread->td_pcb;
619 
620 		/*
621 		 * Discard any vfp state for the current thread, we
622 		 * are about to override it.
623 		 */
624 		critical_enter();
625 		vfp_discard(td);
626 		critical_exit();
627 
628 		KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
629 		    ("Called set_fpcontext while the kernel is using the VFP"));
630 		memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
631 		    sizeof(mcp->mc_fpregs.fp_q));
632 		curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
633 		curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
634 		curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_STARTED;
635 	}
636 #endif
637 }
638 
639 int
sys_sigreturn(struct thread * td,struct sigreturn_args * uap)640 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
641 {
642 	ucontext_t uc;
643 	int error;
644 
645 	if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
646 		return (EFAULT);
647 
648 	/* Stop an interrupt from causing the sve state to be dropped */
649 	td->td_sa.code = -1;
650 	error = set_mcontext(td, &uc.uc_mcontext);
651 	if (error != 0)
652 		return (error);
653 
654 	/*
655 	 * Sync the VFP and SVE registers. To be backwards compatible we
656 	 * use the VFP registers to restore the lower bits of the SVE
657 	 * register it aliases.
658 	 */
659 	vfp_to_sve_sync(td);
660 
661 	/* Restore signal mask. */
662 	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
663 
664 	return (EJUSTRETURN);
665 }
666 
667 static bool
sendsig_ctx_end(struct thread * td,vm_offset_t * addrp)668 sendsig_ctx_end(struct thread *td, vm_offset_t *addrp)
669 {
670 	struct arm64_reg_context end_ctx;
671 	vm_offset_t ctx_addr;
672 
673 	*addrp -= sizeof(end_ctx);
674 	ctx_addr = *addrp;
675 
676 	memset(&end_ctx, 0, sizeof(end_ctx));
677 	end_ctx.ctx_id = ARM64_CTX_END;
678 	end_ctx.ctx_size = sizeof(end_ctx);
679 
680 	if (copyout(&end_ctx, (void *)ctx_addr, sizeof(end_ctx)) != 0)
681 		return (false);
682 
683 	return (true);
684 }
685 
686 static bool
sendsig_ctx_sve(struct thread * td,vm_offset_t * addrp)687 sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp)
688 {
689 	struct sve_context ctx;
690 	struct pcb *pcb;
691 	size_t buf_size;
692 	vm_offset_t ctx_addr;
693 
694 	pcb = td->td_pcb;
695 	/* Do nothing if sve hasn't started */
696 	if (pcb->pcb_svesaved == NULL)
697 		return (true);
698 
699 	MPASS(pcb->pcb_svesaved != NULL);
700 
701 	buf_size = sve_buf_size(td);
702 
703 	/* Address for the full context */
704 	*addrp -= sizeof(ctx) + buf_size;
705 	ctx_addr = *addrp;
706 
707 	memset(&ctx, 0, sizeof(ctx));
708 	ctx.sve_ctx.ctx_id = ARM64_CTX_SVE;
709 	ctx.sve_ctx.ctx_size = sizeof(ctx) + buf_size;
710 	ctx.sve_vector_len = pcb->pcb_sve_len;
711 	ctx.sve_flags = 0;
712 
713 	/* Copy out the header and data */
714 	if (copyout(&ctx, (void *)ctx_addr, sizeof(ctx)) != 0)
715 		return (false);
716 	if (copyout(pcb->pcb_svesaved, (void *)(ctx_addr + sizeof(ctx)),
717 	    buf_size) != 0)
718 		return (false);
719 
720 	return (true);
721 }
722 
723 typedef bool(*ctx_func)(struct thread *, vm_offset_t *);
724 static const ctx_func ctx_funcs[] = {
725 	sendsig_ctx_end,	/* Must be first to end the linked list */
726 	sendsig_ctx_sve,
727 	NULL,
728 };
729 
730 void
sendsig(sig_t catcher,ksiginfo_t * ksi,sigset_t * mask)731 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
732 {
733 	struct thread *td;
734 	struct proc *p;
735 	struct trapframe *tf;
736 	struct sigframe *fp, frame;
737 	struct sigacts *psp;
738 	vm_offset_t addr;
739 	int onstack, sig;
740 
741 	td = curthread;
742 	p = td->td_proc;
743 	PROC_LOCK_ASSERT(p, MA_OWNED);
744 
745 	sig = ksi->ksi_signo;
746 	psp = p->p_sigacts;
747 	mtx_assert(&psp->ps_mtx, MA_OWNED);
748 
749 	tf = td->td_frame;
750 	onstack = sigonstack(tf->tf_sp);
751 
752 	CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
753 	    catcher, sig);
754 
755 	/* Allocate and validate space for the signal handler context. */
756 	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
757 	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
758 		addr = ((uintptr_t)td->td_sigstk.ss_sp +
759 		    td->td_sigstk.ss_size);
760 #if defined(COMPAT_43)
761 		td->td_sigstk.ss_flags |= SS_ONSTACK;
762 #endif
763 	} else {
764 		addr = td->td_frame->tf_sp;
765 	}
766 
767 	/* Fill in the frame to copy out */
768 	bzero(&frame, sizeof(frame));
769 	get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
770 	frame.sf_si = ksi->ksi_info;
771 	frame.sf_uc.uc_sigmask = *mask;
772 	frame.sf_uc.uc_stack = td->td_sigstk;
773 	frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
774 	    (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
775 	mtx_unlock(&psp->ps_mtx);
776 	PROC_UNLOCK(td->td_proc);
777 
778 	for (int i = 0; ctx_funcs[i] != NULL; i++) {
779 		if (!ctx_funcs[i](td, &addr)) {
780 			/* Process has trashed its stack. Kill it. */
781 			CTR4(KTR_SIG,
782 			    "sendsig: frame sigexit td=%p fp=%#lx func[%d]=%p",
783 			    td, addr, i, ctx_funcs[i]);
784 			PROC_LOCK(p);
785 			sigexit(td, SIGILL);
786 			/* NOTREACHED */
787 		}
788 	}
789 
790 	/* Point at the first context */
791 	frame.sf_uc.uc_mcontext.mc_ptr = addr;
792 
793 	/* Make room, keeping the stack aligned */
794 	fp = (struct sigframe *)addr;
795 	fp--;
796 	fp = (struct sigframe *)STACKALIGN(fp);
797 
798 	/* Copy the sigframe out to the user's stack. */
799 	if (copyout(&frame, fp, sizeof(*fp)) != 0) {
800 		/* Process has trashed its stack. Kill it. */
801 		CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
802 		PROC_LOCK(p);
803 		sigexit(td, SIGILL);
804 	}
805 
806 	tf->tf_x[0] = sig;
807 	tf->tf_x[1] = (register_t)&fp->sf_si;
808 	tf->tf_x[2] = (register_t)&fp->sf_uc;
809 	tf->tf_x[8] = (register_t)catcher;
810 	tf->tf_sp = (register_t)fp;
811 	tf->tf_elr = (register_t)PROC_SIGCODE(p);
812 
813 	/* Clear the single step flag while in the signal handler */
814 	if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
815 		td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
816 		WRITE_SPECIALREG(mdscr_el1,
817 		    READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
818 		isb();
819 	}
820 
821 	CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
822 	    tf->tf_sp);
823 
824 	PROC_LOCK(p);
825 	mtx_lock(&psp->ps_mtx);
826 }
827