xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar5413.c (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1 /*-
2  * SPDX-License-Identifier: ISC
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * Copyright (c) 2002-2008 Atheros Communications, Inc.
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 #include "opt_ah.h"
20 
21 #include "ah.h"
22 #include "ah_internal.h"
23 
24 #include "ah_eeprom_v3.h"
25 
26 #include "ar5212/ar5212.h"
27 #include "ar5212/ar5212reg.h"
28 #include "ar5212/ar5212phy.h"
29 
30 #define AH_5212_5413
31 #include "ar5212/ar5212.ini"
32 
33 #define	N(a)	(sizeof(a)/sizeof(a[0]))
34 
35 struct ar5413State {
36 	RF_HAL_FUNCS	base;		/* public state, must be first */
37 	uint16_t	pcdacTable[PWR_TABLE_SIZE_2413];
38 
39 	uint32_t	Bank1Data[N(ar5212Bank1_5413)];
40 	uint32_t	Bank2Data[N(ar5212Bank2_5413)];
41 	uint32_t	Bank3Data[N(ar5212Bank3_5413)];
42 	uint32_t	Bank6Data[N(ar5212Bank6_5413)];
43 	uint32_t	Bank7Data[N(ar5212Bank7_5413)];
44 
45 	/*
46 	 * Private state for reduced stack usage.
47 	 */
48 	/* filled out Vpd table for all pdGains (chanL) */
49 	uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
50 			    [MAX_PWR_RANGE_IN_HALF_DB];
51 	/* filled out Vpd table for all pdGains (chanR) */
52 	uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
53 			    [MAX_PWR_RANGE_IN_HALF_DB];
54 	/* filled out Vpd table for all pdGains (interpolated) */
55 	uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
56 			    [MAX_PWR_RANGE_IN_HALF_DB];
57 };
58 #define	AR5413(ah)	((struct ar5413State *) AH5212(ah)->ah_rfHal)
59 
60 extern	void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
61 		uint32_t numBits, uint32_t firstBit, uint32_t column);
62 
63 static void
ar5413WriteRegs(struct ath_hal * ah,u_int modesIndex,u_int freqIndex,int writes)64 ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
65 	int writes)
66 {
67 	HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
68 	HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
69 	HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
70 }
71 
72 /*
73  * Take the MHz channel value and set the Channel value
74  *
75  * ASSUMES: Writes enabled to analog bus
76  */
77 static HAL_BOOL
ar5413SetChannel(struct ath_hal * ah,const struct ieee80211_channel * chan)78 ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
79 {
80 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
81 	uint32_t channelSel  = 0;
82 	uint32_t bModeSynth  = 0;
83 	uint32_t aModeRefSel = 0;
84 	uint32_t reg32       = 0;
85 
86 	OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
87 
88 	if (freq < 4800) {
89 		uint32_t txctl;
90 
91 		if (((freq - 2192) % 5) == 0) {
92 			channelSel = ((freq - 672) * 2 - 3040)/10;
93 			bModeSynth = 0;
94 		} else if (((freq - 2224) % 5) == 0) {
95 			channelSel = ((freq - 704) * 2 - 3040) / 10;
96 			bModeSynth = 1;
97 		} else {
98 			HALDEBUG(ah, HAL_DEBUG_ANY,
99 			    "%s: invalid channel %u MHz\n",
100 			    __func__, freq);
101 			return AH_FALSE;
102 		}
103 
104 		channelSel = (channelSel << 2) & 0xff;
105 		channelSel = ath_hal_reverseBits(channelSel, 8);
106 
107 		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
108 		if (freq == 2484) {
109 			/* Enable channel spreading for channel 14 */
110 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
111 				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
112 		} else {
113 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
114 				txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
115 		}
116 	} else if (((freq % 5) == 2) && (freq <= 5435)) {
117 		freq = freq - 2; /* Align to even 5MHz raster */
118 		channelSel = ath_hal_reverseBits(
119 			(uint32_t)(((freq - 4800)*10)/25 + 1), 8);
120             	aModeRefSel = ath_hal_reverseBits(0, 2);
121 	} else if ((freq % 20) == 0 && freq >= 5120) {
122 		channelSel = ath_hal_reverseBits(
123 			((freq - 4800) / 20 << 2), 8);
124 		aModeRefSel = ath_hal_reverseBits(1, 2);
125 	} else if ((freq % 10) == 0) {
126 		channelSel = ath_hal_reverseBits(
127 			((freq - 4800) / 10 << 1), 8);
128 		aModeRefSel = ath_hal_reverseBits(1, 2);
129 	} else if ((freq % 5) == 0) {
130 		channelSel = ath_hal_reverseBits(
131 			(freq - 4800) / 5, 8);
132 		aModeRefSel = ath_hal_reverseBits(1, 2);
133 	} else {
134 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
135 		    __func__, freq);
136 		return AH_FALSE;
137 	}
138 
139 	reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
140 			(1 << 12) | 0x1;
141 	OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
142 
143 	reg32 >>= 8;
144 	OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
145 
146 	AH_PRIVATE(ah)->ah_curchan = chan;
147 	return AH_TRUE;
148 }
149 
150 /*
151  * Reads EEPROM header info from device structure and programs
152  * all rf registers
153  *
154  * REQUIRES: Access to the analog rf device
155  */
156 static HAL_BOOL
ar5413SetRfRegs(struct ath_hal * ah,const struct ieee80211_channel * chan,uint16_t modesIndex,uint16_t * rfXpdGain)157 ar5413SetRfRegs(struct ath_hal *ah,
158 	const struct ieee80211_channel *chan,
159 	uint16_t modesIndex, uint16_t *rfXpdGain)
160 {
161 #define	RF_BANK_SETUP(_priv, _ix, _col) do {				    \
162 	int i;								    \
163 	for (i = 0; i < N(ar5212Bank##_ix##_5413); i++)			    \
164 		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
165 } while (0)
166 	struct ath_hal_5212 *ahp = AH5212(ah);
167 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
168 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
169 	uint16_t ob5GHz = 0, db5GHz = 0;
170 	uint16_t ob2GHz = 0, db2GHz = 0;
171 	struct ar5413State *priv = AR5413(ah);
172 	int regWrites = 0;
173 
174 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
175 	    __func__, chan->ic_freq, chan->ic_flags, modesIndex);
176 
177 	HALASSERT(priv != AH_NULL);
178 
179 	/* Setup rf parameters */
180 	switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
181 	case IEEE80211_CHAN_A:
182 		if (freq > 4000 && freq < 5260) {
183 			ob5GHz = ee->ee_ob1;
184 			db5GHz = ee->ee_db1;
185 		} else if (freq >= 5260 && freq < 5500) {
186 			ob5GHz = ee->ee_ob2;
187 			db5GHz = ee->ee_db2;
188 		} else if (freq >= 5500 && freq < 5725) {
189 			ob5GHz = ee->ee_ob3;
190 			db5GHz = ee->ee_db3;
191 		} else if (freq >= 5725) {
192 			ob5GHz = ee->ee_ob4;
193 			db5GHz = ee->ee_db4;
194 		} else {
195 			/* XXX else */
196 		}
197 		break;
198 	case IEEE80211_CHAN_B:
199 		ob2GHz = ee->ee_obFor24;
200 		db2GHz = ee->ee_dbFor24;
201 		break;
202 	case IEEE80211_CHAN_G:
203 	case IEEE80211_CHAN_PUREG:	/* NB: really 108G */
204 		ob2GHz = ee->ee_obFor24g;
205 		db2GHz = ee->ee_dbFor24g;
206 		break;
207 	default:
208 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
209 		    __func__, chan->ic_flags);
210 		return AH_FALSE;
211 	}
212 
213 	/* Bank 1 Write */
214 	RF_BANK_SETUP(priv, 1, 1);
215 
216 	/* Bank 2 Write */
217 	RF_BANK_SETUP(priv, 2, modesIndex);
218 
219 	/* Bank 3 Write */
220 	RF_BANK_SETUP(priv, 3, modesIndex);
221 
222 	/* Bank 6 Write */
223 	RF_BANK_SETUP(priv, 6, modesIndex);
224 
225     	/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
226 	if (IEEE80211_IS_CHAN_2GHZ(chan)) {
227         	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
228         	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
229 
230 			/* TODO - only for Eagle 1.0 2GHz - remove for production */
231 			/* XXX: but without this bit G doesn't work. */
232 			ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
233 
234 			/* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
235 			if (AH_PRIVATE(ah)->ah_ispcie) {
236 				ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),
237 						 3, 131, 3);
238 			}
239 	} else {
240         	ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
241         	ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
242 	}
243 
244 	/* Bank 7 Setup */
245 	RF_BANK_SETUP(priv, 7, modesIndex);
246 
247 	/* Write Analog registers */
248 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
249 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
250 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
251 	HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
252 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
253 
254 	/* Now that we have reprogrammed rfgain value, clear the flag. */
255 	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
256 
257 	return AH_TRUE;
258 #undef	RF_BANK_SETUP
259 }
260 
261 /*
262  * Return a reference to the requested RF Bank.
263  */
264 static uint32_t *
ar5413GetRfBank(struct ath_hal * ah,int bank)265 ar5413GetRfBank(struct ath_hal *ah, int bank)
266 {
267 	struct ar5413State *priv = AR5413(ah);
268 
269 	HALASSERT(priv != AH_NULL);
270 	switch (bank) {
271 	case 1: return priv->Bank1Data;
272 	case 2: return priv->Bank2Data;
273 	case 3: return priv->Bank3Data;
274 	case 6: return priv->Bank6Data;
275 	case 7: return priv->Bank7Data;
276 	}
277 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
278 	    __func__, bank);
279 	return AH_NULL;
280 }
281 
282 /*
283  * Return indices surrounding the value in sorted integer lists.
284  *
285  * NB: the input list is assumed to be sorted in ascending order
286  */
287 static void
GetLowerUpperIndex(int16_t v,const uint16_t * lp,uint16_t listSize,uint32_t * vlo,uint32_t * vhi)288 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
289                           uint32_t *vlo, uint32_t *vhi)
290 {
291 	int16_t target = v;
292 	const uint16_t *ep = lp+listSize;
293 	const uint16_t *tp;
294 
295 	/*
296 	 * Check first and last elements for out-of-bounds conditions.
297 	 */
298 	if (target < lp[0]) {
299 		*vlo = *vhi = 0;
300 		return;
301 	}
302 	if (target >= ep[-1]) {
303 		*vlo = *vhi = listSize - 1;
304 		return;
305 	}
306 
307 	/* look for value being near or between 2 values in list */
308 	for (tp = lp; tp < ep; tp++) {
309 		/*
310 		 * If value is close to the current value of the list
311 		 * then target is not between values, it is one of the values
312 		 */
313 		if (*tp == target) {
314 			*vlo = *vhi = tp - (const uint16_t *) lp;
315 			return;
316 		}
317 		/*
318 		 * Look for value being between current value and next value
319 		 * if so return these 2 values
320 		 */
321 		if (target < tp[1]) {
322 			*vlo = tp - (const uint16_t *) lp;
323 			*vhi = *vlo + 1;
324 			return;
325 		}
326 	}
327 }
328 
329 /*
330  * Fill the Vpdlist for indices Pmax-Pmin
331  */
332 static HAL_BOOL
ar5413FillVpdTable(uint32_t pdGainIdx,int16_t Pmin,int16_t Pmax,const int16_t * pwrList,const uint16_t * VpdList,uint16_t numIntercepts,uint16_t retVpdList[][64])333 ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t  Pmax,
334 		   const int16_t *pwrList, const uint16_t *VpdList,
335 		   uint16_t numIntercepts,
336 		   uint16_t retVpdList[][64])
337 {
338 	uint16_t ii, jj, kk;
339 	int16_t currPwr = (int16_t)(2*Pmin);
340 	/* since Pmin is pwr*2 and pwrList is 4*pwr */
341 	uint32_t  idxL, idxR;
342 
343 	ii = 0;
344 	jj = 0;
345 
346 	if (numIntercepts < 2)
347 		return AH_FALSE;
348 
349 	while (ii <= (uint16_t)(Pmax - Pmin)) {
350 		GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
351 				   numIntercepts, &(idxL), &(idxR));
352 		if (idxR < 1)
353 			idxR = 1;			/* extrapolate below */
354 		if (idxL == (uint32_t)(numIntercepts - 1))
355 			idxL = numIntercepts - 2;	/* extrapolate above */
356 		if (pwrList[idxL] == pwrList[idxR])
357 			kk = VpdList[idxL];
358 		else
359 			kk = (uint16_t)
360 				(((currPwr - pwrList[idxL])*VpdList[idxR]+
361 				  (pwrList[idxR] - currPwr)*VpdList[idxL])/
362 				 (pwrList[idxR] - pwrList[idxL]));
363 		retVpdList[pdGainIdx][ii] = kk;
364 		ii++;
365 		currPwr += 2;				/* half dB steps */
366 	}
367 
368 	return AH_TRUE;
369 }
370 
371 /*
372  * Returns interpolated or the scaled up interpolated value
373  */
374 static int16_t
interpolate_signed(uint16_t target,uint16_t srcLeft,uint16_t srcRight,int16_t targetLeft,int16_t targetRight)375 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
376 	int16_t targetLeft, int16_t targetRight)
377 {
378 	int16_t rv;
379 
380 	if (srcRight != srcLeft) {
381 		rv = ((target - srcLeft)*targetRight +
382 		      (srcRight - target)*targetLeft) / (srcRight - srcLeft);
383 	} else {
384 		rv = targetLeft;
385 	}
386 	return rv;
387 }
388 
389 /*
390  * Uses the data points read from EEPROM to reconstruct the pdadc power table
391  * Called by ar5413SetPowerTable()
392  */
393 static int
ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal * ah,uint16_t channel,const RAW_DATA_STRUCT_2413 * pRawDataset,uint16_t pdGainOverlap_t2,int16_t * pMinCalPower,uint16_t pPdGainBoundaries[],uint16_t pPdGainValues[],uint16_t pPDADCValues[])394 ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
395 		const RAW_DATA_STRUCT_2413 *pRawDataset,
396 		uint16_t pdGainOverlap_t2,
397 		int16_t  *pMinCalPower, uint16_t pPdGainBoundaries[],
398 		uint16_t pPdGainValues[], uint16_t pPDADCValues[])
399 {
400 	struct ar5413State *priv = AR5413(ah);
401 #define	VpdTable_L	priv->vpdTable_L
402 #define	VpdTable_R	priv->vpdTable_R
403 #define	VpdTable_I	priv->vpdTable_I
404 	uint32_t ii, jj, kk;
405 	int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
406 	uint32_t idxL, idxR;
407 	uint32_t numPdGainsUsed = 0;
408 	/*
409 	 * If desired to support -ve power levels in future, just
410 	 * change pwr_I_0 to signed 5-bits.
411 	 */
412 	int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
413 	/* to accommodate -ve power levels later on. */
414 	int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
415 	/* to accommodate -ve power levels later on */
416 	uint16_t numVpd = 0;
417 	uint16_t Vpd_step;
418 	int16_t tmpVal ;
419 	uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
420 
421 	/* Get upper lower index */
422 	GetLowerUpperIndex(channel, pRawDataset->pChannels,
423 				 pRawDataset->numChannels, &(idxL), &(idxR));
424 
425 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
426 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
427 		/* work backwards 'cause highest pdGain for lowest power */
428 		numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
429 		if (numVpd > 0) {
430 			pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
431 			Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
432 			if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
433 				Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
434 			}
435 			Pmin_t2[numPdGainsUsed] = (int16_t)
436 				(Pmin_t2[numPdGainsUsed] / 2);
437 			Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
438 			if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
439 				Pmax_t2[numPdGainsUsed] =
440 					pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
441 			Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
442 			ar5413FillVpdTable(
443 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
444 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
445 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
446 					   );
447 			ar5413FillVpdTable(
448 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
449 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
450 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
451 					   );
452 			for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
453 				VpdTable_I[numPdGainsUsed][kk] =
454 					interpolate_signed(
455 							   channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
456 							   (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
457 			}
458 			/* fill VpdTable_I for this pdGain */
459 			numPdGainsUsed++;
460 		}
461 		/* if this pdGain is used */
462 	}
463 
464 	*pMinCalPower = Pmin_t2[0];
465 	kk = 0; /* index for the final table */
466 	for (ii = 0; ii < numPdGainsUsed; ii++) {
467 		if (ii == (numPdGainsUsed - 1))
468 			pPdGainBoundaries[ii] = Pmax_t2[ii] +
469 				PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
470 		else
471 			pPdGainBoundaries[ii] = (uint16_t)
472 				((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
473 		if (pPdGainBoundaries[ii] > 63) {
474 			HALDEBUG(ah, HAL_DEBUG_ANY,
475 			    "%s: clamp pPdGainBoundaries[%d] %d\n",
476 			    __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
477 			pPdGainBoundaries[ii] = 63;
478 		}
479 
480 		/* Find starting index for this pdGain */
481 		if (ii == 0)
482 			ss = 0; /* for the first pdGain, start from index 0 */
483 		else
484 			ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
485 				pdGainOverlap_t2;
486 		Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
487 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
488 		/*
489 		 *-ve ss indicates need to extrapolate data below for this pdGain
490 		 */
491 		while (ss < 0) {
492 			tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
493 			pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
494 			ss++;
495 		}
496 
497 		sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
498 		tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
499 		maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
500 
501 		while (ss < (int16_t)maxIndex)
502 			pPDADCValues[kk++] = VpdTable_I[ii][ss++];
503 
504 		Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
505 				       VpdTable_I[ii][sizeCurrVpdTable-2]);
506 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
507 		/*
508 		 * for last gain, pdGainBoundary == Pmax_t2, so will
509 		 * have to extrapolate
510 		 */
511 		if (tgtIndex > maxIndex) {	/* need to extrapolate above */
512 			while(ss < (int16_t)tgtIndex) {
513 				tmpVal = (uint16_t)
514 					(VpdTable_I[ii][sizeCurrVpdTable-1] +
515 					 (ss-maxIndex)*Vpd_step);
516 				pPDADCValues[kk++] = (tmpVal > 127) ?
517 					127 : tmpVal;
518 				ss++;
519 			}
520 		}				/* extrapolated above */
521 	}					/* for all pdGainUsed */
522 
523 	while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
524 		pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
525 		ii++;
526 	}
527 	while (kk < 128) {
528 		pPDADCValues[kk] = pPDADCValues[kk-1];
529 		kk++;
530 	}
531 
532 	return numPdGainsUsed;
533 #undef VpdTable_L
534 #undef VpdTable_R
535 #undef VpdTable_I
536 }
537 
538 static HAL_BOOL
ar5413SetPowerTable(struct ath_hal * ah,int16_t * minPower,int16_t * maxPower,const struct ieee80211_channel * chan,uint16_t * rfXpdGain)539 ar5413SetPowerTable(struct ath_hal *ah,
540 	int16_t *minPower, int16_t *maxPower,
541 	const struct ieee80211_channel *chan,
542 	uint16_t *rfXpdGain)
543 {
544 	struct ath_hal_5212 *ahp = AH5212(ah);
545 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
546 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
547 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
548 	uint16_t pdGainOverlap_t2;
549 	int16_t minCalPower5413_t2;
550 	uint16_t *pdadcValues = ahp->ah_pcdacTable;
551 	uint16_t gainBoundaries[4];
552 	uint32_t reg32, regoffset;
553 	int i, numPdGainsUsed;
554 #ifndef AH_USE_INIPDGAIN
555 	uint32_t tpcrg1;
556 #endif
557 
558 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
559 	    __func__, chan->ic_freq, chan->ic_flags);
560 
561 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
562 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
563 	else if (IEEE80211_IS_CHAN_B(chan))
564 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
565 	else {
566 		HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
567 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
568 	}
569 
570 	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
571 					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
572 
573 	numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,
574 		freq, pRawDataset, pdGainOverlap_t2,
575 		&minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
576 	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
577 
578 #ifdef AH_USE_INIPDGAIN
579 	/*
580 	 * Use pd_gains curve from eeprom; Atheros always uses
581 	 * the default curve from the ini file but some vendors
582 	 * (e.g. Zcomax) want to override this curve and not
583 	 * honoring their settings results in tx power 5dBm low.
584 	 */
585 	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
586 			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
587 #else
588 	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
589 	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
590 		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
591 	switch (numPdGainsUsed) {
592 	case 3:
593 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
594 		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
595 		/* fall thru... */
596 	case 2:
597 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
598 		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
599 		/* fall thru... */
600 	case 1:
601 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
602 		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
603 		break;
604 	}
605 #ifdef AH_DEBUG
606 	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
607 		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
608 		    "pd_gains (default 0x%x, calculated 0x%x)\n",
609 		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
610 #endif
611 	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
612 #endif
613 
614 	/*
615 	 * Note the pdadc table may not start at 0 dBm power, could be
616 	 * negative or greater than 0.  Need to offset the power
617 	 * values by the amount of minPower for griffin
618 	 */
619 	if (minCalPower5413_t2 != 0)
620 		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
621 	else
622 		ahp->ah_txPowerIndexOffset = 0;
623 
624 	/* Finally, write the power values into the baseband power table */
625 	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
626 	for (i = 0; i < 32; i++) {
627 		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  |
628 			((pdadcValues[4*i + 1] & 0xFF) << 8)  |
629 			((pdadcValues[4*i + 2] & 0xFF) << 16) |
630 			((pdadcValues[4*i + 3] & 0xFF) << 24) ;
631 		OS_REG_WRITE(ah, regoffset, reg32);
632 		regoffset += 4;
633 	}
634 
635 	OS_REG_WRITE(ah, AR_PHY_TPCRG5,
636 		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
637 		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
638 		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
639 		     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
640 		     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
641 
642 	return AH_TRUE;
643 }
644 
645 static int16_t
ar5413GetMinPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2413 * data)646 ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
647 {
648 	uint32_t ii,jj;
649 	uint16_t Pmin=0,numVpd;
650 
651 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
652 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
653 		/* work backwards 'cause highest pdGain for lowest power */
654 		numVpd = data->pDataPerPDGain[jj].numVpd;
655 		if (numVpd > 0) {
656 			Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
657 			return(Pmin);
658 		}
659 	}
660 	return(Pmin);
661 }
662 
663 static int16_t
ar5413GetMaxPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2413 * data)664 ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
665 {
666 	uint32_t ii;
667 	uint16_t Pmax=0,numVpd;
668 
669 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
670 		/* work forwards cuase lowest pdGain for highest power */
671 		numVpd = data->pDataPerPDGain[ii].numVpd;
672 		if (numVpd > 0) {
673 			Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
674 			return(Pmax);
675 		}
676 	}
677 	return(Pmax);
678 }
679 
680 static HAL_BOOL
ar5413GetChannelMaxMinPower(struct ath_hal * ah,const struct ieee80211_channel * chan,int16_t * maxPow,int16_t * minPow)681 ar5413GetChannelMaxMinPower(struct ath_hal *ah,
682 	const struct ieee80211_channel *chan,
683 	int16_t *maxPow, int16_t *minPow)
684 {
685 	uint16_t freq = chan->ic_freq;		/* NB: never mapped */
686 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
687 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
688 	const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;
689 	uint16_t numChannels;
690 	int totalD,totalF, totalMin,last, i;
691 
692 	*maxPow = 0;
693 
694 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
695 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
696 	else if (IEEE80211_IS_CHAN_B(chan))
697 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
698 	else {
699 		HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
700 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
701 	}
702 
703 	numChannels = pRawDataset->numChannels;
704 	data = pRawDataset->pDataPerChannel;
705 
706 	/* Make sure the channel is in the range of the TP values
707 	 *  (freq piers)
708 	 */
709 	if (numChannels < 1)
710 		return(AH_FALSE);
711 
712 	if ((freq < data[0].channelValue) ||
713 	    (freq > data[numChannels-1].channelValue)) {
714 		if (freq < data[0].channelValue) {
715 			*maxPow = ar5413GetMaxPower(ah, &data[0]);
716 			*minPow = ar5413GetMinPower(ah, &data[0]);
717 			return(AH_TRUE);
718 		} else {
719 			*maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
720 			*minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
721 			return(AH_TRUE);
722 		}
723 	}
724 
725 	/* Linearly interpolate the power value now */
726 	for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
727 	     last = i++);
728 	totalD = data[i].channelValue - data[last].channelValue;
729 	if (totalD > 0) {
730 		totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
731 		*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
732 				     ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
733 		totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
734 		*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
735 				     ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
736 		return(AH_TRUE);
737 	} else {
738 		if (freq == data[i].channelValue) {
739 			*maxPow = ar5413GetMaxPower(ah, &data[i]);
740 			*minPow = ar5413GetMinPower(ah, &data[i]);
741 			return(AH_TRUE);
742 		} else
743 			return(AH_FALSE);
744 	}
745 }
746 
747 /*
748  * Free memory for analog bank scratch buffers
749  */
750 static void
ar5413RfDetach(struct ath_hal * ah)751 ar5413RfDetach(struct ath_hal *ah)
752 {
753 	struct ath_hal_5212 *ahp = AH5212(ah);
754 
755 	HALASSERT(ahp->ah_rfHal != AH_NULL);
756 	ath_hal_free(ahp->ah_rfHal);
757 	ahp->ah_rfHal = AH_NULL;
758 }
759 
760 /*
761  * Allocate memory for analog bank scratch buffers
762  * Scratch Buffer will be reinitialized every reset so no need to zero now
763  */
764 static HAL_BOOL
ar5413RfAttach(struct ath_hal * ah,HAL_STATUS * status)765 ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
766 {
767 	struct ath_hal_5212 *ahp = AH5212(ah);
768 	struct ar5413State *priv;
769 
770 	HALASSERT(ah->ah_magic == AR5212_MAGIC);
771 
772 	HALASSERT(ahp->ah_rfHal == AH_NULL);
773 	priv = ath_hal_malloc(sizeof(struct ar5413State));
774 	if (priv == AH_NULL) {
775 		HALDEBUG(ah, HAL_DEBUG_ANY,
776 		    "%s: cannot allocate private state\n", __func__);
777 		*status = HAL_ENOMEM;		/* XXX */
778 		return AH_FALSE;
779 	}
780 	priv->base.rfDetach		= ar5413RfDetach;
781 	priv->base.writeRegs		= ar5413WriteRegs;
782 	priv->base.getRfBank		= ar5413GetRfBank;
783 	priv->base.setChannel		= ar5413SetChannel;
784 	priv->base.setRfRegs		= ar5413SetRfRegs;
785 	priv->base.setPowerTable	= ar5413SetPowerTable;
786 	priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
787 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
788 
789 	ahp->ah_pcdacTable = priv->pcdacTable;
790 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
791 	ahp->ah_rfHal = &priv->base;
792 
793 	return AH_TRUE;
794 }
795 
796 static HAL_BOOL
ar5413Probe(struct ath_hal * ah)797 ar5413Probe(struct ath_hal *ah)
798 {
799 	return IS_5413(ah);
800 }
801 AH_RF(RF5413, ar5413Probe, ar5413RfAttach);
802