1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to Berkeley by
10 * William Jolitz.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 */
40
41 #include <sys/cdefs.h>
42 #include "opt_cpu.h"
43 #include "opt_ddb.h"
44 #include "opt_kstack_pages.h"
45
46 #include <sys/param.h>
47 #include <sys/proc.h>
48 #include <sys/systm.h>
49 #include <sys/exec.h>
50 #include <sys/imgact.h>
51 #include <sys/kdb.h>
52 #include <sys/kernel.h>
53 #include <sys/ktr.h>
54 #include <sys/linker.h>
55 #include <sys/lock.h>
56 #include <sys/malloc.h>
57 #include <sys/mutex.h>
58 #include <sys/pcpu.h>
59 #include <sys/reg.h>
60 #include <sys/rwlock.h>
61 #include <sys/signalvar.h>
62 #ifdef SMP
63 #include <sys/smp.h>
64 #endif
65 #include <sys/syscallsubr.h>
66 #include <sys/sysctl.h>
67 #include <sys/sysent.h>
68 #include <sys/sysproto.h>
69 #include <sys/ucontext.h>
70 #include <sys/vmmeter.h>
71
72 #include <vm/vm.h>
73 #include <vm/vm_param.h>
74 #include <vm/vm_extern.h>
75 #include <vm/pmap.h>
76 #include <vm/vm_map.h>
77
78 #ifdef DDB
79 #ifndef KDB
80 #error KDB must be enabled in order for DDB to work!
81 #endif
82 #include <ddb/ddb.h>
83 #include <ddb/db_sym.h>
84 #endif
85
86 #include <machine/vmparam.h>
87 #include <machine/frame.h>
88 #include <machine/md_var.h>
89 #include <machine/pcb.h>
90 #include <machine/proc.h>
91 #include <machine/sigframe.h>
92 #include <machine/specialreg.h>
93 #include <machine/trap.h>
94
95 _Static_assert(sizeof(mcontext_t) == 800, "mcontext_t size incorrect");
96 _Static_assert(sizeof(ucontext_t) == 880, "ucontext_t size incorrect");
97 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
98
99 /*
100 * Send an interrupt to process.
101 *
102 * Stack is set up to allow sigcode stored at top to call routine,
103 * followed by call to sigreturn routine below. After sigreturn
104 * resets the signal mask, the stack, and the frame pointer, it
105 * returns to the user specified pc, psl.
106 */
107 void
sendsig(sig_t catcher,ksiginfo_t * ksi,sigset_t * mask)108 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
109 {
110 struct sigframe sf, *sfp;
111 struct pcb *pcb;
112 struct proc *p;
113 struct thread *td;
114 struct sigacts *psp;
115 char *sp;
116 struct trapframe *regs;
117 char *xfpusave;
118 size_t xfpusave_len;
119 int sig;
120 int oonstack;
121
122 td = curthread;
123 pcb = td->td_pcb;
124 p = td->td_proc;
125 PROC_LOCK_ASSERT(p, MA_OWNED);
126 sig = ksi->ksi_signo;
127 psp = p->p_sigacts;
128 mtx_assert(&psp->ps_mtx, MA_OWNED);
129 regs = td->td_frame;
130 oonstack = sigonstack(regs->tf_rsp);
131
132 /* Save user context. */
133 bzero(&sf, sizeof(sf));
134 sf.sf_uc.uc_sigmask = *mask;
135 sf.sf_uc.uc_stack = td->td_sigstk;
136 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
137 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
138 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
139 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
140 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
141 get_fpcontext(td, &sf.sf_uc.uc_mcontext, &xfpusave, &xfpusave_len);
142 update_pcb_bases(pcb);
143 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
144 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
145 bzero(sf.sf_uc.uc_mcontext.mc_spare,
146 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
147
148 /* Allocate space for the signal handler context. */
149 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
150 SIGISMEMBER(psp->ps_sigonstack, sig)) {
151 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
152 #if defined(COMPAT_43)
153 td->td_sigstk.ss_flags |= SS_ONSTACK;
154 #endif
155 } else
156 sp = (char *)regs->tf_rsp - 128;
157 if (xfpusave != NULL) {
158 sp -= xfpusave_len;
159 sp = (char *)((unsigned long)sp & ~0x3Ful);
160 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
161 }
162 sp -= sizeof(struct sigframe);
163 /* Align to 16 bytes. */
164 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
165
166 /* Build the argument list for the signal handler. */
167 regs->tf_rdi = sig; /* arg 1 in %rdi */
168 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
169 bzero(&sf.sf_si, sizeof(sf.sf_si));
170 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
171 /* Signal handler installed with SA_SIGINFO. */
172 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
173 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
174
175 /* Fill in POSIX parts */
176 sf.sf_si = ksi->ksi_info;
177 sf.sf_si.si_signo = sig; /* maybe a translated signal */
178 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
179 } else {
180 /* Old FreeBSD-style arguments. */
181 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
182 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
183 sf.sf_ahu.sf_handler = catcher;
184 }
185 mtx_unlock(&psp->ps_mtx);
186 PROC_UNLOCK(p);
187
188 /*
189 * Copy the sigframe out to the user's stack.
190 */
191 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
192 (xfpusave != NULL && copyout(xfpusave,
193 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
194 != 0)) {
195 uprintf("pid %d comm %s has trashed its stack, killing\n",
196 p->p_pid, p->p_comm);
197 PROC_LOCK(p);
198 sigexit(td, SIGILL);
199 }
200
201 fpstate_drop(td);
202 regs->tf_rsp = (long)sfp;
203 regs->tf_rip = PROC_SIGCODE(p);
204 regs->tf_rflags &= ~(PSL_T | PSL_D);
205 regs->tf_cs = _ucodesel;
206 regs->tf_ds = _udatasel;
207 regs->tf_ss = _udatasel;
208 regs->tf_es = _udatasel;
209 regs->tf_fs = _ufssel;
210 regs->tf_gs = _ugssel;
211 regs->tf_flags = TF_HASSEGS;
212 if ((pcb->pcb_flags & PCB_TLSBASE) != 0)
213 pcb->pcb_fsbase = pcb->pcb_tlsbase;
214 PROC_LOCK(p);
215 mtx_lock(&psp->ps_mtx);
216 }
217
218 /*
219 * System call to cleanup state after a signal
220 * has been taken. Reset signal mask and
221 * stack state from context left by sendsig (above).
222 * Return to previous pc and psl as specified by
223 * context left by sendsig. Check carefully to
224 * make sure that the user has not modified the
225 * state to gain improper privileges.
226 */
227 int
sys_sigreturn(struct thread * td,struct sigreturn_args * uap)228 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
229 {
230 ucontext_t uc;
231 struct pcb *pcb;
232 struct proc *p;
233 struct trapframe *regs;
234 ucontext_t *ucp;
235 char *xfpustate;
236 size_t xfpustate_len;
237 long rflags;
238 int cs, error, ret;
239 ksiginfo_t ksi;
240
241 pcb = td->td_pcb;
242 p = td->td_proc;
243
244 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
245 if (error != 0) {
246 uprintf("pid %d (%s): sigreturn copyin failed\n",
247 p->p_pid, td->td_name);
248 return (error);
249 }
250 ucp = &uc;
251 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
252 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
253 td->td_name, ucp->uc_mcontext.mc_flags);
254 return (EINVAL);
255 }
256 regs = td->td_frame;
257 rflags = ucp->uc_mcontext.mc_rflags;
258 /*
259 * Don't allow users to change privileged or reserved flags.
260 */
261 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
262 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
263 td->td_name, rflags);
264 return (EINVAL);
265 }
266
267 /*
268 * Don't allow users to load a valid privileged %cs. Let the
269 * hardware check for invalid selectors, excess privilege in
270 * other selectors, invalid %eip's and invalid %esp's.
271 */
272 cs = ucp->uc_mcontext.mc_cs;
273 if (!CS_SECURE(cs)) {
274 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
275 td->td_name, cs);
276 ksiginfo_init_trap(&ksi);
277 ksi.ksi_signo = SIGBUS;
278 ksi.ksi_code = BUS_OBJERR;
279 ksi.ksi_trapno = T_PROTFLT;
280 ksi.ksi_addr = (void *)regs->tf_rip;
281 trapsignal(td, &ksi);
282 return (EINVAL);
283 }
284
285 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
286 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
287 if (xfpustate_len > cpu_max_ext_state_size -
288 sizeof(struct savefpu)) {
289 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
290 p->p_pid, td->td_name, xfpustate_len);
291 return (EINVAL);
292 }
293 xfpustate = (char *)fpu_save_area_alloc();
294 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
295 xfpustate, xfpustate_len);
296 if (error != 0) {
297 fpu_save_area_free((struct savefpu *)xfpustate);
298 uprintf(
299 "pid %d (%s): sigreturn copying xfpustate failed\n",
300 p->p_pid, td->td_name);
301 return (error);
302 }
303 } else {
304 xfpustate = NULL;
305 xfpustate_len = 0;
306 }
307 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
308 fpu_save_area_free((struct savefpu *)xfpustate);
309 if (ret != 0) {
310 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
311 p->p_pid, td->td_name, ret);
312 return (ret);
313 }
314 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
315 update_pcb_bases(pcb);
316 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
317 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
318
319 #if defined(COMPAT_43)
320 if (ucp->uc_mcontext.mc_onstack & 1)
321 td->td_sigstk.ss_flags |= SS_ONSTACK;
322 else
323 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
324 #endif
325
326 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
327 return (EJUSTRETURN);
328 }
329
330 #ifdef COMPAT_FREEBSD4
331 int
freebsd4_sigreturn(struct thread * td,struct freebsd4_sigreturn_args * uap)332 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
333 {
334
335 return sys_sigreturn(td, (struct sigreturn_args *)uap);
336 }
337 #endif
338
339 /*
340 * Reset the hardware debug registers if they were in use.
341 * They won't have any meaning for the newly exec'd process.
342 */
343 void
x86_clear_dbregs(struct pcb * pcb)344 x86_clear_dbregs(struct pcb *pcb)
345 {
346 if ((pcb->pcb_flags & PCB_DBREGS) == 0)
347 return;
348
349 pcb->pcb_dr0 = 0;
350 pcb->pcb_dr1 = 0;
351 pcb->pcb_dr2 = 0;
352 pcb->pcb_dr3 = 0;
353 pcb->pcb_dr6 = 0;
354 pcb->pcb_dr7 = 0;
355
356 if (pcb == curpcb) {
357 /*
358 * Clear the debug registers on the running CPU,
359 * otherwise they will end up affecting the next
360 * process we switch to.
361 */
362 reset_dbregs();
363 }
364 clear_pcb_flags(pcb, PCB_DBREGS);
365 }
366
367 /*
368 * Reset registers to default values on exec.
369 */
370 void
exec_setregs(struct thread * td,struct image_params * imgp,uintptr_t stack)371 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
372 {
373 struct trapframe *regs;
374 struct pcb *pcb;
375 register_t saved_rflags;
376
377 regs = td->td_frame;
378 pcb = td->td_pcb;
379
380 if (td->td_proc->p_md.md_ldt != NULL)
381 user_ldt_free(td);
382
383 update_pcb_bases(pcb);
384 pcb->pcb_fsbase = pcb->pcb_tlsbase = 0;
385 pcb->pcb_gsbase = 0;
386 clear_pcb_flags(pcb, PCB_32BIT | PCB_TLSBASE);
387 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
388
389 saved_rflags = regs->tf_rflags & PSL_T;
390 bzero((char *)regs, sizeof(struct trapframe));
391 regs->tf_rip = imgp->entry_addr;
392 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
393 regs->tf_rdi = stack; /* argv */
394 regs->tf_rflags = PSL_USER | saved_rflags;
395 regs->tf_ss = _udatasel;
396 regs->tf_cs = _ucodesel;
397 regs->tf_ds = _udatasel;
398 regs->tf_es = _udatasel;
399 regs->tf_fs = _ufssel;
400 regs->tf_gs = _ugssel;
401 regs->tf_flags = TF_HASSEGS;
402
403 x86_clear_dbregs(pcb);
404
405 /*
406 * Drop the FP state if we hold it, so that the process gets a
407 * clean FP state if it uses the FPU again.
408 */
409 fpstate_drop(td);
410 }
411
412 int
fill_regs(struct thread * td,struct reg * regs)413 fill_regs(struct thread *td, struct reg *regs)
414 {
415 struct trapframe *tp;
416
417 tp = td->td_frame;
418 return (fill_frame_regs(tp, regs));
419 }
420
421 int
fill_frame_regs(struct trapframe * tp,struct reg * regs)422 fill_frame_regs(struct trapframe *tp, struct reg *regs)
423 {
424
425 regs->r_r15 = tp->tf_r15;
426 regs->r_r14 = tp->tf_r14;
427 regs->r_r13 = tp->tf_r13;
428 regs->r_r12 = tp->tf_r12;
429 regs->r_r11 = tp->tf_r11;
430 regs->r_r10 = tp->tf_r10;
431 regs->r_r9 = tp->tf_r9;
432 regs->r_r8 = tp->tf_r8;
433 regs->r_rdi = tp->tf_rdi;
434 regs->r_rsi = tp->tf_rsi;
435 regs->r_rbp = tp->tf_rbp;
436 regs->r_rbx = tp->tf_rbx;
437 regs->r_rdx = tp->tf_rdx;
438 regs->r_rcx = tp->tf_rcx;
439 regs->r_rax = tp->tf_rax;
440 regs->r_rip = tp->tf_rip;
441 regs->r_cs = tp->tf_cs;
442 regs->r_rflags = tp->tf_rflags;
443 regs->r_rsp = tp->tf_rsp;
444 regs->r_ss = tp->tf_ss;
445 if (tp->tf_flags & TF_HASSEGS) {
446 regs->r_ds = tp->tf_ds;
447 regs->r_es = tp->tf_es;
448 regs->r_fs = tp->tf_fs;
449 regs->r_gs = tp->tf_gs;
450 } else {
451 regs->r_ds = 0;
452 regs->r_es = 0;
453 regs->r_fs = 0;
454 regs->r_gs = 0;
455 }
456 regs->r_err = 0;
457 regs->r_trapno = 0;
458 return (0);
459 }
460
461 int
set_regs(struct thread * td,struct reg * regs)462 set_regs(struct thread *td, struct reg *regs)
463 {
464 struct trapframe *tp;
465 register_t rflags;
466
467 tp = td->td_frame;
468 rflags = regs->r_rflags & 0xffffffff;
469 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
470 return (EINVAL);
471 tp->tf_r15 = regs->r_r15;
472 tp->tf_r14 = regs->r_r14;
473 tp->tf_r13 = regs->r_r13;
474 tp->tf_r12 = regs->r_r12;
475 tp->tf_r11 = regs->r_r11;
476 tp->tf_r10 = regs->r_r10;
477 tp->tf_r9 = regs->r_r9;
478 tp->tf_r8 = regs->r_r8;
479 tp->tf_rdi = regs->r_rdi;
480 tp->tf_rsi = regs->r_rsi;
481 tp->tf_rbp = regs->r_rbp;
482 tp->tf_rbx = regs->r_rbx;
483 tp->tf_rdx = regs->r_rdx;
484 tp->tf_rcx = regs->r_rcx;
485 tp->tf_rax = regs->r_rax;
486 tp->tf_rip = regs->r_rip;
487 tp->tf_cs = regs->r_cs;
488 tp->tf_rflags = rflags;
489 tp->tf_rsp = regs->r_rsp;
490 tp->tf_ss = regs->r_ss;
491 if (0) { /* XXXKIB */
492 tp->tf_ds = regs->r_ds;
493 tp->tf_es = regs->r_es;
494 tp->tf_fs = regs->r_fs;
495 tp->tf_gs = regs->r_gs;
496 tp->tf_flags = TF_HASSEGS;
497 }
498 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
499 return (0);
500 }
501
502 /* XXX check all this stuff! */
503 /* externalize from sv_xmm */
504 static void
fill_fpregs_xmm(struct savefpu * sv_xmm,struct fpreg * fpregs)505 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
506 {
507 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
508 struct envxmm *penv_xmm = &sv_xmm->sv_env;
509 int i;
510
511 /* pcb -> fpregs */
512 bzero(fpregs, sizeof(*fpregs));
513
514 /* FPU control/status */
515 penv_fpreg->en_cw = penv_xmm->en_cw;
516 penv_fpreg->en_sw = penv_xmm->en_sw;
517 penv_fpreg->en_tw = penv_xmm->en_tw;
518 penv_fpreg->en_opcode = penv_xmm->en_opcode;
519 penv_fpreg->en_rip = penv_xmm->en_rip;
520 penv_fpreg->en_rdp = penv_xmm->en_rdp;
521 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
522 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
523
524 /* FPU registers */
525 for (i = 0; i < 8; ++i)
526 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
527
528 /* SSE registers */
529 for (i = 0; i < 16; ++i)
530 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
531 }
532
533 /* internalize from fpregs into sv_xmm */
534 static void
set_fpregs_xmm(struct fpreg * fpregs,struct savefpu * sv_xmm)535 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
536 {
537 struct envxmm *penv_xmm = &sv_xmm->sv_env;
538 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
539 int i;
540
541 /* fpregs -> pcb */
542 /* FPU control/status */
543 penv_xmm->en_cw = penv_fpreg->en_cw;
544 penv_xmm->en_sw = penv_fpreg->en_sw;
545 penv_xmm->en_tw = penv_fpreg->en_tw;
546 penv_xmm->en_opcode = penv_fpreg->en_opcode;
547 penv_xmm->en_rip = penv_fpreg->en_rip;
548 penv_xmm->en_rdp = penv_fpreg->en_rdp;
549 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
550 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
551
552 /* FPU registers */
553 for (i = 0; i < 8; ++i)
554 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
555
556 /* SSE registers */
557 for (i = 0; i < 16; ++i)
558 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
559 }
560
561 /* externalize from td->pcb */
562 int
fill_fpregs(struct thread * td,struct fpreg * fpregs)563 fill_fpregs(struct thread *td, struct fpreg *fpregs)
564 {
565
566 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
567 P_SHOULDSTOP(td->td_proc),
568 ("not suspended thread %p", td));
569 fpugetregs(td);
570 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
571 return (0);
572 }
573
574 /* internalize to td->pcb */
575 int
set_fpregs(struct thread * td,struct fpreg * fpregs)576 set_fpregs(struct thread *td, struct fpreg *fpregs)
577 {
578
579 critical_enter();
580 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
581 fpuuserinited(td);
582 critical_exit();
583 return (0);
584 }
585
586 /*
587 * Get machine context.
588 */
589 int
get_mcontext(struct thread * td,mcontext_t * mcp,int flags)590 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
591 {
592 struct pcb *pcb;
593 struct trapframe *tp;
594
595 pcb = td->td_pcb;
596 tp = td->td_frame;
597 PROC_LOCK(curthread->td_proc);
598 mcp->mc_onstack = sigonstack(tp->tf_rsp);
599 PROC_UNLOCK(curthread->td_proc);
600 mcp->mc_r15 = tp->tf_r15;
601 mcp->mc_r14 = tp->tf_r14;
602 mcp->mc_r13 = tp->tf_r13;
603 mcp->mc_r12 = tp->tf_r12;
604 mcp->mc_r11 = tp->tf_r11;
605 mcp->mc_r10 = tp->tf_r10;
606 mcp->mc_r9 = tp->tf_r9;
607 mcp->mc_r8 = tp->tf_r8;
608 mcp->mc_rdi = tp->tf_rdi;
609 mcp->mc_rsi = tp->tf_rsi;
610 mcp->mc_rbp = tp->tf_rbp;
611 mcp->mc_rbx = tp->tf_rbx;
612 mcp->mc_rcx = tp->tf_rcx;
613 mcp->mc_rflags = tp->tf_rflags;
614 if (flags & GET_MC_CLEAR_RET) {
615 mcp->mc_rax = 0;
616 mcp->mc_rdx = 0;
617 mcp->mc_rflags &= ~PSL_C;
618 } else {
619 mcp->mc_rax = tp->tf_rax;
620 mcp->mc_rdx = tp->tf_rdx;
621 }
622 mcp->mc_rip = tp->tf_rip;
623 mcp->mc_cs = tp->tf_cs;
624 mcp->mc_rsp = tp->tf_rsp;
625 mcp->mc_ss = tp->tf_ss;
626 mcp->mc_ds = tp->tf_ds;
627 mcp->mc_es = tp->tf_es;
628 mcp->mc_fs = tp->tf_fs;
629 mcp->mc_gs = tp->tf_gs;
630 mcp->mc_flags = tp->tf_flags;
631 mcp->mc_len = sizeof(*mcp);
632 get_fpcontext(td, mcp, NULL, NULL);
633 update_pcb_bases(pcb);
634 mcp->mc_fsbase = pcb->pcb_fsbase;
635 mcp->mc_gsbase = pcb->pcb_gsbase;
636 mcp->mc_xfpustate = 0;
637 mcp->mc_xfpustate_len = 0;
638 mcp->mc_tlsbase = (pcb->pcb_flags & PCB_TLSBASE) != 0 ?
639 pcb->pcb_tlsbase : 0;
640 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
641 return (0);
642 }
643
644 /*
645 * Set machine context.
646 *
647 * However, we don't set any but the user modifiable flags, and we won't
648 * touch the cs selector.
649 */
650 int
set_mcontext(struct thread * td,mcontext_t * mcp)651 set_mcontext(struct thread *td, mcontext_t *mcp)
652 {
653 struct pcb *pcb;
654 struct trapframe *tp;
655 char *xfpustate;
656 long rflags;
657 int ret;
658
659 pcb = td->td_pcb;
660 tp = td->td_frame;
661 if (mcp->mc_len != sizeof(*mcp) ||
662 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
663 return (EINVAL);
664 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
665 (tp->tf_rflags & ~PSL_USERCHANGE);
666 if (mcp->mc_flags & _MC_HASFPXSTATE) {
667 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
668 sizeof(struct savefpu))
669 return (EINVAL);
670 xfpustate = (char *)fpu_save_area_alloc();
671 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
672 mcp->mc_xfpustate_len);
673 if (ret != 0) {
674 fpu_save_area_free((struct savefpu *)xfpustate);
675 return (ret);
676 }
677 } else
678 xfpustate = NULL;
679 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
680 fpu_save_area_free((struct savefpu *)xfpustate);
681 if (ret != 0)
682 return (ret);
683 tp->tf_r15 = mcp->mc_r15;
684 tp->tf_r14 = mcp->mc_r14;
685 tp->tf_r13 = mcp->mc_r13;
686 tp->tf_r12 = mcp->mc_r12;
687 tp->tf_r11 = mcp->mc_r11;
688 tp->tf_r10 = mcp->mc_r10;
689 tp->tf_r9 = mcp->mc_r9;
690 tp->tf_r8 = mcp->mc_r8;
691 tp->tf_rdi = mcp->mc_rdi;
692 tp->tf_rsi = mcp->mc_rsi;
693 tp->tf_rbp = mcp->mc_rbp;
694 tp->tf_rbx = mcp->mc_rbx;
695 tp->tf_rdx = mcp->mc_rdx;
696 tp->tf_rcx = mcp->mc_rcx;
697 tp->tf_rax = mcp->mc_rax;
698 tp->tf_rip = mcp->mc_rip;
699 tp->tf_rflags = rflags;
700 tp->tf_rsp = mcp->mc_rsp;
701 tp->tf_ss = mcp->mc_ss;
702 tp->tf_flags = mcp->mc_flags;
703 if (tp->tf_flags & TF_HASSEGS) {
704 tp->tf_ds = mcp->mc_ds;
705 tp->tf_es = mcp->mc_es;
706 tp->tf_fs = mcp->mc_fs;
707 tp->tf_gs = mcp->mc_gs;
708 }
709 set_pcb_flags(pcb, PCB_FULL_IRET);
710 if (mcp->mc_flags & _MC_HASBASES) {
711 pcb->pcb_fsbase = mcp->mc_fsbase;
712 pcb->pcb_gsbase = mcp->mc_gsbase;
713 }
714 if ((mcp->mc_flags & _MC_HASTLSBASE) != 0) {
715 pcb->pcb_tlsbase = mcp->mc_tlsbase;
716 set_pcb_flags(pcb, PCB_TLSBASE);
717 }
718 return (0);
719 }
720
721 void
get_fpcontext(struct thread * td,mcontext_t * mcp,char ** xfpusave,size_t * xfpusave_len)722 get_fpcontext(struct thread *td, mcontext_t *mcp, char **xfpusave,
723 size_t *xfpusave_len)
724 {
725 mcp->mc_ownedfp = fpugetregs(td);
726 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
727 sizeof(mcp->mc_fpstate));
728 mcp->mc_fpformat = fpuformat();
729 if (xfpusave == NULL)
730 return;
731 if (!use_xsave || cpu_max_ext_state_size <= sizeof(struct savefpu)) {
732 *xfpusave_len = 0;
733 *xfpusave = NULL;
734 } else {
735 mcp->mc_flags |= _MC_HASFPXSTATE;
736 *xfpusave_len = mcp->mc_xfpustate_len =
737 cpu_max_ext_state_size - sizeof(struct savefpu);
738 *xfpusave = (char *)(get_pcb_user_save_td(td) + 1);
739 }
740 }
741
742 int
set_fpcontext(struct thread * td,mcontext_t * mcp,char * xfpustate,size_t xfpustate_len)743 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
744 size_t xfpustate_len)
745 {
746 int error;
747
748 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
749 return (0);
750 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
751 return (EINVAL);
752 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
753 /* We don't care what state is left in the FPU or PCB. */
754 fpstate_drop(td);
755 error = 0;
756 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
757 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
758 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
759 xfpustate, xfpustate_len);
760 } else
761 return (EINVAL);
762 return (error);
763 }
764
765 void
fpstate_drop(struct thread * td)766 fpstate_drop(struct thread *td)
767 {
768
769 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
770 critical_enter();
771 if (PCPU_GET(fpcurthread) == td)
772 fpudrop();
773 /*
774 * XXX force a full drop of the fpu. The above only drops it if we
775 * owned it.
776 *
777 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
778 * drop. Dropping only to the pcb matches fnsave's behaviour.
779 * We only need to drop to !PCB_INITDONE in sendsig(). But
780 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
781 * have too many layers.
782 */
783 clear_pcb_flags(curthread->td_pcb,
784 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
785 critical_exit();
786 }
787
788 int
fill_dbregs(struct thread * td,struct dbreg * dbregs)789 fill_dbregs(struct thread *td, struct dbreg *dbregs)
790 {
791 struct pcb *pcb;
792
793 if (td == NULL) {
794 dbregs->dr[0] = rdr0();
795 dbregs->dr[1] = rdr1();
796 dbregs->dr[2] = rdr2();
797 dbregs->dr[3] = rdr3();
798 dbregs->dr[6] = rdr6();
799 dbregs->dr[7] = rdr7();
800 } else {
801 pcb = td->td_pcb;
802 dbregs->dr[0] = pcb->pcb_dr0;
803 dbregs->dr[1] = pcb->pcb_dr1;
804 dbregs->dr[2] = pcb->pcb_dr2;
805 dbregs->dr[3] = pcb->pcb_dr3;
806 dbregs->dr[6] = pcb->pcb_dr6;
807 dbregs->dr[7] = pcb->pcb_dr7;
808 }
809 dbregs->dr[4] = 0;
810 dbregs->dr[5] = 0;
811 dbregs->dr[8] = 0;
812 dbregs->dr[9] = 0;
813 dbregs->dr[10] = 0;
814 dbregs->dr[11] = 0;
815 dbregs->dr[12] = 0;
816 dbregs->dr[13] = 0;
817 dbregs->dr[14] = 0;
818 dbregs->dr[15] = 0;
819 return (0);
820 }
821
822 int
set_dbregs(struct thread * td,struct dbreg * dbregs)823 set_dbregs(struct thread *td, struct dbreg *dbregs)
824 {
825 struct pcb *pcb;
826 int i;
827
828 if (td == NULL) {
829 load_dr0(dbregs->dr[0]);
830 load_dr1(dbregs->dr[1]);
831 load_dr2(dbregs->dr[2]);
832 load_dr3(dbregs->dr[3]);
833 load_dr6(dbregs->dr[6]);
834 load_dr7(dbregs->dr[7]);
835 } else {
836 /*
837 * Don't let an illegal value for dr7 get set. Specifically,
838 * check for undefined settings. Setting these bit patterns
839 * result in undefined behaviour and can lead to an unexpected
840 * TRCTRAP or a general protection fault right here.
841 * Upper bits of dr6 and dr7 must not be set
842 */
843 for (i = 0; i < 4; i++) {
844 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
845 return (EINVAL);
846 if (td->td_frame->tf_cs == _ucode32sel &&
847 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
848 return (EINVAL);
849 }
850 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
851 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
852 return (EINVAL);
853
854 pcb = td->td_pcb;
855
856 /*
857 * Don't let a process set a breakpoint that is not within the
858 * process's address space. If a process could do this, it
859 * could halt the system by setting a breakpoint in the kernel
860 * (if ddb was enabled). Thus, we need to check to make sure
861 * that no breakpoints are being enabled for addresses outside
862 * process's address space.
863 *
864 * XXX - what about when the watched area of the user's
865 * address space is written into from within the kernel
866 * ... wouldn't that still cause a breakpoint to be generated
867 * from within kernel mode?
868 */
869
870 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
871 /* dr0 is enabled */
872 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
873 return (EINVAL);
874 }
875 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
876 /* dr1 is enabled */
877 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
878 return (EINVAL);
879 }
880 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
881 /* dr2 is enabled */
882 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
883 return (EINVAL);
884 }
885 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
886 /* dr3 is enabled */
887 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
888 return (EINVAL);
889 }
890
891 pcb->pcb_dr0 = dbregs->dr[0];
892 pcb->pcb_dr1 = dbregs->dr[1];
893 pcb->pcb_dr2 = dbregs->dr[2];
894 pcb->pcb_dr3 = dbregs->dr[3];
895 pcb->pcb_dr6 = dbregs->dr[6];
896 pcb->pcb_dr7 = dbregs->dr[7];
897
898 set_pcb_flags(pcb, PCB_DBREGS);
899 }
900
901 return (0);
902 }
903
904 void
reset_dbregs(void)905 reset_dbregs(void)
906 {
907
908 load_dr7(0); /* Turn off the control bits first */
909 load_dr0(0);
910 load_dr1(0);
911 load_dr2(0);
912 load_dr3(0);
913 load_dr6(0);
914 }
915
916 /*
917 * Return > 0 if a hardware breakpoint has been hit, and the
918 * breakpoint was in user space. Return 0, otherwise.
919 */
920 int
user_dbreg_trap(register_t dr6)921 user_dbreg_trap(register_t dr6)
922 {
923 u_int64_t dr7;
924 u_int64_t bp; /* breakpoint bits extracted from dr6 */
925 int nbp; /* number of breakpoints that triggered */
926 caddr_t addr[4]; /* breakpoint addresses */
927 int i;
928
929 bp = dr6 & DBREG_DR6_BMASK;
930 if (bp == 0) {
931 /*
932 * None of the breakpoint bits are set meaning this
933 * trap was not caused by any of the debug registers
934 */
935 return (0);
936 }
937
938 dr7 = rdr7();
939 if ((dr7 & 0x000000ff) == 0) {
940 /*
941 * all GE and LE bits in the dr7 register are zero,
942 * thus the trap couldn't have been caused by the
943 * hardware debug registers
944 */
945 return (0);
946 }
947
948 nbp = 0;
949
950 /*
951 * at least one of the breakpoints were hit, check to see
952 * which ones and if any of them are user space addresses
953 */
954
955 if (bp & 0x01) {
956 addr[nbp++] = (caddr_t)rdr0();
957 }
958 if (bp & 0x02) {
959 addr[nbp++] = (caddr_t)rdr1();
960 }
961 if (bp & 0x04) {
962 addr[nbp++] = (caddr_t)rdr2();
963 }
964 if (bp & 0x08) {
965 addr[nbp++] = (caddr_t)rdr3();
966 }
967
968 for (i = 0; i < nbp; i++) {
969 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
970 /*
971 * addr[i] is in user space
972 */
973 return (nbp);
974 }
975 }
976
977 /*
978 * None of the breakpoints are in user space.
979 */
980 return (0);
981 }
982