1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZBinaryConv : SDTypeProfile<1, 2, 63 [SDTCisInt<0>, 64 SDTCisInt<1>, 65 SDTCisSameAs<1, 2>]>; 66def SDT_ZTernary : SDTypeProfile<1, 3, 67 [SDTCisInt<0>, 68 SDTCisSameAs<0, 1>, 69 SDTCisSameAs<0, 2>, 70 SDTCisSameAs<0, 3>]>; 71def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 72 [SDTCisVT<0, i32>, 73 SDTCisPtrTy<1>, 74 SDTCisVT<2, i32>, 75 SDTCisVT<3, i32>, 76 SDTCisVT<4, i32>, 77 SDTCisVT<5, i32>]>; 78def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 79 [SDTCisVT<0, i32>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisVT<3, i32>, 83 SDTCisVT<4, i32>, 84 SDTCisVT<5, i32>, 85 SDTCisVT<6, i32>, 86 SDTCisVT<7, i32>]>; 87def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 88 [SDTCisInt<0>, 89 SDTCisVT<1, i32>, 90 SDTCisPtrTy<2>, 91 SDTCisSameAs<0, 3>, 92 SDTCisSameAs<0, 4>]>; 93def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 94 [SDTCisVT<0, untyped>, 95 SDTCisPtrTy<1>]>; 96def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 97 [SDTCisVT<0, untyped>, 98 SDTCisPtrTy<1>]>; 99def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 100 [SDTCisVT<0, untyped>, 101 SDTCisVT<1, i32>, 102 SDTCisPtrTy<2>, 103 SDTCisVT<3, untyped>, 104 SDTCisVT<4, untyped>]>; 105def SDT_ZMemMemLength : SDTypeProfile<0, 3, 106 [SDTCisPtrTy<0>, 107 SDTCisPtrTy<1>, 108 SDTCisVT<2, i64>]>; 109def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 110 [SDTCisVT<0, i32>, 111 SDTCisPtrTy<1>, 112 SDTCisPtrTy<2>, 113 SDTCisVT<3, i64>]>; 114def SDT_ZMemsetMVC : SDTypeProfile<0, 3, 115 [SDTCisPtrTy<0>, 116 SDTCisVT<1, i64>, 117 SDTCisVT<2, i32>]>; 118def SDT_ZString : SDTypeProfile<1, 3, 119 [SDTCisPtrTy<0>, 120 SDTCisPtrTy<1>, 121 SDTCisPtrTy<2>, 122 SDTCisVT<3, i32>]>; 123def SDT_ZStringCC : SDTypeProfile<2, 3, 124 [SDTCisPtrTy<0>, 125 SDTCisVT<1, i32>, 126 SDTCisPtrTy<2>, 127 SDTCisPtrTy<3>, 128 SDTCisVT<4, i32>]>; 129def SDT_ZIPM : SDTypeProfile<1, 1, 130 [SDTCisVT<0, i32>, 131 SDTCisVT<1, i32>]>; 132def SDT_ZPrefetch : SDTypeProfile<0, 2, 133 [SDTCisVT<0, i32>, 134 SDTCisPtrTy<1>]>; 135def SDT_ZStoreInherent : SDTypeProfile<0, 1, 136 [SDTCisPtrTy<0>]>; 137def SDT_ZTBegin : SDTypeProfile<1, 2, 138 [SDTCisVT<0, i32>, 139 SDTCisPtrTy<1>, 140 SDTCisVT<2, i32>]>; 141def SDT_ZADAENTRY : SDTypeProfile<1, 3, 142 [SDTCisPtrTy<0>, 143 SDTCisPtrTy<1>, 144 SDTCisPtrTy<2>, 145 SDTCisVT<3, i64>]>; 146def SDT_ZTEnd : SDTypeProfile<1, 0, 147 [SDTCisVT<0, i32>]>; 148def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 149 [SDTCisVec<0>, 150 SDTCisSameAs<0, 1>, 151 SDTCisVT<3, i32>]>; 152def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 153 [SDTCisVec<1>, 154 SDTCisVT<2, i32>]>; 155def SDT_ZReplicate : SDTypeProfile<1, 1, 156 [SDTCisVec<0>]>; 157def SDT_ZVecUnpack : SDTypeProfile<1, 1, 158 [SDTCisVec<1>]>; 159def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 160 [SDTCisVec<0>, 161 SDTCisVec<1>]>; 162def SDT_ZVecUnary : SDTypeProfile<1, 1, 163 [SDTCisVec<0>, 164 SDTCisSameAs<0, 1>]>; 165def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 166 [SDTCisVec<0>, 167 SDTCisVT<1, i32>, 168 SDTCisSameAs<0, 2>]>; 169def SDT_ZVecCompare : SDTypeProfile<1, 2, 170 [SDTCisSameAs<0, 1>, 171 SDTCisSameAs<0, 2>]>; 172def SDT_ZVecCompareCC : SDTypeProfile<2, 2, 173 [SDTCisVT<1, i32>, 174 SDTCisSameAs<0, 2>, 175 SDTCisSameAs<0, 2>]>; 176def SDT_ZVecBinary : SDTypeProfile<1, 2, 177 [SDTCisVec<0>, 178 SDTCisSameAs<0, 1>, 179 SDTCisSameAs<0, 2>]>; 180def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 181 [SDTCisVec<0>, 182 SDTCisVT<1, i32>, 183 SDTCisSameAs<0, 2>, 184 SDTCisSameAs<0, 2>]>; 185def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 186 [SDTCisVec<0>, 187 SDTCisSameAs<0, 1>, 188 SDTCisVT<2, i32>]>; 189def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 190 [SDTCisVec<0>, 191 SDTCisVec<1>, 192 SDTCisSameAs<1, 2>]>; 193def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 194 [SDTCisVec<0>, 195 SDTCisVT<1, i32>, 196 SDTCisVec<2>, 197 SDTCisSameAs<2, 3>]>; 198def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 199 [SDTCisVec<0>, 200 SDTCisVT<1, i32>, 201 SDTCisVec<2>, 202 SDTCisVT<3, i32>]>; 203def SDT_ZRotateMask : SDTypeProfile<1, 2, 204 [SDTCisVec<0>, 205 SDTCisVT<1, i32>, 206 SDTCisVT<2, i32>]>; 207def SDT_ZJoinDwords : SDTypeProfile<1, 2, 208 [SDTCisVT<0, v2i64>, 209 SDTCisVT<1, i64>, 210 SDTCisVT<2, i64>]>; 211def SDT_ZVecTernary : SDTypeProfile<1, 3, 212 [SDTCisVec<0>, 213 SDTCisSameAs<0, 1>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>]>; 216def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 217 [SDTCisVec<0>, 218 SDTCisVT<1, i32>, 219 SDTCisVec<2>, 220 SDTCisSameAs<2, 3>, 221 SDTCisSameAs<0, 4>]>; 222def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 223 [SDTCisVec<0>, 224 SDTCisSameAs<0, 1>, 225 SDTCisSameAs<0, 2>, 226 SDTCisVT<3, i32>]>; 227def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 228 [SDTCisVec<0>, 229 SDTCisVT<1, i32>, 230 SDTCisSameAs<0, 2>, 231 SDTCisSameAs<0, 3>, 232 SDTCisVT<4, i32>]>; 233def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 234 [SDTCisVec<0>, 235 SDTCisSameAs<0, 1>, 236 SDTCisSameAs<0, 2>, 237 SDTCisSameAs<0, 3>, 238 SDTCisVT<4, i32>]>; 239def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 240 [SDTCisVec<0>, 241 SDTCisVT<1, i32>, 242 SDTCisSameAs<0, 2>, 243 SDTCisSameAs<0, 3>, 244 SDTCisSameAs<0, 4>, 245 SDTCisVT<5, i32>]>; 246def SDT_ZTest : SDTypeProfile<1, 2, 247 [SDTCisVT<0, i32>, 248 SDTCisVT<2, i64>]>; 249 250def SDT_ZSetJmp : SDTypeProfile<1, 1, 251 [SDTCisInt<0>, 252 SDTCisPtrTy<1>]>; 253def SDT_ZLongJmp : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; 254 255 256//===----------------------------------------------------------------------===// 257// Node definitions 258//===----------------------------------------------------------------------===// 259 260// These are target-independent nodes, but have target-specific formats. 261def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 262 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 263def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 264 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 265 SDNPOutGlue]>; 266def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 267 268// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 269def z_retglue : SDNode<"SystemZISD::RET_GLUE", SDTNone, 270 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 271def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 272 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 273 SDNPVariadic]>; 274def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 275 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 276 SDNPVariadic]>; 277def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 278 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 279 SDNPVariadic]>; 280def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 281 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 282 SDNPVariadic]>; 283def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 284def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 285 SDT_ZWrapOffset, []>; 286def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 287def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 288def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 289 [SDNPHasChain]>; 290def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 291 [SDNPHasChain]>; 292def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 293def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 294 [SDNPHasChain]>; 295def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 296 SDT_ZSelectCCMask>; 297def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 298def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 299def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 300 [SDNPHasChain]>; 301def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 302def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 303def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 304def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 305def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 306def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 307def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 308def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 309def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 310def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 311def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 312def z_vacc : SDNode<"SystemZISD::VACC", SDTIntBinOp>; 313def z_vac : SDNode<"SystemZISD::VAC", SDT_ZTernary>; 314def z_vaccc : SDNode<"SystemZISD::VACCC", SDT_ZTernary>; 315def z_vscbi : SDNode<"SystemZISD::VSCBI", SDTIntBinOp>; 316def z_vsbi : SDNode<"SystemZISD::VSBI", SDT_ZTernary>; 317def z_vsbcbi : SDNode<"SystemZISD::VSBCBI", SDT_ZTernary>; 318def z_vmah : SDNode<"SystemZISD::VMAH", SDT_ZTernary>; 319def z_vmalh : SDNode<"SystemZISD::VMALH", SDT_ZTernary>; 320def z_vme : SDNode<"SystemZISD::VME", SDT_ZBinaryConv>; 321def z_vmle : SDNode<"SystemZISD::VMLE", SDT_ZBinaryConv>; 322def z_vmo : SDNode<"SystemZISD::VMO", SDT_ZBinaryConv>; 323def z_vmlo : SDNode<"SystemZISD::VMLO", SDT_ZBinaryConv>; 324 325def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 326 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 327def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 328 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 329def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 330 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 331def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 332 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 333def z_stckf : SDNode<"SystemZISD::STCKF", SDT_ZStoreInherent, 334 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 335 336def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 337 338def z_eh_sjlj_setjmp : SDNode<"ISD::EH_SJLJ_SETJMP", SDT_ZSetJmp, 339 [SDNPHasChain, SDNPSideEffect]>; 340def z_eh_sjlj_longjmp : SDNode<"ISD::EH_SJLJ_LONGJMP", SDT_ZLongJmp, 341 [SDNPHasChain, SDNPSideEffect]>; 342 343 344// Defined because the index is an i32 rather than a pointer. 345def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 346 SDT_ZInsertVectorElt>; 347def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 348 SDT_ZExtractVectorElt>; 349def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 350def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 351def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 352def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 353def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 354def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 355def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 356def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 357def z_shl_double_bit : SDNode<"SystemZISD::SHL_DOUBLE_BIT", SDT_ZVecTernaryInt>; 358def z_shr_double_bit : SDNode<"SystemZISD::SHR_DOUBLE_BIT", SDT_ZVecTernaryInt>; 359def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 360 SDT_ZVecTernaryInt>; 361def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 362def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 363def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 364def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 365def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnpack>; 366def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnpack>; 367def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnpack>; 368def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnpack>; 369def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 370 SDT_ZVecBinaryInt>; 371def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 372 SDT_ZVecBinaryInt>; 373def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 374 SDT_ZVecBinaryInt>; 375def z_vrotl_by_scalar : SDNode<"SystemZISD::VROTL_BY_SCALAR", 376 SDT_ZVecBinaryInt>; 377def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZBinaryConv>; 378def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecCompare>; 379def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecCompare>; 380def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecCompare>; 381def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecCompareCC>; 382def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecCompareCC>; 383def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecCompareCC>; 384def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 385def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 386 SDT_ZVecBinaryConv, [SDNPHasChain]>; 387def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 388 SDT_ZVecBinaryConv, [SDNPHasChain]>; 389def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 390def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 391 SDT_ZVecBinaryConv, [SDNPHasChain]>; 392def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 393 SDT_ZVecBinaryConv, [SDNPHasChain]>; 394def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 395def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 396 SDT_ZVecBinaryConv, [SDNPHasChain]>; 397def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 398 SDT_ZVecBinaryConv, [SDNPHasChain]>; 399def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 400def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 401def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 402def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 403def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 404 SDT_ZVecUnaryConv, [SDNPHasChain]>; 405def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 406def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 407 SDT_ZVecUnaryConv, [SDNPHasChain]>; 408def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 409def z_scmp128hi : SDNode<"SystemZISD::SCMP128HI", SDT_ZCmp>; 410def z_ucmp128hi : SDNode<"SystemZISD::UCMP128HI", SDT_ZCmp>; 411def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 412def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 413def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 414def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 415def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 416def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 417def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 418def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 419 SDT_ZVecQuaternaryIntCC>; 420def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 421 SDT_ZVecQuaternaryIntCC>; 422def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 423 SDT_ZVecTernaryConvCC>; 424def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 425 SDT_ZVecTernaryConvCC>; 426def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 427 428class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 429 : SDNode<"SystemZISD::"#name, profile, 430 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 431 432def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 433def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 434def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 435def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 436def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 437def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 438def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 439def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 440def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 441def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 442def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 443 444def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 445 SDT_ZAtomicCmpSwap, 446 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 447 SDNPMemOperand]>; 448def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 449 SDT_ZAtomicCmpSwapW, 450 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 451 SDNPMemOperand]>; 452 453def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 454 SDT_ZAtomicLoad128, 455 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 456def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 457 SDT_ZAtomicStore128, 458 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 459def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 460 SDT_ZAtomicCmpSwap128, 461 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 462 SDNPMemOperand]>; 463 464def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 465 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 466def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 467 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 468def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 469 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 470def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 471 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 472def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 473 [SDNPHasChain, SDNPMayLoad]>; 474def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC, 475 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 476def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 477 [SDNPHasChain, SDNPMayLoad]>; 478def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 479 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 480def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 481 [SDNPHasChain, SDNPMayLoad]>; 482def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 483 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 484 SDNPMemOperand]>; 485 486def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 487 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 488def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 489 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 490def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 491 [SDNPHasChain, SDNPSideEffect]>; 492 493def z_ada_entry : SDNode<"SystemZISD::ADA_ENTRY", 494 SDT_ZADAENTRY>; 495 496def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 497def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 498def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 499 500//===----------------------------------------------------------------------===// 501// Pattern fragments 502//===----------------------------------------------------------------------===// 503 504def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 505 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 506}]>; 507def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 508 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 509}]>; 510def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 511 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 512}]>; 513 514def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 515 (z_storebswap node:$src, node:$addr), [{ 516 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 517}]>; 518def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 519 (z_storebswap node:$src, node:$addr), [{ 520 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 521}]>; 522def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 523 (z_storebswap node:$src, node:$addr), [{ 524 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 525}]>; 526 527// Fragments including CC as an implicit source. 528def z_br_ccmask 529 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 530 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 531def z_select_ccmask 532 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 533 (z_select_ccmask_1 node:$true, node:$false, 534 node:$valid, node:$mask, CC)>; 535def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 536def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 537 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 538def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 539 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 540 541// Signed and unsigned comparisons. 542def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 543 unsigned Type = N->getConstantOperandVal(2); 544 return Type != SystemZICMP::UnsignedOnly; 545}]>; 546def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 547 unsigned Type = N->getConstantOperandVal(2); 548 return Type != SystemZICMP::SignedOnly; 549}]>; 550 551// Register- and memory-based TEST UNDER MASK. 552def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 553def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 554 555// Shifts by small immediate amounts. 556def shl1 : PatFrag<(ops node:$src), (shl node:$src, (i32 1))>; 557def shl2 : PatFrag<(ops node:$src), (shl node:$src, (i32 2))>; 558def shl3 : PatFrag<(ops node:$src), (shl node:$src, (i32 3))>; 559def shl4 : PatFrag<(ops node:$src), (shl node:$src, (i32 4))>; 560 561// Register sign-extend operations. Sub-32-bit values are represented as i32s. 562def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 563def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 564def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 565 566// Match extensions of an i32 to an i64, followed by an in-register sign 567// extension from a sub-i32 value. 568def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 569def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 570 571// Register zero-extend operations. Sub-32-bit values are represented as i32s. 572def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 573def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 574def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 575 576// Match a 64-bit value that is guaranteed to have been sign- 577// or zero-extended from a 32-bit value. 578def assertsext32 : PatFrag<(ops node:$src), (assertsext node:$src), [{ 579 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 580}]>; 581def assertzext32 : PatFrag<(ops node:$src), (assertzext node:$src), [{ 582 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 583}]>; 584 585// Match a load or a non-extending atomic load. 586def z_load : PatFrags<(ops node:$ptr), 587 [(load node:$ptr), 588 (atomic_load node:$ptr)], [{ 589 if (auto *AL = dyn_cast<AtomicSDNode>(N)) 590 if (AL->getExtensionType() != ISD::NON_EXTLOAD) 591 return false; 592 return true; 593}]>; 594 595// Sign extending (atomic) loads. 596def z_sextload : PatFrags<(ops node:$ptr), 597 [(unindexedload node:$ptr), 598 (atomic_load node:$ptr)], [{ 599 return getLoadExtType(N) == ISD::SEXTLOAD; 600}]>; 601def z_sextloadi8 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 602 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 603}]>; 604def z_sextloadi16 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 605 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 606}]>; 607def z_sextloadi32 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 608 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 609}]>; 610def z_sextloadi64 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 611 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 612}]>; 613 614// Zero extending (atomic) loads. 615def z_zextload : PatFrags<(ops node:$ptr), 616 [(unindexedload node:$ptr), 617 (atomic_load node:$ptr)], [{ 618 return getLoadExtType(N) == ISD::ZEXTLOAD; 619}]>; 620def z_zextloadi8 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 621 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 622}]>; 623def z_zextloadi16 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 624 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 625}]>; 626def z_zextloadi32 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 627 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 628}]>; 629def z_zextloadi64 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 630 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 631}]>; 632 633// Extending (atomic) loads in which the extension type can be signed. 634def z_asextload : PatFrags<(ops node:$ptr), 635 [(unindexedload node:$ptr), 636 (atomic_load node:$ptr)], [{ 637 ISD::LoadExtType ETy = getLoadExtType(N); 638 return ETy == ISD::EXTLOAD || ETy == ISD::SEXTLOAD; 639}]>; 640def z_asextloadi8 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 641 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 642}]>; 643def z_asextloadi16 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 644 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 645}]>; 646def z_asextloadi32 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 647 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 648}]>; 649 650// Extending (atomic) loads in which the extension type can be unsigned. 651def z_azextload : PatFrags<(ops node:$ptr), 652 [(unindexedload node:$ptr), 653 (atomic_load node:$ptr)], [{ 654 ISD::LoadExtType ETy = getLoadExtType(N); 655 return ETy == ISD::EXTLOAD || ETy == ISD::ZEXTLOAD; 656}]>; 657def z_azextloadi8 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 658 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 659}]>; 660def z_azextloadi16 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 661 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 662}]>; 663def z_azextloadi32 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 664 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 665}]>; 666 667// Extending (atomic) loads in which the extension type doesn't matter. 668def z_anyextload : PatFrags<(ops node:$ptr), 669 [(unindexedload node:$ptr), 670 (atomic_load node:$ptr)], [{ 671 return getLoadExtType(N) != ISD::NON_EXTLOAD; 672}]>; 673def z_anyextloadi8 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 674 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 675}]>; 676def z_anyextloadi16 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 677 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 678}]>; 679def z_anyextloadi32 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 680 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 681}]>; 682def z_anyextloadi64 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 683 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 684}]>; 685 686// Extending non-atomic loads in which the extension type doesn't matter. 687def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 688 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 689}]>; 690def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 691 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 692}]>; 693def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 694 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 695}]>; 696def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 697 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 698}]>; 699 700// Extending (atomic) loads that are not sign/zero extending. 701def z_extload : PatFrags<(ops node:$ptr), 702 [(extload node:$ptr), 703 (atomic_load node:$ptr)], [{ 704 return getLoadExtType(N) == ISD::EXTLOAD; 705}]>; 706def z_extloadi8 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 707 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 708}]>; 709def z_extloadi16 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 710 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 711}]>; 712def z_extloadi32 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 713 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 714}]>; 715def z_extloadi64 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 716 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 717}]>; 718 719// Extending atomic FP loads. 720def z_any_extloadf32 : PatFrags<(ops node:$ptr), 721 [(any_extloadf32 node:$ptr), 722 (any_fpextend (f32 (atomic_load node:$ptr)))]>; 723def z_any_extloadf64 : PatFrags<(ops node:$ptr), 724 [(any_extloadf64 node:$ptr), 725 (any_fpextend (f64 (atomic_load node:$ptr)))]>; 726 727// Aligned loads. 728class AlignedLoad<SDPatternOperator load> 729 : PatFrag<(ops node:$addr), (load node:$addr), 730 [{ return storeLoadIsAligned(N); }]>; 731def aligned_z_load : AlignedLoad<z_load>; 732def aligned_z_asextloadi16 : AlignedLoad<z_asextloadi16>; 733def aligned_z_asextloadi32 : AlignedLoad<z_asextloadi32>; 734def aligned_z_azextloadi16 : AlignedLoad<z_azextloadi16>; 735def aligned_z_azextloadi32 : AlignedLoad<z_azextloadi32>; 736 737// Aligned stores. 738class AlignedStore<SDPatternOperator store> 739 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), 740 [{ return storeLoadIsAligned(N); }]>; 741def aligned_store : AlignedStore<store>; 742def aligned_truncstorei16 : AlignedStore<truncstorei16>; 743def aligned_truncstorei32 : AlignedStore<truncstorei32>; 744 745// Non-volatile loads. Used for instructions that might access the storage 746// location multiple times. 747class NonvolatileLoad<SDPatternOperator load> 748 : PatFrag<(ops node:$addr), (load node:$addr), [{ 749 auto *Load = cast<LoadSDNode>(N); 750 return !Load->isVolatile(); 751}]>; 752def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 753def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 754def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 755 756// Non-volatile stores. 757class NonvolatileStore<SDPatternOperator store> 758 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 759 auto *Store = cast<StoreSDNode>(N); 760 return !Store->isVolatile(); 761}]>; 762def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 763def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 764def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 765 766// A store of a load that can be implemented using MVC. 767def mvc_store : PatFrag<(ops node:$value, node:$addr), 768 (unindexedstore node:$value, node:$addr), 769 [{ return storeLoadCanUseMVC(N); }]>; 770 771// Binary read-modify-write operations on memory in which the other 772// operand is also memory and for which block operations like NC can 773// be used. There are two patterns for each operator, depending on 774// which operand contains the "other" load. 775multiclass block_op<SDPatternOperator operator> { 776 def "1" : PatFrag<(ops node:$value, node:$addr), 777 (unindexedstore (operator node:$value, 778 (unindexedload node:$addr)), 779 node:$addr), 780 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 781 def "2" : PatFrag<(ops node:$value, node:$addr), 782 (unindexedstore (operator (unindexedload node:$addr), 783 node:$value), 784 node:$addr), 785 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 786} 787defm block_and : block_op<and>; 788defm block_or : block_op<or>; 789defm block_xor : block_op<xor>; 790 791// Insertions. 792class insert_imm<int mask> : PatFrag<(ops node:$src1, node:$src2), 793 (or (and node:$src1, mask), node:$src2)>; 794 795def inserti8 : insert_imm<-256>; 796def insertll : insert_imm<0xffff0000>; 797def insertlh : insert_imm<0x0000ffff>; 798def insertll64 : insert_imm<0xffffffffffff0000>; 799def insertlh64 : insert_imm<0xffffffff0000ffff>; 800def inserthl64 : insert_imm<0xffff0000ffffffff>; 801def inserthh64 : insert_imm<0x0000ffffffffffff>; 802def insertlf : insert_imm<0xffffffff00000000>; 803def inserthf : insert_imm<0x00000000ffffffff>; 804 805// ORs that can be treated as insertions. 806def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 807 (or node:$src1, node:$src2), [{ 808 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 809 return CurDAG->MaskedValueIsZero(N->getOperand(0), 810 APInt::getLowBitsSet(BitWidth, 8)); 811}]>; 812 813// ORs that can be treated as reversed insertions. 814def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 815 (or node:$src1, node:$src2), [{ 816 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 817 return CurDAG->MaskedValueIsZero(N->getOperand(1), 818 APInt::getLowBitsSet(BitWidth, 8)); 819}]>; 820 821// Negative integer absolute. 822def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>; 823 824// Integer multiply-and-add 825class z_muladd<SDPatternOperator mulop> 826 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 827 (add (mulop node:$src1, node:$src2), node:$src3)>; 828 829// Alternatives to match operations with or without an overflow CC result. 830def z_sadd : PatFrags<(ops node:$src1, node:$src2), 831 [(z_saddo node:$src1, node:$src2), 832 (add node:$src1, node:$src2)]>; 833def z_uadd : PatFrags<(ops node:$src1, node:$src2), 834 [(z_uaddo node:$src1, node:$src2), 835 (add node:$src1, node:$src2)]>; 836def z_ssub : PatFrags<(ops node:$src1, node:$src2), 837 [(z_ssubo node:$src1, node:$src2), 838 (sub node:$src1, node:$src2)]>; 839def z_usub : PatFrags<(ops node:$src1, node:$src2), 840 [(z_usubo node:$src1, node:$src2), 841 (sub node:$src1, node:$src2)]>; 842 843// Combined logical operations. 844def andc : PatFrag<(ops node:$src1, node:$src2), 845 (and node:$src1, (not node:$src2))>; 846def orc : PatFrag<(ops node:$src1, node:$src2), 847 (or node:$src1, (not node:$src2))>; 848def nand : PatFrag<(ops node:$src1, node:$src2), 849 (not (and node:$src1, node:$src2))>; 850def nor : PatFrag<(ops node:$src1, node:$src2), 851 (not (or node:$src1, node:$src2))>; 852def nxor : PatFrag<(ops node:$src1, node:$src2), 853 (not (xor node:$src1, node:$src2))>; 854 855// Fused multiply-subtract, using the natural operand order. 856def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 857 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 858 859// Fused multiply-add and multiply-subtract, but with the order of the 860// operands matching SystemZ's MA and MS instructions. 861def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 862 (any_fma node:$src2, node:$src3, node:$src1)>; 863def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 864 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 865 866// Negative fused multiply-add and multiply-subtract. 867def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 868 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 869def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 870 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 871 872// Floating-point negative absolute. 873def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 874 875// Floating-point operations which will not participate in reassociation, and 876// therefore are candidates for reg/mem folding during isel. 877def z_any_fadd_noreassoc : PatFrag<(ops node:$src1, node:$src2), 878 (any_fadd node:$src1, node:$src2), 879 [{ return !shouldSelectForReassoc(N); }]>; 880def z_any_fsub_noreassoc : PatFrag<(ops node:$src1, node:$src2), 881 (any_fsub node:$src1, node:$src2), 882 [{ return !shouldSelectForReassoc(N); }]>; 883def z_any_fmul_noreassoc : PatFrag<(ops node:$src1, node:$src2), 884 (any_fmul node:$src1, node:$src2), 885 [{ return !shouldSelectForReassoc(N); }]>; 886 887// Strict floating-point fragments. 888def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 889 [(z_strict_fcmp node:$lhs, node:$rhs), 890 (z_fcmp node:$lhs, node:$rhs)]>; 891def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 892 [(z_strict_vfcmpe node:$lhs, node:$rhs), 893 (z_vfcmpe node:$lhs, node:$rhs)]>; 894def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 895 [(z_strict_vfcmph node:$lhs, node:$rhs), 896 (z_vfcmph node:$lhs, node:$rhs)]>; 897def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 898 [(z_strict_vfcmphe node:$lhs, node:$rhs), 899 (z_vfcmphe node:$lhs, node:$rhs)]>; 900def z_any_vextend : PatFrags<(ops node:$src), 901 [(z_strict_vextend node:$src), 902 (z_vextend node:$src)]>; 903def z_any_vround : PatFrags<(ops node:$src), 904 [(z_strict_vround node:$src), 905 (z_vround node:$src)]>; 906 907// Create a unary operator that loads from memory and then performs 908// the given operation on it. 909class loadu<SDPatternOperator operator, SDPatternOperator load = z_load> 910 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 911 912// Create a store operator that performs the given unary operation 913// on the value before storing it. 914class storeu<SDPatternOperator operator, SDPatternOperator store = store> 915 : PatFrag<(ops node:$value, node:$addr), 916 (store (operator node:$value), node:$addr)>; 917 918// Create a store operator that performs the given inherent operation 919// and stores the resulting value. 920class storei<SDPatternOperator operator, SDPatternOperator store = store> 921 : PatFrag<(ops node:$addr), 922 (store (operator), node:$addr)>; 923 924// Create a shift operator that optionally ignores an AND of the 925// shift count with an immediate if the bottom 6 bits are all set. 926def imm32bottom6set : PatLeaf<(i32 imm), [{ 927 return (N->getZExtValue() & 0x3f) == 0x3f; 928}]>; 929class shiftop<SDPatternOperator operator> 930 : PatFrags<(ops node:$val, node:$count), 931 [(operator node:$val, node:$count), 932 (operator node:$val, (and node:$count, imm32bottom6set))]>; 933 934// Create a shift operator that optionally ignores an AND of the 935// shift count with an immediate if the bottom 7 bits are all set. 936def imm32bottom7set : PatLeaf<(i32 imm), [{ 937 return (N->getZExtValue() & 0x7f) == 0x7f; 938}]>; 939class vshiftop<SDPatternOperator operator> 940 : PatFrags<(ops node:$val, node:$count), 941 [(operator node:$val, node:$count), 942 (operator node:$val, (and node:$count, imm32bottom7set))]>; 943 944def imm32mod64 : PatLeaf<(i32 imm), [{ 945 return (N->getZExtValue() % 64 == 0); 946}]>; 947 948def imm32nobits : PatLeaf<(i32 imm), [{ 949 return (N->getZExtValue() & 0x07) == 0; 950}]>; 951def imm32nobytes : PatLeaf<(i32 imm), [{ 952 return (N->getZExtValue() & 0x78) == 0; 953}]>; 954 955// Load a scalar and replicate it in all elements of a vector. 956class z_replicate_load<ValueType scalartype, SDPatternOperator load> 957 : PatFrag<(ops node:$addr), 958 (z_replicate (scalartype (load node:$addr)))>; 959def z_replicate_loadi8 : z_replicate_load<i32, z_anyextloadi8>; 960def z_replicate_loadi16 : z_replicate_load<i32, z_anyextloadi16>; 961def z_replicate_loadi32 : z_replicate_load<i32, z_load>; 962def z_replicate_loadi64 : z_replicate_load<i64, z_load>; 963def z_replicate_loadf32 : z_replicate_load<f32, z_load>; 964def z_replicate_loadf64 : z_replicate_load<f64, z_load>; 965// Byte-swapped replicated vector element loads. 966def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 967def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 968def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 969 970// Load a scalar and insert it into a single element of a vector. 971class z_vle<ValueType scalartype, SDPatternOperator load> 972 : PatFrag<(ops node:$vec, node:$addr, node:$index), 973 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 974 node:$index)>; 975def z_vlei8 : z_vle<i32, z_anyextloadi8>; 976def z_vlei16 : z_vle<i32, z_anyextloadi16>; 977def z_vlei32 : z_vle<i32, z_load>; 978def z_vlei64 : z_vle<i64, z_load>; 979def z_vlef32 : z_vle<f32, z_load>; 980def z_vlef64 : z_vle<f64, z_load>; 981// Byte-swapped vector element loads. 982def z_vlebri16 : z_vle<i32, z_loadbswap16>; 983def z_vlebri32 : z_vle<i32, z_loadbswap32>; 984def z_vlebri64 : z_vle<i64, z_loadbswap64>; 985 986// Load a scalar and insert it into the low element of the high i64 of a 987// zeroed vector. 988class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 989 : PatFrag<(ops node:$addr), 990 (z_vector_insert immAllZerosV, 991 (scalartype (load node:$addr)), (i32 index))>; 992def z_vllezi8 : z_vllez<i32, z_anyextloadi8, 7>; 993def z_vllezi16 : z_vllez<i32, z_anyextloadi16, 3>; 994def z_vllezi32 : z_vllez<i32, z_load, 1>; 995def z_vllezi64 : PatFrags<(ops node:$addr), 996 [(z_vector_insert immAllZerosV, 997 (i64 (z_load node:$addr)), (i32 0)), 998 (z_join_dwords (i64 (z_load node:$addr)), (i64 0))]>; 999// We use high merges to form a v4f32 from four f32s. Propagating zero 1000// into all elements but index 1 gives this expression. 1001def z_vllezf32 : PatFrag<(ops node:$addr), 1002 (z_merge_high 1003 (v2i64 1004 (z_unpackl_high 1005 (v4i32 1006 (bitconvert 1007 (v4f32 (scalar_to_vector 1008 (f32 (z_load node:$addr)))))))), 1009 (v2i64 1010 (bitconvert (v4f32 immAllZerosV))))>; 1011def z_vllezf64 : PatFrag<(ops node:$addr), 1012 (z_merge_high 1013 (v2f64 (scalar_to_vector (f64 (z_load node:$addr)))), 1014 immAllZerosV)>; 1015 1016// Similarly for the high element of a zeroed vector. 1017def z_vllezli32 : z_vllez<i32, z_load, 0>; 1018def z_vllezlf32 : PatFrag<(ops node:$addr), 1019 (z_merge_high 1020 (v2i64 1021 (bitconvert 1022 (z_merge_high 1023 (v4f32 (scalar_to_vector 1024 (f32 (z_load node:$addr)))), 1025 (v4f32 immAllZerosV)))), 1026 (v2i64 1027 (bitconvert (v4f32 immAllZerosV))))>; 1028 1029// Byte-swapped variants. 1030def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 1031def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 1032def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 1033def z_vllebrzi64 : PatFrags<(ops node:$addr), 1034 [(z_vector_insert immAllZerosV, 1035 (i64 (z_loadbswap64 node:$addr)), 1036 (i32 0)), 1037 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 1038 (i64 0))]>; 1039 1040 1041// Store one element of a vector. 1042class z_vste<ValueType scalartype, SDPatternOperator store> 1043 : PatFrag<(ops node:$vec, node:$addr, node:$index), 1044 (store (scalartype (z_vector_extract node:$vec, node:$index)), 1045 node:$addr)>; 1046def z_vstei8 : z_vste<i32, truncstorei8>; 1047def z_vstei16 : z_vste<i32, truncstorei16>; 1048def z_vstei32 : z_vste<i32, store>; 1049def z_vstei64 : z_vste<i64, store>; 1050def z_vstef32 : z_vste<f32, store>; 1051def z_vstef64 : z_vste<f64, store>; 1052// Byte-swapped vector element stores. 1053def z_vstebri16 : z_vste<i32, z_storebswap16>; 1054def z_vstebri32 : z_vste<i32, z_storebswap32>; 1055def z_vstebri64 : z_vste<i64, z_storebswap64>; 1056 1057// Arithmetic negation on vectors. 1058def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 1059 1060// Bitwise negation on vectors. 1061def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 1062 1063// In-register element-wise zero extension from i1 on vectors. 1064def vsplat_imm_eq_1 : PatFrag<(ops), (build_vector), [{ 1065 APInt Imm; 1066 return ISD::isConstantSplatVector(N, Imm) && Imm == 1; 1067}]>; 1068def z_vzext1 : PatFrag<(ops node:$x), (and node:$x, vsplat_imm_eq_1)>; 1069 1070// Signed "integer greater than zero" on vectors. 1071def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 1072 1073// Signed "integer less than zero" on vectors. 1074def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 1075 1076// Sign-extend the i64 elements of a vector. 1077class z_vse<int shift> 1078 : PatFrag<(ops node:$src), 1079 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 1080def z_vsei8 : z_vse<56>; 1081def z_vsei16 : z_vse<48>; 1082def z_vsei32 : z_vse<32>; 1083 1084// ...and again with the extensions being done on individual i64 scalars. 1085class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 1086 : PatFrag<(ops node:$src), 1087 (z_join_dwords 1088 (operator (z_vector_extract node:$src, index1)), 1089 (operator (z_vector_extract node:$src, index2)))>; 1090def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 1091def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 1092def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 1093