xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZCallingConv.td (revision 700637cbb5e582861067a11aaca4d053546871d2)
1//=- SystemZCallingConv.td - Calling conventions for SystemZ -*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This describes the calling conventions for the SystemZ ABI.
9//===----------------------------------------------------------------------===//
10
11class CCIfExtend<CCAction A>
12  : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
13
14class CCIfSubtarget<string F, CCAction A>
15  : CCIf<!strconcat("State.getMachineFunction()."
16                    "getSubtarget<SystemZSubtarget>().", F),
17         A>;
18
19// Match if this specific argument is a fixed (i.e. named) argument.
20class CCIfFixed<CCAction A>
21    : CCIf<"static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)", A>;
22
23// Match if this specific argument is not a fixed (i.e. vararg) argument.
24class CCIfNotFixed<CCAction A>
25    : CCIf<"!(static_cast<SystemZCCState *>(&State)->IsFixed(ValNo))", A>;
26
27// Match if this specific argument was widened from a short vector type.
28class CCIfShortVector<CCAction A>
29    : CCIf<"static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)", A>;
30
31
32//===----------------------------------------------------------------------===//
33// z/Linux return value calling convention
34//===----------------------------------------------------------------------===//
35def RetCC_SystemZ_ELF : CallingConv<[
36  // Promote i32 to i64 if it has an explicit extension type.
37  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
38
39  // A SwiftError is returned in R9.
40  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
41
42  // ABI-compliant code returns 64-bit integers in R2.  Make the other
43  // call-clobbered argument registers available for code that doesn't
44  // care about the ABI.  (R6 is an argument register too, but is
45  // call-saved and therefore not suitable for return values.)
46  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L]>>,
47  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
48
49  // ABI-complaint code returns float and double in F0.  Make the
50  // other floating-point argument registers available for code that
51  // doesn't care about the ABI.  All floating-point argument registers
52  // are call-clobbered, so we can use all of them here.
53  CCIfType<[f16], CCAssignToReg<[F0H, F2H, F4H, F6H]>>,
54  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
55  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
56
57  // Similarly for vectors, with V24 being the ABI-compliant choice.
58  // Sub-128 vectors are returned in the same way, but they're widened
59  // to one of these types during type legalization.
60  CCIfSubtarget<"hasVector()",
61    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
62             CCAssignToReg<[V24, V26, V28, V30, V25, V27, V29, V31]>>>
63]>;
64
65//===----------------------------------------------------------------------===//
66// z/Linux argument calling conventions for GHC
67//===----------------------------------------------------------------------===//
68def CC_SystemZ_GHC : CallingConv<[
69  // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, R5, R6, R7, R8, SpLim
70  CCIfType<[i64], CCAssignToReg<[R7D, R8D, R10D, R11D, R12D, R13D,
71                                 R6D, R2D, R3D, R4D, R5D, R9D]>>,
72
73  // Pass in STG registers: F1, ..., F6
74  CCIfType<[f32], CCAssignToReg<[F8S, F9S, F10S, F11S, F0S, F1S]>>,
75
76  // Pass in STG registers: D1, ..., D6
77  CCIfType<[f64], CCAssignToReg<[F12D, F13D, F14D, F15D, F2D, F3D]>>,
78
79  // Pass in STG registers: XMM1, ..., XMM6
80  CCIfSubtarget<"hasVector()",
81    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
82             CCIfFixed<CCAssignToReg<[V16, V17, V18, V19, V20, V21]>>>>,
83
84  // Fail otherwise
85  CCCustom<"CC_SystemZ_GHC_Error">
86]>;
87
88//===----------------------------------------------------------------------===//
89// z/Linux argument calling conventions
90//===----------------------------------------------------------------------===//
91def CC_SystemZ_ELF : CallingConv<[
92  CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
93
94  // Promote i32 to i64 if it has an explicit extension type.
95  // The convention is that true integer arguments that are smaller
96  // than 64 bits should be marked as extended, but structures that
97  // are smaller than 64 bits shouldn't.
98  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
99
100  // A SwiftSelf is passed in callee-saved R10.
101  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
102
103  // A SwiftError is passed in callee-saved R9.
104  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
105
106  // Force i128 (if the type is legal) and long double values to the stack
107  // and pass i64 pointers to them.
108  CCIfType<[i128, f128], CCPassIndirect<i64>>,
109  // If i128 is not legal, such values are already split into two i64 here,
110  // so we have to use a custom handler.
111  CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
112
113  // The first 5 integer arguments are passed in R2-R6.  Note that R6
114  // is call-saved.
115  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L, R6L]>>,
116  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D, R6D]>>,
117
118  // The first 4 float and double arguments are passed in even registers F0-F6.
119  CCIfType<[f16], CCAssignToReg<[F0H, F2H, F4H, F6H]>>,
120  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
121  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
122
123  // The first 8 named vector arguments are passed in V24-V31.  Sub-128 vectors
124  // are passed in the same way, but they're widened to one of these types
125  // during type legalization.
126  CCIfSubtarget<"hasVector()",
127    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
128             CCIfFixed<CCAssignToReg<[V24, V26, V28, V30,
129                                      V25, V27, V29, V31]>>>>,
130
131  // However, sub-128 vectors which need to go on the stack occupy just a
132  // single 8-byte-aligned 8-byte stack slot.  Pass as i64.
133  CCIfSubtarget<"hasVector()",
134    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
135             CCIfShortVector<CCBitConvertToType<i64>>>>,
136
137  // Other vector arguments are passed in 8-byte-aligned 16-byte stack slots.
138  CCIfSubtarget<"hasVector()",
139    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
140             CCAssignToStack<16, 8>>>,
141
142  // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
143  CCIfType<[i32, i64, f16, f32, f64], CCAssignToStack<8, 8>>
144]>;
145
146//===----------------------------------------------------------------------===//
147// z/Linux callee-saved registers
148//===----------------------------------------------------------------------===//
149def CSR_SystemZ_ELF : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
150                                       (sequence "F%dD", 8, 15))>;
151
152// R9 is used to return SwiftError; remove it from CSR.
153def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ_ELF, R9D)>;
154
155// "All registers" as used by the AnyReg calling convention.
156// Note that registers 0 and 1 are still defined as intra-call scratch
157// registers that may be clobbered e.g. by PLT stubs.
158def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
159                                               (sequence "F%dD", 0, 15))>;
160def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
161                                                      (sequence "V%d", 0, 31))>;
162
163def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
164
165//===----------------------------------------------------------------------===//
166// z/OS XPLINK64 callee-saved registers
167//===----------------------------------------------------------------------===//
168def CSR_SystemZ_XPLINK64 : CalleeSavedRegs<(add (sequence "R%dD", 8, 15),
169                                                (sequence "F%dD", 15, 8))>;
170
171def CSR_SystemZ_XPLINK64_Vector : CalleeSavedRegs<(add CSR_SystemZ_XPLINK64,
172                                                   (sequence "V%d", 23, 16))>;
173
174//===----------------------------------------------------------------------===//
175// z/OS XPLINK64 return value calling convention
176//===----------------------------------------------------------------------===//
177def RetCC_SystemZ_XPLINK64 : CallingConv<[
178  // XPLINK64 ABI compliant code widens integral types smaller than i64
179  // to i64.
180  CCIfType<[i32], CCPromoteToType<i64>>,
181
182  // Structs of size 1-24 bytes are returned in R1D, R2D, and R3D.
183  CCIfType<[i64], CCIfInReg<CCAssignToReg<[R1D, R2D, R3D]>>>,
184  // An i64 is returned in R3D. R2D and R1D provided for ABI non-compliant
185  // code.
186  CCIfType<[i64], CCAssignToReg<[R3D, R2D, R1D]>>,
187
188  // ABI compliant code returns floating point values in FPR0, FPR2, FPR4
189  // and FPR6, using as many registers as required.
190  // All floating point return-value registers are call-clobbered.
191  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
192  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
193
194  // ABI compliant code returns f128 in F0D and F2D, hence F0Q.
195  // F4D and F6D, hence F4Q are used for complex long double types.
196  CCIfType<[f128], CCAssignToReg<[F0Q,F4Q]>>,
197
198  // ABI compliant code returns vectors in VR24 but other registers
199  // are provided for code that does not care about the ABI.
200  CCIfSubtarget<"hasVector()",
201    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
202             CCAssignToReg<[V24, V25, V26, V27, V28, V29, V30, V31]>>>
203]>;
204
205//===----------------------------------------------------------------------===//
206// z/OS XPLINK64 argument calling conventions
207//===----------------------------------------------------------------------===//
208// XPLink uses a logical argument list consisting of contiguous register-size
209// words (8 bytes in 64-Bit mode) where some arguments are passed in registers
210// and some in storage.
211// Even though 3 GPRs, 4 FPRs, and 8 VRs may be used,
212// space must be reserved for all the args on stack.
213// The first three register-sized words of the parameter area are passed in
214// GPRs 1-3. FP values and vector-type arguments are instead passed in FPRs
215// and VRs respectively, but if a FP value or vector argument occupies one of
216// the first three register-sized words of the parameter area, the corresponding
217// GPR's value is not used to pass arguments.
218//
219// The XPLINK64 Calling Convention is fully specified in Chapter 22 of the z/OS
220// Language Environment Vendor Interfaces. Appendix B of the same document contains
221// examples.
222
223def CC_SystemZ_XPLINK64 : CallingConv<[
224  // XPLINK64 ABI compliant code widens integral types smaller than i64
225  // to i64 before placing the parameters either on the stack or in registers.
226  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
227  // Promote f32 to f64 and bitcast to i64, if it needs to be passed in GPRs.
228  // Although we assign the f32 vararg to be bitcast, it will first be promoted
229  // to an f64 within convertValVTToLocVT().
230  CCIfType<[f32, f64], CCIfNotFixed<CCBitConvertToType<i64>>>,
231  // Pointers are always passed in full 64-bit registers.
232  CCIfPtr<CCCustom<"CC_XPLINK64_Pointer">>,
233  // long double, can only be passed in GPR2 and GPR3, if available,
234  // hence R2Q
235  CCIfType<[f128], CCIfNotFixed<CCCustom<"CC_XPLINK64_Allocate128BitVararg">>>,
236  // Non fixed vector arguments are treated in the same way as long
237  // doubles.
238  CCIfSubtarget<"hasVector()",
239    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
240      CCIfNotFixed<CCCustom<"CC_XPLINK64_Allocate128BitVararg">>>>,
241
242  // A SwiftSelf is passed in callee-saved R10.
243  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
244
245  // A SwiftError is passed in R0.
246  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R0D]>>>,
247
248  // Force i128 values to the stack and pass i64 pointers to them.
249  CCIfType<[i128], CCPassIndirect<i64>>,
250  // If i128 is not legal, such values are already split into two i64 here,
251  // so we have to use a custom handler.
252  CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
253  // The first 3 integer arguments are passed in registers R1D-R3D.
254  // The rest will be passed in the user area. The address offset of the user
255  // area can be found in register R4D.
256  CCIfType<[i64], CCAssignToRegAndStack<[R1D, R2D, R3D], 8, 8>>,
257
258  // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
259  // are passed in the same way, but they're widened to one of these types
260  // during type legalization.
261  CCIfSubtarget<"hasVector()",
262    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
263      CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>>,
264  CCIfSubtarget<"hasVector()",
265    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
266              CCIfFixed<CCAssignToRegAndStack<[V24, V25, V26, V27,
267                                               V28, V29, V30, V31], 16, 8>>>>,
268
269  // The first 4 named float and double arguments are passed in registers
270  // FPR0-FPR6. The rest will be passed in the user area.
271  CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
272  CCIfType<[f32], CCIfFixed<CCAssignToRegAndStack<[F0S, F2S, F4S, F6S], 4, 8>>>,
273  CCIfType<[f64], CCIfFixed<CCAssignToRegAndStack<[F0D, F2D, F4D, F6D], 8, 8>>>,
274
275  // The first 2 long double arguments are passed in register FPR0/FPR2
276  // and FPR4/FPR6. The rest will be passed in the user area.
277  CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
278  CCIfType<[f128], CCIfFixed<CCAssignToRegAndStack<[F0Q, F4Q], 16, 8>>>,
279
280  // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
281  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
282  // Other f128 arguments are passed in 8-byte-aligned 16-byte stack slots.
283  CCIfType<[f128], CCAssignToStack<16, 8>>,
284  // Vector arguments are passed in 8-byte-alinged 16-byte stack slots too.
285  CCIfSubtarget<"hasVector()",
286    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
287             CCAssignToStack<16, 8>>>
288]>;
289
290//===----------------------------------------------------------------------===//
291// s390x return value calling convention
292//===----------------------------------------------------------------------===//
293
294def RetCC_SystemZ : CallingConv<[
295  // zOS XPLINK64
296  CCIfSubtarget<"isTargetXPLINK64()", CCDelegateTo<RetCC_SystemZ_XPLINK64>>,
297
298  // ELF Linux SystemZ
299  CCIfSubtarget<"isTargetELF()", CCDelegateTo<RetCC_SystemZ_ELF>>
300]>;
301
302
303//===----------------------------------------------------------------------===//
304// s390x argument calling conventions
305//===----------------------------------------------------------------------===//
306def CC_SystemZ : CallingConv<[
307  // zOS XPLINK64
308  CCIfSubtarget<"isTargetXPLINK64()", CCDelegateTo<CC_SystemZ_XPLINK64>>,
309
310  // ELF Linux SystemZ
311  CCIfSubtarget<"isTargetELF()", CCDelegateTo<CC_SystemZ_ELF>>
312]>;
313