1 //===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements semantic analysis functions specific to X86.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "clang/Sema/SemaX86.h"
14 #include "clang/Basic/DiagnosticSema.h"
15 #include "clang/Basic/TargetBuiltins.h"
16 #include "clang/Basic/TargetInfo.h"
17 #include "clang/Sema/Attr.h"
18 #include "clang/Sema/ParsedAttr.h"
19 #include "clang/Sema/Sema.h"
20 #include "llvm/ADT/APSInt.h"
21 #include "llvm/TargetParser/Triple.h"
22 #include <bitset>
23
24 namespace clang {
25
SemaX86(Sema & S)26 SemaX86::SemaX86(Sema &S) : SemaBase(S) {}
27
28 // Check if the rounding mode is legal.
CheckBuiltinRoundingOrSAE(unsigned BuiltinID,CallExpr * TheCall)29 bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
30 // Indicates if this instruction has rounding control or just SAE.
31 bool HasRC = false;
32
33 unsigned ArgNum = 0;
34 switch (BuiltinID) {
35 default:
36 return false;
37 case X86::BI__builtin_ia32_vcvttsd2si32:
38 case X86::BI__builtin_ia32_vcvttsd2si64:
39 case X86::BI__builtin_ia32_vcvttsd2usi32:
40 case X86::BI__builtin_ia32_vcvttsd2usi64:
41 case X86::BI__builtin_ia32_vcvttss2si32:
42 case X86::BI__builtin_ia32_vcvttss2si64:
43 case X86::BI__builtin_ia32_vcvttss2usi32:
44 case X86::BI__builtin_ia32_vcvttss2usi64:
45 case X86::BI__builtin_ia32_vcvttsh2si32:
46 case X86::BI__builtin_ia32_vcvttsh2si64:
47 case X86::BI__builtin_ia32_vcvttsh2usi32:
48 case X86::BI__builtin_ia32_vcvttsh2usi64:
49 case X86::BI__builtin_ia32_vcvttsd2sis32:
50 case X86::BI__builtin_ia32_vcvttsd2usis32:
51 case X86::BI__builtin_ia32_vcvttss2sis32:
52 case X86::BI__builtin_ia32_vcvttss2usis32:
53 case X86::BI__builtin_ia32_vcvttsd2sis64:
54 case X86::BI__builtin_ia32_vcvttsd2usis64:
55 case X86::BI__builtin_ia32_vcvttss2sis64:
56 case X86::BI__builtin_ia32_vcvttss2usis64:
57 ArgNum = 1;
58 break;
59 case X86::BI__builtin_ia32_maxpd512:
60 case X86::BI__builtin_ia32_maxps512:
61 case X86::BI__builtin_ia32_minpd512:
62 case X86::BI__builtin_ia32_minps512:
63 case X86::BI__builtin_ia32_maxph512:
64 case X86::BI__builtin_ia32_minph512:
65 ArgNum = 2;
66 break;
67 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
68 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
69 case X86::BI__builtin_ia32_cvtps2pd512_mask:
70 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
71 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
72 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
73 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
74 case X86::BI__builtin_ia32_cvttps2dq512_mask:
75 case X86::BI__builtin_ia32_cvttps2qq512_mask:
76 case X86::BI__builtin_ia32_cvttps2udq512_mask:
77 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
78 case X86::BI__builtin_ia32_vcvttph2w512_mask:
79 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
80 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
81 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
82 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
83 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
84 case X86::BI__builtin_ia32_getexppd512_mask:
85 case X86::BI__builtin_ia32_getexpps512_mask:
86 case X86::BI__builtin_ia32_getexpph512_mask:
87 case X86::BI__builtin_ia32_vcomisd:
88 case X86::BI__builtin_ia32_vcomiss:
89 case X86::BI__builtin_ia32_vcomish:
90 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
91 case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
92 case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
93 case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
94 case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
95 ArgNum = 3;
96 break;
97 case X86::BI__builtin_ia32_cmppd512_mask:
98 case X86::BI__builtin_ia32_cmpps512_mask:
99 case X86::BI__builtin_ia32_cmpsd_mask:
100 case X86::BI__builtin_ia32_cmpss_mask:
101 case X86::BI__builtin_ia32_cmpsh_mask:
102 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
103 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
104 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
105 case X86::BI__builtin_ia32_getexpsd128_round_mask:
106 case X86::BI__builtin_ia32_getexpss128_round_mask:
107 case X86::BI__builtin_ia32_getexpsh128_round_mask:
108 case X86::BI__builtin_ia32_getmantpd512_mask:
109 case X86::BI__builtin_ia32_getmantps512_mask:
110 case X86::BI__builtin_ia32_getmantph512_mask:
111 case X86::BI__builtin_ia32_maxsd_round_mask:
112 case X86::BI__builtin_ia32_maxss_round_mask:
113 case X86::BI__builtin_ia32_maxsh_round_mask:
114 case X86::BI__builtin_ia32_minsd_round_mask:
115 case X86::BI__builtin_ia32_minss_round_mask:
116 case X86::BI__builtin_ia32_minsh_round_mask:
117 case X86::BI__builtin_ia32_reducepd512_mask:
118 case X86::BI__builtin_ia32_reduceps512_mask:
119 case X86::BI__builtin_ia32_reduceph512_mask:
120 case X86::BI__builtin_ia32_rndscalepd_mask:
121 case X86::BI__builtin_ia32_rndscaleps_mask:
122 case X86::BI__builtin_ia32_rndscaleph_mask:
123 ArgNum = 4;
124 break;
125 case X86::BI__builtin_ia32_fixupimmpd512_mask:
126 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
127 case X86::BI__builtin_ia32_fixupimmps512_mask:
128 case X86::BI__builtin_ia32_fixupimmps512_maskz:
129 case X86::BI__builtin_ia32_fixupimmsd_mask:
130 case X86::BI__builtin_ia32_fixupimmsd_maskz:
131 case X86::BI__builtin_ia32_fixupimmss_mask:
132 case X86::BI__builtin_ia32_fixupimmss_maskz:
133 case X86::BI__builtin_ia32_getmantsd_round_mask:
134 case X86::BI__builtin_ia32_getmantss_round_mask:
135 case X86::BI__builtin_ia32_getmantsh_round_mask:
136 case X86::BI__builtin_ia32_rangepd512_mask:
137 case X86::BI__builtin_ia32_rangeps512_mask:
138 case X86::BI__builtin_ia32_rangesd128_round_mask:
139 case X86::BI__builtin_ia32_rangess128_round_mask:
140 case X86::BI__builtin_ia32_reducesd_mask:
141 case X86::BI__builtin_ia32_reducess_mask:
142 case X86::BI__builtin_ia32_reducesh_mask:
143 case X86::BI__builtin_ia32_rndscalesd_round_mask:
144 case X86::BI__builtin_ia32_rndscaless_round_mask:
145 case X86::BI__builtin_ia32_rndscalesh_round_mask:
146 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
147 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
148 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
149 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
150 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
151 case X86::BI__builtin_ia32_vminmaxss_round_mask:
152 ArgNum = 5;
153 break;
154 case X86::BI__builtin_ia32_vcvtsd2si64:
155 case X86::BI__builtin_ia32_vcvtsd2si32:
156 case X86::BI__builtin_ia32_vcvtsd2usi32:
157 case X86::BI__builtin_ia32_vcvtsd2usi64:
158 case X86::BI__builtin_ia32_vcvtss2si32:
159 case X86::BI__builtin_ia32_vcvtss2si64:
160 case X86::BI__builtin_ia32_vcvtss2usi32:
161 case X86::BI__builtin_ia32_vcvtss2usi64:
162 case X86::BI__builtin_ia32_vcvtsh2si32:
163 case X86::BI__builtin_ia32_vcvtsh2si64:
164 case X86::BI__builtin_ia32_vcvtsh2usi32:
165 case X86::BI__builtin_ia32_vcvtsh2usi64:
166 case X86::BI__builtin_ia32_sqrtpd512:
167 case X86::BI__builtin_ia32_sqrtps512:
168 case X86::BI__builtin_ia32_sqrtph512:
169 ArgNum = 1;
170 HasRC = true;
171 break;
172 case X86::BI__builtin_ia32_addph512:
173 case X86::BI__builtin_ia32_divph512:
174 case X86::BI__builtin_ia32_mulph512:
175 case X86::BI__builtin_ia32_subph512:
176 case X86::BI__builtin_ia32_addpd512:
177 case X86::BI__builtin_ia32_addps512:
178 case X86::BI__builtin_ia32_divpd512:
179 case X86::BI__builtin_ia32_divps512:
180 case X86::BI__builtin_ia32_mulpd512:
181 case X86::BI__builtin_ia32_mulps512:
182 case X86::BI__builtin_ia32_subpd512:
183 case X86::BI__builtin_ia32_subps512:
184 case X86::BI__builtin_ia32_cvtsi2sd64:
185 case X86::BI__builtin_ia32_cvtsi2ss32:
186 case X86::BI__builtin_ia32_cvtsi2ss64:
187 case X86::BI__builtin_ia32_cvtusi2sd64:
188 case X86::BI__builtin_ia32_cvtusi2ss32:
189 case X86::BI__builtin_ia32_cvtusi2ss64:
190 case X86::BI__builtin_ia32_vcvtusi2sh:
191 case X86::BI__builtin_ia32_vcvtusi642sh:
192 case X86::BI__builtin_ia32_vcvtsi2sh:
193 case X86::BI__builtin_ia32_vcvtsi642sh:
194 ArgNum = 2;
195 HasRC = true;
196 break;
197 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
198 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
199 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
200 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
201 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
202 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
203 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
204 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
205 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
206 case X86::BI__builtin_ia32_cvtps2dq512_mask:
207 case X86::BI__builtin_ia32_cvtps2qq512_mask:
208 case X86::BI__builtin_ia32_cvtps2udq512_mask:
209 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
210 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
211 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
212 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
213 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
214 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
215 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
216 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
217 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
218 case X86::BI__builtin_ia32_vcvtph2w512_mask:
219 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
220 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
221 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
222 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
223 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
224 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
225 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
226 case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
227 case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
228 case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
229 case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
230 ArgNum = 3;
231 HasRC = true;
232 break;
233 case X86::BI__builtin_ia32_addsh_round_mask:
234 case X86::BI__builtin_ia32_addss_round_mask:
235 case X86::BI__builtin_ia32_addsd_round_mask:
236 case X86::BI__builtin_ia32_divsh_round_mask:
237 case X86::BI__builtin_ia32_divss_round_mask:
238 case X86::BI__builtin_ia32_divsd_round_mask:
239 case X86::BI__builtin_ia32_mulsh_round_mask:
240 case X86::BI__builtin_ia32_mulss_round_mask:
241 case X86::BI__builtin_ia32_mulsd_round_mask:
242 case X86::BI__builtin_ia32_subsh_round_mask:
243 case X86::BI__builtin_ia32_subss_round_mask:
244 case X86::BI__builtin_ia32_subsd_round_mask:
245 case X86::BI__builtin_ia32_scalefph512_mask:
246 case X86::BI__builtin_ia32_scalefpd512_mask:
247 case X86::BI__builtin_ia32_scalefps512_mask:
248 case X86::BI__builtin_ia32_scalefsd_round_mask:
249 case X86::BI__builtin_ia32_scalefss_round_mask:
250 case X86::BI__builtin_ia32_scalefsh_round_mask:
251 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
252 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
253 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
254 case X86::BI__builtin_ia32_sqrtsd_round_mask:
255 case X86::BI__builtin_ia32_sqrtss_round_mask:
256 case X86::BI__builtin_ia32_sqrtsh_round_mask:
257 case X86::BI__builtin_ia32_vfmaddsd3_mask:
258 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
259 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
260 case X86::BI__builtin_ia32_vfmaddss3_mask:
261 case X86::BI__builtin_ia32_vfmaddss3_maskz:
262 case X86::BI__builtin_ia32_vfmaddss3_mask3:
263 case X86::BI__builtin_ia32_vfmaddsh3_mask:
264 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
265 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
266 case X86::BI__builtin_ia32_vfmaddpd512_mask:
267 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
268 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
269 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
270 case X86::BI__builtin_ia32_vfmaddps512_mask:
271 case X86::BI__builtin_ia32_vfmaddps512_maskz:
272 case X86::BI__builtin_ia32_vfmaddps512_mask3:
273 case X86::BI__builtin_ia32_vfmsubps512_mask3:
274 case X86::BI__builtin_ia32_vfmaddph512_mask:
275 case X86::BI__builtin_ia32_vfmaddph512_maskz:
276 case X86::BI__builtin_ia32_vfmaddph512_mask3:
277 case X86::BI__builtin_ia32_vfmsubph512_mask3:
278 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
279 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
280 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
281 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
282 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
283 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
284 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
285 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
286 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
287 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
288 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
289 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
290 case X86::BI__builtin_ia32_vfmaddcsh_mask:
291 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
292 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
293 case X86::BI__builtin_ia32_vfmaddcph512_mask:
294 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
295 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
296 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
297 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
298 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
299 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
300 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
301 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
302 case X86::BI__builtin_ia32_vfmulcsh_mask:
303 case X86::BI__builtin_ia32_vfmulcph512_mask:
304 case X86::BI__builtin_ia32_vfcmulcsh_mask:
305 case X86::BI__builtin_ia32_vfcmulcph512_mask:
306 case X86::BI__builtin_ia32_vcvt2ps2phx512_mask:
307 ArgNum = 4;
308 HasRC = true;
309 break;
310 case X86::BI__builtin_ia32_vcvttpd2dqs512_round_mask:
311 case X86::BI__builtin_ia32_vcvttpd2udqs512_round_mask:
312 case X86::BI__builtin_ia32_vcvttpd2qqs512_round_mask:
313 case X86::BI__builtin_ia32_vcvttpd2uqqs512_round_mask:
314 case X86::BI__builtin_ia32_vcvttps2dqs512_round_mask:
315 case X86::BI__builtin_ia32_vcvttps2udqs512_round_mask:
316 case X86::BI__builtin_ia32_vcvttps2qqs512_round_mask:
317 case X86::BI__builtin_ia32_vcvttps2uqqs512_round_mask:
318 ArgNum = 3;
319 break;
320 }
321
322 llvm::APSInt Result;
323
324 // We can't check the value of a dependent argument.
325 Expr *Arg = TheCall->getArg(ArgNum);
326 if (Arg->isTypeDependent() || Arg->isValueDependent())
327 return false;
328
329 // Check constant-ness first.
330 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
331 return true;
332
333 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
334 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
335 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
336 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
337 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
338 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
339 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
340 return false;
341
342 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
343 << Arg->getSourceRange();
344 }
345
346 // Check if the gather/scatter scale is legal.
CheckBuiltinGatherScatterScale(unsigned BuiltinID,CallExpr * TheCall)347 bool SemaX86::CheckBuiltinGatherScatterScale(unsigned BuiltinID,
348 CallExpr *TheCall) {
349 unsigned ArgNum = 0;
350 switch (BuiltinID) {
351 default:
352 return false;
353 case X86::BI__builtin_ia32_gatherd_pd:
354 case X86::BI__builtin_ia32_gatherd_pd256:
355 case X86::BI__builtin_ia32_gatherq_pd:
356 case X86::BI__builtin_ia32_gatherq_pd256:
357 case X86::BI__builtin_ia32_gatherd_ps:
358 case X86::BI__builtin_ia32_gatherd_ps256:
359 case X86::BI__builtin_ia32_gatherq_ps:
360 case X86::BI__builtin_ia32_gatherq_ps256:
361 case X86::BI__builtin_ia32_gatherd_q:
362 case X86::BI__builtin_ia32_gatherd_q256:
363 case X86::BI__builtin_ia32_gatherq_q:
364 case X86::BI__builtin_ia32_gatherq_q256:
365 case X86::BI__builtin_ia32_gatherd_d:
366 case X86::BI__builtin_ia32_gatherd_d256:
367 case X86::BI__builtin_ia32_gatherq_d:
368 case X86::BI__builtin_ia32_gatherq_d256:
369 case X86::BI__builtin_ia32_gather3div2df:
370 case X86::BI__builtin_ia32_gather3div2di:
371 case X86::BI__builtin_ia32_gather3div4df:
372 case X86::BI__builtin_ia32_gather3div4di:
373 case X86::BI__builtin_ia32_gather3div4sf:
374 case X86::BI__builtin_ia32_gather3div4si:
375 case X86::BI__builtin_ia32_gather3div8sf:
376 case X86::BI__builtin_ia32_gather3div8si:
377 case X86::BI__builtin_ia32_gather3siv2df:
378 case X86::BI__builtin_ia32_gather3siv2di:
379 case X86::BI__builtin_ia32_gather3siv4df:
380 case X86::BI__builtin_ia32_gather3siv4di:
381 case X86::BI__builtin_ia32_gather3siv4sf:
382 case X86::BI__builtin_ia32_gather3siv4si:
383 case X86::BI__builtin_ia32_gather3siv8sf:
384 case X86::BI__builtin_ia32_gather3siv8si:
385 case X86::BI__builtin_ia32_gathersiv8df:
386 case X86::BI__builtin_ia32_gathersiv16sf:
387 case X86::BI__builtin_ia32_gatherdiv8df:
388 case X86::BI__builtin_ia32_gatherdiv16sf:
389 case X86::BI__builtin_ia32_gathersiv8di:
390 case X86::BI__builtin_ia32_gathersiv16si:
391 case X86::BI__builtin_ia32_gatherdiv8di:
392 case X86::BI__builtin_ia32_gatherdiv16si:
393 case X86::BI__builtin_ia32_scatterdiv2df:
394 case X86::BI__builtin_ia32_scatterdiv2di:
395 case X86::BI__builtin_ia32_scatterdiv4df:
396 case X86::BI__builtin_ia32_scatterdiv4di:
397 case X86::BI__builtin_ia32_scatterdiv4sf:
398 case X86::BI__builtin_ia32_scatterdiv4si:
399 case X86::BI__builtin_ia32_scatterdiv8sf:
400 case X86::BI__builtin_ia32_scatterdiv8si:
401 case X86::BI__builtin_ia32_scattersiv2df:
402 case X86::BI__builtin_ia32_scattersiv2di:
403 case X86::BI__builtin_ia32_scattersiv4df:
404 case X86::BI__builtin_ia32_scattersiv4di:
405 case X86::BI__builtin_ia32_scattersiv4sf:
406 case X86::BI__builtin_ia32_scattersiv4si:
407 case X86::BI__builtin_ia32_scattersiv8sf:
408 case X86::BI__builtin_ia32_scattersiv8si:
409 case X86::BI__builtin_ia32_scattersiv8df:
410 case X86::BI__builtin_ia32_scattersiv16sf:
411 case X86::BI__builtin_ia32_scatterdiv8df:
412 case X86::BI__builtin_ia32_scatterdiv16sf:
413 case X86::BI__builtin_ia32_scattersiv8di:
414 case X86::BI__builtin_ia32_scattersiv16si:
415 case X86::BI__builtin_ia32_scatterdiv8di:
416 case X86::BI__builtin_ia32_scatterdiv16si:
417 ArgNum = 4;
418 break;
419 }
420
421 llvm::APSInt Result;
422
423 // We can't check the value of a dependent argument.
424 Expr *Arg = TheCall->getArg(ArgNum);
425 if (Arg->isTypeDependent() || Arg->isValueDependent())
426 return false;
427
428 // Check constant-ness first.
429 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
430 return true;
431
432 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
433 return false;
434
435 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
436 << Arg->getSourceRange();
437 }
438
439 enum { TileRegLow = 0, TileRegHigh = 7 };
440
CheckBuiltinTileArgumentsRange(CallExpr * TheCall,ArrayRef<int> ArgNums)441 bool SemaX86::CheckBuiltinTileArgumentsRange(CallExpr *TheCall,
442 ArrayRef<int> ArgNums) {
443 for (int ArgNum : ArgNums) {
444 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
445 TileRegHigh))
446 return true;
447 }
448 return false;
449 }
450
CheckBuiltinTileDuplicate(CallExpr * TheCall,ArrayRef<int> ArgNums)451 bool SemaX86::CheckBuiltinTileDuplicate(CallExpr *TheCall,
452 ArrayRef<int> ArgNums) {
453 // Because the max number of tile register is TileRegHigh + 1, so here we use
454 // each bit to represent the usage of them in bitset.
455 std::bitset<TileRegHigh + 1> ArgValues;
456 for (int ArgNum : ArgNums) {
457 Expr *Arg = TheCall->getArg(ArgNum);
458 if (Arg->isTypeDependent() || Arg->isValueDependent())
459 continue;
460
461 llvm::APSInt Result;
462 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
463 return true;
464 int ArgExtValue = Result.getExtValue();
465 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
466 "Incorrect tile register num.");
467 if (ArgValues.test(ArgExtValue))
468 return Diag(TheCall->getBeginLoc(),
469 diag::err_x86_builtin_tile_arg_duplicate)
470 << TheCall->getArg(ArgNum)->getSourceRange();
471 ArgValues.set(ArgExtValue);
472 }
473 return false;
474 }
475
CheckBuiltinTileRangeAndDuplicate(CallExpr * TheCall,ArrayRef<int> ArgNums)476 bool SemaX86::CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall,
477 ArrayRef<int> ArgNums) {
478 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
479 CheckBuiltinTileDuplicate(TheCall, ArgNums);
480 }
481
CheckBuiltinTileArguments(unsigned BuiltinID,CallExpr * TheCall)482 bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
483 switch (BuiltinID) {
484 default:
485 return false;
486 case X86::BI__builtin_ia32_tileloadd64:
487 case X86::BI__builtin_ia32_tileloaddt164:
488 case X86::BI__builtin_ia32_tileloaddrs64:
489 case X86::BI__builtin_ia32_tileloaddrst164:
490 case X86::BI__builtin_ia32_tilestored64:
491 case X86::BI__builtin_ia32_tilezero:
492 case X86::BI__builtin_ia32_t2rpntlvwz0:
493 case X86::BI__builtin_ia32_t2rpntlvwz0t1:
494 case X86::BI__builtin_ia32_t2rpntlvwz1:
495 case X86::BI__builtin_ia32_t2rpntlvwz1t1:
496 case X86::BI__builtin_ia32_t2rpntlvwz0rst1:
497 case X86::BI__builtin_ia32_t2rpntlvwz1rs:
498 case X86::BI__builtin_ia32_t2rpntlvwz1rst1:
499 case X86::BI__builtin_ia32_t2rpntlvwz0rs:
500 case X86::BI__builtin_ia32_tcvtrowps2bf16h:
501 case X86::BI__builtin_ia32_tcvtrowps2bf16l:
502 case X86::BI__builtin_ia32_tcvtrowps2phh:
503 case X86::BI__builtin_ia32_tcvtrowps2phl:
504 case X86::BI__builtin_ia32_tcvtrowd2ps:
505 case X86::BI__builtin_ia32_tilemovrow:
506 return CheckBuiltinTileArgumentsRange(TheCall, 0);
507 case X86::BI__builtin_ia32_tdpbssd:
508 case X86::BI__builtin_ia32_tdpbsud:
509 case X86::BI__builtin_ia32_tdpbusd:
510 case X86::BI__builtin_ia32_tdpbuud:
511 case X86::BI__builtin_ia32_tdpbf16ps:
512 case X86::BI__builtin_ia32_tdpfp16ps:
513 case X86::BI__builtin_ia32_tcmmimfp16ps:
514 case X86::BI__builtin_ia32_tcmmrlfp16ps:
515 case X86::BI__builtin_ia32_tdpbf8ps:
516 case X86::BI__builtin_ia32_tdpbhf8ps:
517 case X86::BI__builtin_ia32_tdphbf8ps:
518 case X86::BI__builtin_ia32_tdphf8ps:
519 case X86::BI__builtin_ia32_ttdpbf16ps:
520 case X86::BI__builtin_ia32_ttdpfp16ps:
521 case X86::BI__builtin_ia32_ttcmmimfp16ps:
522 case X86::BI__builtin_ia32_ttcmmrlfp16ps:
523 case X86::BI__builtin_ia32_tconjtcmmimfp16ps:
524 case X86::BI__builtin_ia32_tmmultf32ps:
525 case X86::BI__builtin_ia32_ttmmultf32ps:
526 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
527 case X86::BI__builtin_ia32_ttransposed:
528 case X86::BI__builtin_ia32_tconjtfp16:
529 return CheckBuiltinTileArgumentsRange(TheCall, {0, 1});
530 }
531 }
isX86_32Builtin(unsigned BuiltinID)532 static bool isX86_32Builtin(unsigned BuiltinID) {
533 // These builtins only work on x86-32 targets.
534 switch (BuiltinID) {
535 case X86::BI__builtin_ia32_readeflags_u32:
536 case X86::BI__builtin_ia32_writeeflags_u32:
537 return true;
538 }
539
540 return false;
541 }
542
CheckBuiltinFunctionCall(const TargetInfo & TI,unsigned BuiltinID,CallExpr * TheCall)543 bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
544 CallExpr *TheCall) {
545 // Check for 32-bit only builtins on a 64-bit target.
546 const llvm::Triple &TT = TI.getTriple();
547 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
548 return Diag(TheCall->getCallee()->getBeginLoc(),
549 diag::err_32_bit_builtin_64_bit_tgt);
550
551 // If the intrinsic has rounding or SAE make sure its valid.
552 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
553 return true;
554
555 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
556 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
557 return true;
558
559 // If the intrinsic has a tile arguments, make sure they are valid.
560 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
561 return true;
562
563 // For intrinsics which take an immediate value as part of the instruction,
564 // range check them here.
565 int i = 0, l = 0, u = 0;
566 switch (BuiltinID) {
567 default:
568 return false;
569 case X86::BI__builtin_ia32_vec_ext_v2di:
570 case X86::BI__builtin_ia32_vextractf128_pd256:
571 case X86::BI__builtin_ia32_vextractf128_ps256:
572 case X86::BI__builtin_ia32_vextractf128_si256:
573 case X86::BI__builtin_ia32_extract128i256:
574 case X86::BI__builtin_ia32_extractf64x4_mask:
575 case X86::BI__builtin_ia32_extracti64x4_mask:
576 case X86::BI__builtin_ia32_extractf32x8_mask:
577 case X86::BI__builtin_ia32_extracti32x8_mask:
578 case X86::BI__builtin_ia32_extractf64x2_256_mask:
579 case X86::BI__builtin_ia32_extracti64x2_256_mask:
580 case X86::BI__builtin_ia32_extractf32x4_256_mask:
581 case X86::BI__builtin_ia32_extracti32x4_256_mask:
582 i = 1;
583 l = 0;
584 u = 1;
585 break;
586 case X86::BI__builtin_ia32_vec_set_v2di:
587 case X86::BI__builtin_ia32_vinsertf128_pd256:
588 case X86::BI__builtin_ia32_vinsertf128_ps256:
589 case X86::BI__builtin_ia32_vinsertf128_si256:
590 case X86::BI__builtin_ia32_insert128i256:
591 case X86::BI__builtin_ia32_insertf32x8:
592 case X86::BI__builtin_ia32_inserti32x8:
593 case X86::BI__builtin_ia32_insertf64x4:
594 case X86::BI__builtin_ia32_inserti64x4:
595 case X86::BI__builtin_ia32_insertf64x2_256:
596 case X86::BI__builtin_ia32_inserti64x2_256:
597 case X86::BI__builtin_ia32_insertf32x4_256:
598 case X86::BI__builtin_ia32_inserti32x4_256:
599 i = 2;
600 l = 0;
601 u = 1;
602 break;
603 case X86::BI__builtin_ia32_vpermilpd:
604 case X86::BI__builtin_ia32_vec_ext_v4hi:
605 case X86::BI__builtin_ia32_vec_ext_v4si:
606 case X86::BI__builtin_ia32_vec_ext_v4sf:
607 case X86::BI__builtin_ia32_vec_ext_v4di:
608 case X86::BI__builtin_ia32_extractf32x4_mask:
609 case X86::BI__builtin_ia32_extracti32x4_mask:
610 case X86::BI__builtin_ia32_extractf64x2_512_mask:
611 case X86::BI__builtin_ia32_extracti64x2_512_mask:
612 i = 1;
613 l = 0;
614 u = 3;
615 break;
616 case X86::BI_mm_prefetch:
617 case X86::BI__builtin_ia32_vec_ext_v8hi:
618 case X86::BI__builtin_ia32_vec_ext_v8si:
619 i = 1;
620 l = 0;
621 u = 7;
622 break;
623 case X86::BI__builtin_ia32_sha1rnds4:
624 case X86::BI__builtin_ia32_blendpd:
625 case X86::BI__builtin_ia32_shufpd:
626 case X86::BI__builtin_ia32_vec_set_v4hi:
627 case X86::BI__builtin_ia32_vec_set_v4si:
628 case X86::BI__builtin_ia32_vec_set_v4di:
629 case X86::BI__builtin_ia32_shuf_f32x4_256:
630 case X86::BI__builtin_ia32_shuf_f64x2_256:
631 case X86::BI__builtin_ia32_shuf_i32x4_256:
632 case X86::BI__builtin_ia32_shuf_i64x2_256:
633 case X86::BI__builtin_ia32_insertf64x2_512:
634 case X86::BI__builtin_ia32_inserti64x2_512:
635 case X86::BI__builtin_ia32_insertf32x4:
636 case X86::BI__builtin_ia32_inserti32x4:
637 i = 2;
638 l = 0;
639 u = 3;
640 break;
641 case X86::BI__builtin_ia32_vpermil2pd:
642 case X86::BI__builtin_ia32_vpermil2pd256:
643 case X86::BI__builtin_ia32_vpermil2ps:
644 case X86::BI__builtin_ia32_vpermil2ps256:
645 i = 3;
646 l = 0;
647 u = 3;
648 break;
649 case X86::BI__builtin_ia32_cmpb128_mask:
650 case X86::BI__builtin_ia32_cmpw128_mask:
651 case X86::BI__builtin_ia32_cmpd128_mask:
652 case X86::BI__builtin_ia32_cmpq128_mask:
653 case X86::BI__builtin_ia32_cmpb256_mask:
654 case X86::BI__builtin_ia32_cmpw256_mask:
655 case X86::BI__builtin_ia32_cmpd256_mask:
656 case X86::BI__builtin_ia32_cmpq256_mask:
657 case X86::BI__builtin_ia32_cmpb512_mask:
658 case X86::BI__builtin_ia32_cmpw512_mask:
659 case X86::BI__builtin_ia32_cmpd512_mask:
660 case X86::BI__builtin_ia32_cmpq512_mask:
661 case X86::BI__builtin_ia32_ucmpb128_mask:
662 case X86::BI__builtin_ia32_ucmpw128_mask:
663 case X86::BI__builtin_ia32_ucmpd128_mask:
664 case X86::BI__builtin_ia32_ucmpq128_mask:
665 case X86::BI__builtin_ia32_ucmpb256_mask:
666 case X86::BI__builtin_ia32_ucmpw256_mask:
667 case X86::BI__builtin_ia32_ucmpd256_mask:
668 case X86::BI__builtin_ia32_ucmpq256_mask:
669 case X86::BI__builtin_ia32_ucmpb512_mask:
670 case X86::BI__builtin_ia32_ucmpw512_mask:
671 case X86::BI__builtin_ia32_ucmpd512_mask:
672 case X86::BI__builtin_ia32_ucmpq512_mask:
673 case X86::BI__builtin_ia32_vpcomub:
674 case X86::BI__builtin_ia32_vpcomuw:
675 case X86::BI__builtin_ia32_vpcomud:
676 case X86::BI__builtin_ia32_vpcomuq:
677 case X86::BI__builtin_ia32_vpcomb:
678 case X86::BI__builtin_ia32_vpcomw:
679 case X86::BI__builtin_ia32_vpcomd:
680 case X86::BI__builtin_ia32_vpcomq:
681 case X86::BI__builtin_ia32_vec_set_v8hi:
682 case X86::BI__builtin_ia32_vec_set_v8si:
683 i = 2;
684 l = 0;
685 u = 7;
686 break;
687 case X86::BI__builtin_ia32_vpermilpd256:
688 case X86::BI__builtin_ia32_roundps:
689 case X86::BI__builtin_ia32_roundpd:
690 case X86::BI__builtin_ia32_roundps256:
691 case X86::BI__builtin_ia32_roundpd256:
692 case X86::BI__builtin_ia32_getmantpd128_mask:
693 case X86::BI__builtin_ia32_getmantpd256_mask:
694 case X86::BI__builtin_ia32_getmantps128_mask:
695 case X86::BI__builtin_ia32_getmantps256_mask:
696 case X86::BI__builtin_ia32_getmantpd512_mask:
697 case X86::BI__builtin_ia32_getmantps512_mask:
698 case X86::BI__builtin_ia32_getmantph128_mask:
699 case X86::BI__builtin_ia32_getmantph256_mask:
700 case X86::BI__builtin_ia32_getmantph512_mask:
701 case X86::BI__builtin_ia32_vec_ext_v16qi:
702 case X86::BI__builtin_ia32_vec_ext_v16hi:
703 i = 1;
704 l = 0;
705 u = 15;
706 break;
707 case X86::BI__builtin_ia32_pblendd128:
708 case X86::BI__builtin_ia32_blendps:
709 case X86::BI__builtin_ia32_blendpd256:
710 case X86::BI__builtin_ia32_shufpd256:
711 case X86::BI__builtin_ia32_roundss:
712 case X86::BI__builtin_ia32_roundsd:
713 case X86::BI__builtin_ia32_rangepd128_mask:
714 case X86::BI__builtin_ia32_rangepd256_mask:
715 case X86::BI__builtin_ia32_rangepd512_mask:
716 case X86::BI__builtin_ia32_rangeps128_mask:
717 case X86::BI__builtin_ia32_rangeps256_mask:
718 case X86::BI__builtin_ia32_rangeps512_mask:
719 case X86::BI__builtin_ia32_getmantsd_round_mask:
720 case X86::BI__builtin_ia32_getmantss_round_mask:
721 case X86::BI__builtin_ia32_getmantsh_round_mask:
722 case X86::BI__builtin_ia32_vec_set_v16qi:
723 case X86::BI__builtin_ia32_vec_set_v16hi:
724 i = 2;
725 l = 0;
726 u = 15;
727 break;
728 case X86::BI__builtin_ia32_vec_ext_v32qi:
729 i = 1;
730 l = 0;
731 u = 31;
732 break;
733 case X86::BI__builtin_ia32_cmpps:
734 case X86::BI__builtin_ia32_cmpss:
735 case X86::BI__builtin_ia32_cmppd:
736 case X86::BI__builtin_ia32_cmpsd:
737 case X86::BI__builtin_ia32_cmpps256:
738 case X86::BI__builtin_ia32_cmppd256:
739 case X86::BI__builtin_ia32_cmpps128_mask:
740 case X86::BI__builtin_ia32_cmppd128_mask:
741 case X86::BI__builtin_ia32_cmpps256_mask:
742 case X86::BI__builtin_ia32_cmppd256_mask:
743 case X86::BI__builtin_ia32_cmpps512_mask:
744 case X86::BI__builtin_ia32_cmppd512_mask:
745 case X86::BI__builtin_ia32_cmpsd_mask:
746 case X86::BI__builtin_ia32_cmpss_mask:
747 case X86::BI__builtin_ia32_vec_set_v32qi:
748 i = 2;
749 l = 0;
750 u = 31;
751 break;
752 case X86::BI__builtin_ia32_permdf256:
753 case X86::BI__builtin_ia32_permdi256:
754 case X86::BI__builtin_ia32_permdf512:
755 case X86::BI__builtin_ia32_permdi512:
756 case X86::BI__builtin_ia32_vpermilps:
757 case X86::BI__builtin_ia32_vpermilps256:
758 case X86::BI__builtin_ia32_vpermilpd512:
759 case X86::BI__builtin_ia32_vpermilps512:
760 case X86::BI__builtin_ia32_pshufd:
761 case X86::BI__builtin_ia32_pshufd256:
762 case X86::BI__builtin_ia32_pshufd512:
763 case X86::BI__builtin_ia32_pshufhw:
764 case X86::BI__builtin_ia32_pshufhw256:
765 case X86::BI__builtin_ia32_pshufhw512:
766 case X86::BI__builtin_ia32_pshuflw:
767 case X86::BI__builtin_ia32_pshuflw256:
768 case X86::BI__builtin_ia32_pshuflw512:
769 case X86::BI__builtin_ia32_vcvtps2ph:
770 case X86::BI__builtin_ia32_vcvtps2ph_mask:
771 case X86::BI__builtin_ia32_vcvtps2ph256:
772 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
773 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
774 case X86::BI__builtin_ia32_rndscaleps_128_mask:
775 case X86::BI__builtin_ia32_rndscalepd_128_mask:
776 case X86::BI__builtin_ia32_rndscaleps_256_mask:
777 case X86::BI__builtin_ia32_rndscalepd_256_mask:
778 case X86::BI__builtin_ia32_rndscaleps_mask:
779 case X86::BI__builtin_ia32_rndscalepd_mask:
780 case X86::BI__builtin_ia32_rndscaleph_mask:
781 case X86::BI__builtin_ia32_vrndscalebf16_128_mask:
782 case X86::BI__builtin_ia32_vrndscalebf16_256_mask:
783 case X86::BI__builtin_ia32_vrndscalebf16_mask:
784 case X86::BI__builtin_ia32_reducepd128_mask:
785 case X86::BI__builtin_ia32_reducepd256_mask:
786 case X86::BI__builtin_ia32_reducepd512_mask:
787 case X86::BI__builtin_ia32_reduceps128_mask:
788 case X86::BI__builtin_ia32_reduceps256_mask:
789 case X86::BI__builtin_ia32_reduceps512_mask:
790 case X86::BI__builtin_ia32_reduceph128_mask:
791 case X86::BI__builtin_ia32_reduceph256_mask:
792 case X86::BI__builtin_ia32_reduceph512_mask:
793 case X86::BI__builtin_ia32_vreducebf16128_mask:
794 case X86::BI__builtin_ia32_vreducebf16256_mask:
795 case X86::BI__builtin_ia32_vreducebf16512_mask:
796 case X86::BI__builtin_ia32_prold512:
797 case X86::BI__builtin_ia32_prolq512:
798 case X86::BI__builtin_ia32_prold128:
799 case X86::BI__builtin_ia32_prold256:
800 case X86::BI__builtin_ia32_prolq128:
801 case X86::BI__builtin_ia32_prolq256:
802 case X86::BI__builtin_ia32_prord512:
803 case X86::BI__builtin_ia32_prorq512:
804 case X86::BI__builtin_ia32_prord128:
805 case X86::BI__builtin_ia32_prord256:
806 case X86::BI__builtin_ia32_prorq128:
807 case X86::BI__builtin_ia32_prorq256:
808 case X86::BI__builtin_ia32_fpclasspd128_mask:
809 case X86::BI__builtin_ia32_fpclasspd256_mask:
810 case X86::BI__builtin_ia32_fpclassps128_mask:
811 case X86::BI__builtin_ia32_fpclassps256_mask:
812 case X86::BI__builtin_ia32_fpclassps512_mask:
813 case X86::BI__builtin_ia32_fpclasspd512_mask:
814 case X86::BI__builtin_ia32_fpclassph128_mask:
815 case X86::BI__builtin_ia32_fpclassph256_mask:
816 case X86::BI__builtin_ia32_fpclassph512_mask:
817 case X86::BI__builtin_ia32_vfpclassbf16128_mask:
818 case X86::BI__builtin_ia32_vfpclassbf16256_mask:
819 case X86::BI__builtin_ia32_vfpclassbf16512_mask:
820 case X86::BI__builtin_ia32_fpclasssd_mask:
821 case X86::BI__builtin_ia32_fpclassss_mask:
822 case X86::BI__builtin_ia32_fpclasssh_mask:
823 case X86::BI__builtin_ia32_pslldqi128_byteshift:
824 case X86::BI__builtin_ia32_pslldqi256_byteshift:
825 case X86::BI__builtin_ia32_pslldqi512_byteshift:
826 case X86::BI__builtin_ia32_psrldqi128_byteshift:
827 case X86::BI__builtin_ia32_psrldqi256_byteshift:
828 case X86::BI__builtin_ia32_psrldqi512_byteshift:
829 case X86::BI__builtin_ia32_kshiftliqi:
830 case X86::BI__builtin_ia32_kshiftlihi:
831 case X86::BI__builtin_ia32_kshiftlisi:
832 case X86::BI__builtin_ia32_kshiftlidi:
833 case X86::BI__builtin_ia32_kshiftriqi:
834 case X86::BI__builtin_ia32_kshiftrihi:
835 case X86::BI__builtin_ia32_kshiftrisi:
836 case X86::BI__builtin_ia32_kshiftridi:
837 i = 1;
838 l = 0;
839 u = 255;
840 break;
841 case X86::BI__builtin_ia32_vperm2f128_pd256:
842 case X86::BI__builtin_ia32_vperm2f128_ps256:
843 case X86::BI__builtin_ia32_vperm2f128_si256:
844 case X86::BI__builtin_ia32_permti256:
845 case X86::BI__builtin_ia32_pblendw128:
846 case X86::BI__builtin_ia32_pblendw256:
847 case X86::BI__builtin_ia32_blendps256:
848 case X86::BI__builtin_ia32_pblendd256:
849 case X86::BI__builtin_ia32_palignr128:
850 case X86::BI__builtin_ia32_palignr256:
851 case X86::BI__builtin_ia32_palignr512:
852 case X86::BI__builtin_ia32_alignq512:
853 case X86::BI__builtin_ia32_alignd512:
854 case X86::BI__builtin_ia32_alignd128:
855 case X86::BI__builtin_ia32_alignd256:
856 case X86::BI__builtin_ia32_alignq128:
857 case X86::BI__builtin_ia32_alignq256:
858 case X86::BI__builtin_ia32_vcomisd:
859 case X86::BI__builtin_ia32_vcomiss:
860 case X86::BI__builtin_ia32_shuf_f32x4:
861 case X86::BI__builtin_ia32_shuf_f64x2:
862 case X86::BI__builtin_ia32_shuf_i32x4:
863 case X86::BI__builtin_ia32_shuf_i64x2:
864 case X86::BI__builtin_ia32_shufpd512:
865 case X86::BI__builtin_ia32_shufps:
866 case X86::BI__builtin_ia32_shufps256:
867 case X86::BI__builtin_ia32_shufps512:
868 case X86::BI__builtin_ia32_dbpsadbw128:
869 case X86::BI__builtin_ia32_dbpsadbw256:
870 case X86::BI__builtin_ia32_dbpsadbw512:
871 case X86::BI__builtin_ia32_vpshldd128:
872 case X86::BI__builtin_ia32_vpshldd256:
873 case X86::BI__builtin_ia32_vpshldd512:
874 case X86::BI__builtin_ia32_vpshldq128:
875 case X86::BI__builtin_ia32_vpshldq256:
876 case X86::BI__builtin_ia32_vpshldq512:
877 case X86::BI__builtin_ia32_vpshldw128:
878 case X86::BI__builtin_ia32_vpshldw256:
879 case X86::BI__builtin_ia32_vpshldw512:
880 case X86::BI__builtin_ia32_vpshrdd128:
881 case X86::BI__builtin_ia32_vpshrdd256:
882 case X86::BI__builtin_ia32_vpshrdd512:
883 case X86::BI__builtin_ia32_vpshrdq128:
884 case X86::BI__builtin_ia32_vpshrdq256:
885 case X86::BI__builtin_ia32_vpshrdq512:
886 case X86::BI__builtin_ia32_vpshrdw128:
887 case X86::BI__builtin_ia32_vpshrdw256:
888 case X86::BI__builtin_ia32_vpshrdw512:
889 case X86::BI__builtin_ia32_vminmaxbf16128:
890 case X86::BI__builtin_ia32_vminmaxbf16256:
891 case X86::BI__builtin_ia32_vminmaxbf16512:
892 case X86::BI__builtin_ia32_vminmaxpd128_mask:
893 case X86::BI__builtin_ia32_vminmaxpd256_mask:
894 case X86::BI__builtin_ia32_vminmaxph128_mask:
895 case X86::BI__builtin_ia32_vminmaxph256_mask:
896 case X86::BI__builtin_ia32_vminmaxps128_mask:
897 case X86::BI__builtin_ia32_vminmaxps256_mask:
898 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
899 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
900 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
901 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
902 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
903 case X86::BI__builtin_ia32_vminmaxss_round_mask:
904 i = 2;
905 l = 0;
906 u = 255;
907 break;
908 case X86::BI__builtin_ia32_fixupimmpd512_mask:
909 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
910 case X86::BI__builtin_ia32_fixupimmps512_mask:
911 case X86::BI__builtin_ia32_fixupimmps512_maskz:
912 case X86::BI__builtin_ia32_fixupimmsd_mask:
913 case X86::BI__builtin_ia32_fixupimmsd_maskz:
914 case X86::BI__builtin_ia32_fixupimmss_mask:
915 case X86::BI__builtin_ia32_fixupimmss_maskz:
916 case X86::BI__builtin_ia32_fixupimmpd128_mask:
917 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
918 case X86::BI__builtin_ia32_fixupimmpd256_mask:
919 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
920 case X86::BI__builtin_ia32_fixupimmps128_mask:
921 case X86::BI__builtin_ia32_fixupimmps128_maskz:
922 case X86::BI__builtin_ia32_fixupimmps256_mask:
923 case X86::BI__builtin_ia32_fixupimmps256_maskz:
924 case X86::BI__builtin_ia32_pternlogd512_mask:
925 case X86::BI__builtin_ia32_pternlogd512_maskz:
926 case X86::BI__builtin_ia32_pternlogq512_mask:
927 case X86::BI__builtin_ia32_pternlogq512_maskz:
928 case X86::BI__builtin_ia32_pternlogd128_mask:
929 case X86::BI__builtin_ia32_pternlogd128_maskz:
930 case X86::BI__builtin_ia32_pternlogd256_mask:
931 case X86::BI__builtin_ia32_pternlogd256_maskz:
932 case X86::BI__builtin_ia32_pternlogq128_mask:
933 case X86::BI__builtin_ia32_pternlogq128_maskz:
934 case X86::BI__builtin_ia32_pternlogq256_mask:
935 case X86::BI__builtin_ia32_pternlogq256_maskz:
936 case X86::BI__builtin_ia32_vsm3rnds2:
937 i = 3;
938 l = 0;
939 u = 255;
940 break;
941 case X86::BI__builtin_ia32_reducesd_mask:
942 case X86::BI__builtin_ia32_reducess_mask:
943 case X86::BI__builtin_ia32_rndscalesd_round_mask:
944 case X86::BI__builtin_ia32_rndscaless_round_mask:
945 case X86::BI__builtin_ia32_rndscalesh_round_mask:
946 case X86::BI__builtin_ia32_reducesh_mask:
947 i = 4;
948 l = 0;
949 u = 255;
950 break;
951 case X86::BI__builtin_ia32_cmpccxadd32:
952 case X86::BI__builtin_ia32_cmpccxadd64:
953 i = 3;
954 l = 0;
955 u = 15;
956 break;
957 }
958
959 // Note that we don't force a hard error on the range check here, allowing
960 // template-generated or macro-generated dead code to potentially have out-of-
961 // range values. These need to code generate, but don't need to necessarily
962 // make any sense. We use a warning that defaults to an error.
963 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
964 /*RangeIsError*/ false);
965 }
966
handleAnyInterruptAttr(Decl * D,const ParsedAttr & AL)967 void SemaX86::handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL) {
968 // Semantic checks for a function with the 'interrupt' attribute.
969 // a) Must be a function.
970 // b) Must have the 'void' return type.
971 // c) Must take 1 or 2 arguments.
972 // d) The 1st argument must be a pointer.
973 // e) The 2nd argument (if any) must be an unsigned integer.
974 ASTContext &Context = getASTContext();
975
976 if (!isFuncOrMethodForAttrSubject(D) || !hasFunctionProto(D) ||
977 isInstanceMethod(D) ||
978 CXXMethodDecl::isStaticOverloadedOperator(
979 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
980 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
981 << AL << AL.isRegularKeywordAttribute()
982 << ExpectedFunctionWithProtoType;
983 return;
984 }
985 // Interrupt handler must have void return type.
986 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
987 Diag(getFunctionOrMethodResultSourceRange(D).getBegin(),
988 diag::err_anyx86_interrupt_attribute)
989 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
990 llvm::Triple::x86
991 ? 0
992 : 1)
993 << 0;
994 return;
995 }
996 // Interrupt handler must have 1 or 2 parameters.
997 unsigned NumParams = getFunctionOrMethodNumParams(D);
998 if (NumParams < 1 || NumParams > 2) {
999 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
1000 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1001 ? 0
1002 : 1)
1003 << 1;
1004 return;
1005 }
1006 // The first argument must be a pointer.
1007 if (!getFunctionOrMethodParamType(D, 0)->isPointerType()) {
1008 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
1009 diag::err_anyx86_interrupt_attribute)
1010 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1011 ? 0
1012 : 1)
1013 << 2;
1014 return;
1015 }
1016 // The second argument, if present, must be an unsigned integer.
1017 unsigned TypeSize =
1018 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1019 ? 64
1020 : 32;
1021 if (NumParams == 2 &&
1022 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
1023 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
1024 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
1025 diag::err_anyx86_interrupt_attribute)
1026 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1027 ? 0
1028 : 1)
1029 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
1030 return;
1031 }
1032 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1033 D->addAttr(UsedAttr::CreateImplicit(Context));
1034 }
1035
handleForceAlignArgPointerAttr(Decl * D,const ParsedAttr & AL)1036 void SemaX86::handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL) {
1037 // If we try to apply it to a function pointer, don't warn, but don't
1038 // do anything, either. It doesn't matter anyway, because there's nothing
1039 // special about calling a force_align_arg_pointer function.
1040 const auto *VD = dyn_cast<ValueDecl>(D);
1041 if (VD && VD->getType()->isFunctionPointerType())
1042 return;
1043 // Also don't warn on function pointer typedefs.
1044 const auto *TD = dyn_cast<TypedefNameDecl>(D);
1045 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1046 TD->getUnderlyingType()->isFunctionType()))
1047 return;
1048 // Attribute can only be applied to function types.
1049 if (!isa<FunctionDecl>(D)) {
1050 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1051 << AL << AL.isRegularKeywordAttribute() << ExpectedFunction;
1052 return;
1053 }
1054
1055 D->addAttr(::new (getASTContext())
1056 X86ForceAlignArgPointerAttr(getASTContext(), AL));
1057 }
1058
1059 } // namespace clang
1060