1 //===-- RISCVTargetStreamer.h - RISC-V Target Streamer ---------*- C++ -*--===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVTARGETSTREAMER_H 10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVTARGETSTREAMER_H 11 12 #include "RISCV.h" 13 #include "llvm/MC/MCStreamer.h" 14 #include "llvm/MC/MCSubtargetInfo.h" 15 16 namespace llvm { 17 18 class formatted_raw_ostream; 19 20 enum class RISCVOptionArchArgType { 21 Full, 22 Plus, 23 Minus, 24 }; 25 26 struct RISCVOptionArchArg { 27 RISCVOptionArchArgType Type; 28 std::string Value; 29 RISCVOptionArchArgRISCVOptionArchArg30 RISCVOptionArchArg(RISCVOptionArchArgType Type, std::string Value) 31 : Type(Type), Value(Value) {} 32 }; 33 34 class RISCVTargetStreamer : public MCTargetStreamer { 35 RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown; 36 bool HasRVC = false; 37 bool HasTSO = false; 38 39 public: 40 RISCVTargetStreamer(MCStreamer &S); 41 void finish() override; 42 virtual void reset(); 43 44 virtual void emitDirectiveOptionPush(); 45 virtual void emitDirectiveOptionPop(); 46 virtual void emitDirectiveOptionPIC(); 47 virtual void emitDirectiveOptionNoPIC(); 48 virtual void emitDirectiveOptionRVC(); 49 virtual void emitDirectiveOptionNoRVC(); 50 virtual void emitDirectiveOptionRelax(); 51 virtual void emitDirectiveOptionNoRelax(); 52 virtual void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args); 53 virtual void emitDirectiveVariantCC(MCSymbol &Symbol); 54 virtual void emitAttribute(unsigned Attribute, unsigned Value); 55 virtual void finishAttributeSection(); 56 virtual void emitTextAttribute(unsigned Attribute, StringRef String); 57 virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, 58 StringRef StringValue); 59 60 void emitTargetAttributes(const MCSubtargetInfo &STI, bool EmitStackAlign); 61 void setTargetABI(RISCVABI::ABI ABI); getTargetABI()62 RISCVABI::ABI getTargetABI() const { return TargetABI; } 63 void setFlagsFromFeatures(const MCSubtargetInfo &STI); hasRVC()64 bool hasRVC() const { return HasRVC; } hasTSO()65 bool hasTSO() const { return HasTSO; } 66 }; 67 68 // This part is for ascii assembly output 69 class RISCVTargetAsmStreamer : public RISCVTargetStreamer { 70 formatted_raw_ostream &OS; 71 72 void finishAttributeSection() override; 73 void emitAttribute(unsigned Attribute, unsigned Value) override; 74 void emitTextAttribute(unsigned Attribute, StringRef String) override; 75 void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, 76 StringRef StringValue) override; 77 78 public: 79 RISCVTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS); 80 81 void emitDirectiveOptionPush() override; 82 void emitDirectiveOptionPop() override; 83 void emitDirectiveOptionPIC() override; 84 void emitDirectiveOptionNoPIC() override; 85 void emitDirectiveOptionRVC() override; 86 void emitDirectiveOptionNoRVC() override; 87 void emitDirectiveOptionRelax() override; 88 void emitDirectiveOptionNoRelax() override; 89 void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args) override; 90 void emitDirectiveVariantCC(MCSymbol &Symbol) override; 91 }; 92 93 } 94 #endif 95