1//===-- RISCVInstrInfoSFB.td - Pseudos for SFB -------------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the pseudos for SFB (Short Forward Branch). 10// 11//===----------------------------------------------------------------------===// 12 13let Predicates = [HasShortForwardBranchOpt], isSelect = 1, 14 Constraints = "$dst = $falsev", isCommutable = 1, Size = 8 in { 15// This instruction moves $truev to $dst when the condition is true. It will 16// be expanded to control flow in RISCVExpandPseudoInsts. 17def PseudoCCMOVGPR : Pseudo<(outs GPR:$dst), 18 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 19 GPR:$falsev, GPR:$truev), 20 [(set GPR:$dst, 21 (riscv_selectcc_frag:$cc (XLenVT GPR:$lhs), 22 GPR:$rhs, cond, 23 (XLenVT GPR:$truev), 24 GPR:$falsev))]>, 25 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 26 ReadSFBALU, ReadSFBALU]>; 27} 28 29// This should always expand to a branch+c.mv so the size is 6 or 4 if the 30// branch is compressible. 31let Predicates = [HasConditionalMoveFusion, NoShortForwardBranchOpt], 32 Constraints = "$dst = $falsev", isCommutable = 1, Size = 6 in { 33// This instruction moves $truev to $dst when the condition is true. It will 34// be expanded to control flow in RISCVExpandPseudoInsts. 35// We use GPRNoX0 because c.mv cannot encode X0. 36def PseudoCCMOVGPRNoX0 : Pseudo<(outs GPRNoX0:$dst), 37 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 38 GPRNoX0:$falsev, GPRNoX0:$truev), 39 [(set GPRNoX0:$dst, 40 (riscv_selectcc_frag:$cc (XLenVT GPR:$lhs), 41 (XLenVT GPR:$rhs), 42 cond, (XLenVT GPRNoX0:$truev), 43 (XLenVT GPRNoX0:$falsev)))]>, 44 Sched<[]>; 45} 46 47// Conditional binops, that updates update $dst to (op rs1, rs2) when condition 48// is true. Returns $falsev otherwise. Selected by optimizeSelect. 49// TODO: Can we use DefaultOperands on the regular binop to accomplish this more 50// like how ARM does predication? 51let Predicates = [HasShortForwardBranchOpt], hasSideEffects = 0, 52 mayLoad = 0, mayStore = 0, Size = 8, Constraints = "$dst = $falsev" in { 53def PseudoCCADD : Pseudo<(outs GPR:$dst), 54 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 55 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 56 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 57 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 58def PseudoCCSUB : Pseudo<(outs GPR:$dst), 59 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 60 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 61 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 62 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 63def PseudoCCSLL : Pseudo<(outs GPR:$dst), 64 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 65 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 66 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 67 ReadSFBALU, ReadSFBALU]>; 68def PseudoCCSRL : Pseudo<(outs GPR:$dst), 69 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 70 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 71 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 72 ReadSFBALU, ReadSFBALU]>; 73def PseudoCCSRA : Pseudo<(outs GPR:$dst), 74 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 75 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 76 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 77 ReadSFBALU, ReadSFBALU]>; 78def PseudoCCAND : Pseudo<(outs GPR:$dst), 79 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 80 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 81 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 82 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 83def PseudoCCOR : Pseudo<(outs GPR:$dst), 84 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 85 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 86 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 87 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 88def PseudoCCXOR : Pseudo<(outs GPR:$dst), 89 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 90 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 91 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 92 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 93 94def PseudoCCADDI : Pseudo<(outs GPR:$dst), 95 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 96 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 97 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 98 ReadSFBALU]>; 99def PseudoCCSLLI : Pseudo<(outs GPR:$dst), 100 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 101 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 102 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 103 ReadSFBALU]>; 104def PseudoCCSRLI : Pseudo<(outs GPR:$dst), 105 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 106 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 107 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 108 ReadSFBALU]>; 109def PseudoCCSRAI : Pseudo<(outs GPR:$dst), 110 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 111 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 112 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 113 ReadSFBALU]>; 114def PseudoCCANDI : Pseudo<(outs GPR:$dst), 115 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 116 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 117 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 118 ReadSFBALU]>; 119def PseudoCCORI : Pseudo<(outs GPR:$dst), 120 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 121 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 122 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 123 ReadSFBALU]>; 124def PseudoCCXORI : Pseudo<(outs GPR:$dst), 125 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 126 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 127 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 128 ReadSFBALU]>; 129 130// RV64I instructions 131def PseudoCCADDW : Pseudo<(outs GPR:$dst), 132 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 133 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 134 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 135 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 136def PseudoCCSUBW : Pseudo<(outs GPR:$dst), 137 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 138 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 139 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 140 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 141def PseudoCCSLLW : Pseudo<(outs GPR:$dst), 142 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 143 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 144 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 145 ReadSFBALU, ReadSFBALU]>; 146def PseudoCCSRLW : Pseudo<(outs GPR:$dst), 147 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 148 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 149 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 150 ReadSFBALU, ReadSFBALU]>; 151def PseudoCCSRAW : Pseudo<(outs GPR:$dst), 152 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 153 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 154 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 155 ReadSFBALU, ReadSFBALU]>; 156 157def PseudoCCADDIW : Pseudo<(outs GPR:$dst), 158 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 159 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 160 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 161 ReadSFBALU]>; 162def PseudoCCSLLIW : Pseudo<(outs GPR:$dst), 163 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 164 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 165 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 166 ReadSFBALU]>; 167def PseudoCCSRLIW : Pseudo<(outs GPR:$dst), 168 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 169 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 170 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 171 ReadSFBALU]>; 172def PseudoCCSRAIW : Pseudo<(outs GPR:$dst), 173 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 174 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>, 175 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, ReadSFBALU, 176 ReadSFBALU]>; 177 178// Zbb/Zbkb instructions 179def PseudoCCANDN : Pseudo<(outs GPR:$dst), 180 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 181 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 182 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 183 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 184def PseudoCCORN : Pseudo<(outs GPR:$dst), 185 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 186 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 187 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 188 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 189def PseudoCCXNOR : Pseudo<(outs GPR:$dst), 190 (ins GPR:$lhs, GPR:$rhs, ixlenimm:$cc, 191 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>, 192 Sched<[WriteSFB, ReadSFBJmp, ReadSFBJmp, 193 ReadSFBALU, ReadSFBALU, ReadSFBALU]>; 194} 195 196let Predicates = [HasShortForwardBranchOpt] in 197def : Pat<(XLenVT (abs GPR:$rs1)), 198 (PseudoCCSUB (XLenVT GPR:$rs1), (XLenVT X0), /* COND_LT */ 2, 199 (XLenVT GPR:$rs1), (XLenVT X0), (XLenVT GPR:$rs1))>; 200let Predicates = [HasShortForwardBranchOpt, IsRV64] in 201def : Pat<(sext_inreg (abs 33signbits_node:$rs1), i32), 202 (PseudoCCSUBW (i64 GPR:$rs1), (i64 X0), /* COND_LT */ 2, 203 (i64 GPR:$rs1), (i64 X0), (i64 GPR:$rs1))>; 204