1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "Mips16RegisterInfo.h"
14 #include "Mips16InstrInfo.h"
15 #include "MipsInstrInfo.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/TargetFrameLowering.h"
19 #include "llvm/CodeGen/TargetInstrInfo.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetOptions.h"
26
27 using namespace llvm;
28
29 #define DEBUG_TYPE "mips16-registerinfo"
30
31 Mips16RegisterInfo::Mips16RegisterInfo() = default;
32
requiresRegisterScavenging(const MachineFunction & MF) const33 bool Mips16RegisterInfo::requiresRegisterScavenging
34 (const MachineFunction &MF) const {
35 return false;
36 }
requiresFrameIndexScavenging(const MachineFunction & MF) const37 bool Mips16RegisterInfo::requiresFrameIndexScavenging
38 (const MachineFunction &MF) const {
39 return false;
40 }
41
useFPForScavengingIndex(const MachineFunction & MF) const42 bool Mips16RegisterInfo::useFPForScavengingIndex
43 (const MachineFunction &MF) const {
44 return false;
45 }
46
saveScavengerRegister(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,MachineBasicBlock::iterator & UseMI,const TargetRegisterClass * RC,Register Reg) const47 bool Mips16RegisterInfo::saveScavengerRegister(
48 MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
49 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC,
50 Register Reg) const {
51 DebugLoc DL;
52 const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo();
53 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
54 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
55 return true;
56 }
57
58 const TargetRegisterClass *
intRegClass(unsigned Size) const59 Mips16RegisterInfo::intRegClass(unsigned Size) const {
60 assert(Size == 4);
61 return &Mips::CPU16RegsRegClass;
62 }
63
eliminateFI(MachineBasicBlock::iterator II,unsigned OpNo,int FrameIndex,uint64_t StackSize,int64_t SPOffset) const64 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
65 unsigned OpNo, int FrameIndex,
66 uint64_t StackSize,
67 int64_t SPOffset) const {
68 MachineInstr &MI = *II;
69 MachineFunction &MF = *MI.getParent()->getParent();
70 MachineFrameInfo &MFI = MF.getFrameInfo();
71
72 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
73 int MinCSFI = 0;
74 int MaxCSFI = -1;
75
76 if (CSI.size()) {
77 MinCSFI = CSI[0].getFrameIdx();
78 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
79 }
80
81 // The following stack frame objects are always
82 // referenced relative to $sp:
83 // 1. Outgoing arguments.
84 // 2. Pointer to dynamically allocated stack space.
85 // 3. Locations for callee-saved registers.
86 // Everything else is referenced relative to whatever register
87 // getFrameRegister() returns.
88 Register FrameReg;
89
90 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
91 FrameReg = Mips::SP;
92 else {
93 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
94 if (TFI->hasFP(MF)) {
95 FrameReg = Mips::S0;
96 }
97 else {
98 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
99 FrameReg = MI.getOperand(OpNo+2).getReg();
100 else
101 FrameReg = Mips::SP;
102 }
103 }
104 // Calculate final offset.
105 // - There is no need to change the offset if the frame object
106 // is one of the
107 // following: an outgoing argument, pointer to a dynamically allocated
108 // stack space or a $gp restore location,
109 // - If the frame object is any of the following,
110 // its offset must be adjusted
111 // by adding the size of the stack:
112 // incoming argument, callee-saved register location or local variable.
113 int64_t Offset;
114 bool IsKill = false;
115 Offset = SPOffset + (int64_t)StackSize;
116 Offset += MI.getOperand(OpNo + 1).getImm();
117
118 LLVM_DEBUG(errs() << "Offset : " << Offset << "\n"
119 << "<--------->\n");
120
121 if (!MI.isDebugValue() &&
122 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
123 MachineBasicBlock &MBB = *MI.getParent();
124 DebugLoc DL = II->getDebugLoc();
125 unsigned NewImm;
126 const Mips16InstrInfo &TII =
127 *static_cast<const Mips16InstrInfo *>(MF.getSubtarget().getInstrInfo());
128 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
129 Offset = SignExtend64<16>(NewImm);
130 IsKill = true;
131 }
132 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
133 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
134
135
136 }
137