1 //===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the MSP430 implementation of the TargetInstrInfo class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H 14 #define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H 15 16 #include "MSP430RegisterInfo.h" 17 #include "llvm/CodeGen/TargetInstrInfo.h" 18 19 #define GET_INSTRINFO_HEADER 20 #include "MSP430GenInstrInfo.inc" 21 22 namespace llvm { 23 24 class MSP430Subtarget; 25 26 class MSP430InstrInfo : public MSP430GenInstrInfo { 27 const MSP430RegisterInfo RI; 28 virtual void anchor(); 29 public: 30 explicit MSP430InstrInfo(MSP430Subtarget &STI); 31 32 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 33 /// such, whenever a client has an instance of instruction info, it should 34 /// always be able to get register info as well (through this method). 35 /// getRegisterInfo()36 const MSP430RegisterInfo &getRegisterInfo() const { return RI; } 37 38 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 39 const DebugLoc &DL, Register DestReg, Register SrcReg, 40 bool KillSrc, bool RenamableDest = false, 41 bool RenamableSrc = false) const override; 42 43 void storeRegToStackSlot( 44 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, 45 bool isKill, int FrameIndex, const TargetRegisterClass *RC, 46 const TargetRegisterInfo *TRI, Register VReg, 47 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override; 48 void loadRegFromStackSlot( 49 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, 50 int FrameIdx, const TargetRegisterClass *RC, 51 const TargetRegisterInfo *TRI, Register VReg, 52 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override; 53 54 unsigned getInstSizeInBytes(const MachineInstr &MI) const override; 55 56 // Branch folding goodness 57 bool 58 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; 59 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 60 MachineBasicBlock *&FBB, 61 SmallVectorImpl<MachineOperand> &Cond, 62 bool AllowModify) const override; 63 64 unsigned removeBranch(MachineBasicBlock &MBB, 65 int *BytesRemoved = nullptr) const override; 66 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 67 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, 68 const DebugLoc &DL, 69 int *BytesAdded = nullptr) const override; 70 getFramePoppedByCallee(const MachineInstr & I)71 int64_t getFramePoppedByCallee(const MachineInstr &I) const { 72 assert(isFrameInstr(I) && "Not a frame instruction"); 73 assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative"); 74 return I.getOperand(1).getImm(); 75 } 76 }; 77 78 } 79 80 #endif 81