1 //===- HexagonBitTracker.h --------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H 10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H 11 12 #include "BitTracker.h" 13 #include "llvm/ADT/DenseMap.h" 14 15 namespace llvm { 16 17 class HexagonInstrInfo; 18 class HexagonRegisterInfo; 19 class MachineFrameInfo; 20 class MachineFunction; 21 class MachineInstr; 22 class MachineRegisterInfo; 23 24 struct HexagonEvaluator : public BitTracker::MachineEvaluator { 25 using CellMapType = BitTracker::CellMapType; 26 using RegisterRef = BitTracker::RegisterRef; 27 using RegisterCell = BitTracker::RegisterCell; 28 using BranchTargetList = BitTracker::BranchTargetList; 29 30 HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri, 31 const HexagonInstrInfo &tii, MachineFunction &mf); 32 33 bool evaluate(const MachineInstr &MI, const CellMapType &Inputs, 34 CellMapType &Outputs) const override; 35 bool evaluate(const MachineInstr &BI, const CellMapType &Inputs, 36 BranchTargetList &Targets, bool &FallsThru) const override; 37 38 BitTracker::BitMask mask(Register Reg, unsigned Sub) const override; 39 40 uint16_t getPhysRegBitWidth(MCRegister Reg) const override; 41 42 const TargetRegisterClass &composeWithSubRegIndex( 43 const TargetRegisterClass &RC, unsigned Idx) const override; 44 45 MachineFunction &MF; 46 MachineFrameInfo &MFI; 47 const HexagonInstrInfo &TII; 48 49 private: 50 unsigned getUniqueDefVReg(const MachineInstr &MI) const; 51 bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs, 52 CellMapType &Outputs) const; 53 bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs, 54 CellMapType &Outputs) const; 55 56 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const; 57 unsigned getVirtRegFor(unsigned PReg) const; 58 59 // Type of formal parameter extension. 60 struct ExtType { 61 enum { SExt, ZExt }; 62 63 ExtType() = default; ExtTypeHexagonEvaluator::ExtType64 ExtType(char t, uint16_t w) : Type(t), Width(w) {} 65 66 char Type = 0; 67 uint16_t Width = 0; 68 }; 69 // Map VR -> extension type. 70 using RegExtMap = DenseMap<unsigned, ExtType>; 71 RegExtMap VRX; 72 }; 73 74 } // end namespace llvm 75 76 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H 77