xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/EXPInstructions.td (revision 700637cbb5e582861067a11aaca4d053546871d2) 
1//===-- EXPInstructions.td - Export Instruction Definitions ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9//===----------------------------------------------------------------------===//
10// EXP classes
11//===----------------------------------------------------------------------===//
12
13class EXPCommon<bit _row, bit _done, string asm = ""> : InstSI<
14  (outs),
15  (ins exp_tgt:$tgt,
16       ExpSrc0:$src0, ExpSrc1:$src1, ExpSrc2:$src2, ExpSrc3:$src3,
17       exp_vm:$vm, exp_compr:$compr, i32imm:$en),
18  asm> {
19  let EXP = 1;
20  let EXP_CNT = 1;
21  let mayLoad = _done;
22  let mayStore = 1;
23  let maybeAtomic = 0;
24  let UseNamedOperandTable = 1;
25  let Uses = !if(_row, [EXEC, M0], [EXEC]);
26  let SchedRW = [WriteExport];
27  let DisableWQM = 1;
28
29  bit row = _row;
30  bit done = _done;
31}
32
33class EXP_Pseudo<bit row, bit done>
34  : EXPCommon<row, done>, SIMCInstr<NAME, SIEncodingFamily.NONE> {
35  let isPseudo = 1;
36  let isCodeGenOnly = 1;
37}
38
39// Real instruction with optional asm operands "compr" and "vm".
40class EXP_Real_ComprVM<EXP_Pseudo ps, int subtarget>
41  : EXPCommon<0, ps.done, "exp$tgt $src0, $src1, $src2, $src3"
42                       #!if(ps.done, " done", "")#"$compr$vm">,
43    SIMCInstr<ps.PseudoInstr, subtarget> {
44  let AsmMatchConverter = "cvtExp";
45}
46
47// Real instruction with optional asm operand "row_en".
48class EXP_Real_Row<EXP_Pseudo ps, int subtarget, string name = "exp">
49  : EXPCommon<ps.row, ps.done, name#"$tgt $src0, $src1, $src2, $src3"
50                         #!if(ps.done, " done", "")#!if(ps.row, " row_en", "")>,
51    SIMCInstr<ps.PseudoInstr, subtarget> {
52  let AsmMatchConverter = "cvtExp";
53}
54
55//===----------------------------------------------------------------------===//
56// EXP Instructions
57//===----------------------------------------------------------------------===//
58
59// DONE variants have mayLoad = 1.
60// ROW variants have an implicit use of M0.
61let SubtargetPredicate = HasExportInsts in {
62def EXP          : EXP_Pseudo<0, 0>;
63def EXP_DONE     : EXP_Pseudo<0, 1>;
64def EXP_ROW      : EXP_Pseudo<1, 0>;
65def EXP_ROW_DONE : EXP_Pseudo<1, 1>;
66} // let SubtargetPredicate = HasExportInsts
67
68//===----------------------------------------------------------------------===//
69// SI, VI, GFX10.
70//===----------------------------------------------------------------------===//
71
72multiclass EXP_Real_si {
73  defvar ps = !cast<EXP_Pseudo>(NAME);
74  def _si : EXP_Real_ComprVM<ps, SIEncodingFamily.SI>, EXPe_ComprVM {
75    let AssemblerPredicate = isGFX6GFX7;
76    let DecoderNamespace = "GFX6GFX7";
77    let done = ps.done;
78  }
79}
80
81multiclass EXP_Real_vi {
82  defvar ps = !cast<EXP_Pseudo>(NAME);
83  def _vi : EXP_Real_ComprVM<ps, SIEncodingFamily.VI>, EXPe_vi {
84    let AssemblerPredicate = isGFX8GFX9;
85    let SubtargetPredicate = isNotGFX90APlus;
86    let DecoderNamespace = "GFX8";
87    let done = ps.done;
88  }
89}
90
91multiclass EXP_Real_gfx10 {
92  defvar ps = !cast<EXP_Pseudo>(NAME);
93  def _gfx10 : EXP_Real_ComprVM<ps, SIEncodingFamily.GFX10>, EXPe_ComprVM {
94    let AssemblerPredicate = isGFX10Only;
95    let DecoderNamespace = "GFX10";
96    let done = ps.done;
97  }
98}
99
100defm EXP      : EXP_Real_si, EXP_Real_vi, EXP_Real_gfx10;
101defm EXP_DONE : EXP_Real_si, EXP_Real_vi, EXP_Real_gfx10;
102
103//===----------------------------------------------------------------------===//
104// GFX11, GFX12.
105//===----------------------------------------------------------------------===//
106
107multiclass EXP_Real_gfx11 {
108  defvar ps = !cast<EXP_Pseudo>(NAME);
109  def _gfx11 : EXP_Real_Row<ps, SIEncodingFamily.GFX11>, EXPe_Row {
110    let AssemblerPredicate = isGFX11Only;
111    let DecoderNamespace = "GFX11";
112    let row = ps.row;
113    let done = ps.done;
114  }
115}
116
117multiclass VEXPORT_Real_gfx12 {
118  defvar ps = !cast<EXP_Pseudo>(NAME);
119  def _gfx12 : EXP_Real_Row<ps, SIEncodingFamily.GFX12, "export">,
120    EXPe_Row {
121    let AssemblerPredicate = isGFX12Only;
122    let OtherPredicates = [HasExportInsts];
123    let DecoderNamespace = "GFX12";
124    let row = ps.row;
125    let done = ps.done;
126  }
127  def : AMDGPUMnemonicAlias<"exp", "export"> {
128    let AssemblerPredicate = isGFX12Plus;
129  }
130}
131
132defm EXP          : EXP_Real_gfx11, VEXPORT_Real_gfx12;
133defm EXP_DONE     : EXP_Real_gfx11, VEXPORT_Real_gfx12;
134defm EXP_ROW      : EXP_Real_gfx11, VEXPORT_Real_gfx12;
135defm EXP_ROW_DONE : EXP_Real_gfx11, VEXPORT_Real_gfx12;
136
137//===----------------------------------------------------------------------===//
138// EXP Patterns
139//===----------------------------------------------------------------------===//
140
141class ExpPattern<ValueType vt, Instruction Inst, int done_val> : GCNPat<
142  (int_amdgcn_exp timm:$tgt, timm:$en,
143                  (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
144                  (vt ExpSrc2:$src2), (vt ExpSrc3:$src3),
145                  done_val, timm:$vm),
146  (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
147        ExpSrc2:$src2, ExpSrc3:$src3, timm:$vm, 0, timm:$en)
148>;
149
150class ExpRowPattern<ValueType vt, Instruction Inst, int done_val> : GCNPat<
151  (int_amdgcn_exp_row timm:$tgt, timm:$en,
152                      (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
153                      (vt ExpSrc2:$src2), (vt ExpSrc3:$src3),
154                      done_val, M0),
155  (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
156        ExpSrc2:$src2, ExpSrc3:$src3, 0, 0, timm:$en)
157>;
158
159class ExpComprPattern<ValueType vt, Instruction Inst, int done_val> : GCNPat<
160  (int_amdgcn_exp_compr timm:$tgt, timm:$en,
161                        (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
162                        done_val, timm:$vm),
163  (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
164        (IMPLICIT_DEF), (IMPLICIT_DEF), timm:$vm, 1, timm:$en)
165>;
166
167// FIXME: The generated DAG matcher seems to have strange behavior
168// with a 1-bit literal to match, so use a -1 for checking a true
169// 1-bit value.
170def : ExpPattern<i32, EXP, 0>;
171def : ExpPattern<i32, EXP_DONE, -1>;
172def : ExpPattern<f32, EXP, 0>;
173def : ExpPattern<f32, EXP_DONE, -1>;
174
175def : ExpRowPattern<i32, EXP_ROW, 0>;
176def : ExpRowPattern<i32, EXP_ROW_DONE, -1>;
177def : ExpRowPattern<f32, EXP_ROW, 0>;
178def : ExpRowPattern<f32, EXP_ROW_DONE, -1>;
179
180def : ExpComprPattern<v2i16, EXP, 0>;
181def : ExpComprPattern<v2i16, EXP_DONE, -1>;
182def : ExpComprPattern<v2f16, EXP, 0>;
183def : ExpComprPattern<v2f16, EXP_DONE, -1>;
184