xref: /titanic_50/usr/src/uts/sun4v/montoya/os/montoya.c (revision fd845fc0cb4fbc8e85f974e2e4eaacca1cc26e81)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/sysmacros.h>
32 #include <sys/sunddi.h>
33 #include <sys/esunddi.h>
34 #include <sys/sunndi.h>
35 #include <sys/platform_module.h>
36 #include <sys/errno.h>
37 #include <sys/utsname.h>
38 #include <sys/modctl.h>
39 #include <sys/systeminfo.h>
40 #include <sys/promif.h>
41 #include <sys/bootconf.h>
42 
43 
44 
45 /*
46  * Platform power management drivers list - empty by default
47  */
48 char *platform_module_list[] = {
49 	(char *)0
50 };
51 
52 
53 /*ARGSUSED*/
54 void
plat_tod_fault(enum tod_fault_type tod_bad)55 plat_tod_fault(enum tod_fault_type tod_bad)
56 {
57 }
58 
59 void
load_platform_drivers(void)60 load_platform_drivers(void)
61 {
62 }
63 
64 /*
65  * This routine provides a workaround for a bug in the SB chip which
66  * can cause data corruption. Will be invoked from the IDE HBA driver for
67  * Acer SouthBridge at the time of IDE bus reset.
68  */
69 /*ARGSUSED*/
70 int
plat_ide_chipreset(dev_info_t * dip,int chno)71 plat_ide_chipreset(dev_info_t *dip, int chno)
72 {
73 	return	(DDI_SUCCESS);
74 }
75