Searched hist:ffb7ca54c95b4c76ad8a9aa1b2b16d61df2a7139 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/spi/ |
| H A D | spi-dw-core.c | diff ffb7ca54c95b4c76ad8a9aa1b2b16d61df2a7139 Sun Sep 20 13:28:54 CEST 2020 Serge Semin <Sergey.Semin@baikalelectronics.ru> spi: dw: Add KeemBay Master capability
In a further commit we'll have to get rid of the update_cr0() callback and
define a DW SSI capability instead. Since Keem Bay master/slave
functionality is controller by the CTRL0 register bitfield, we need to
first move the master mode selection into the internal corresponding
update_cr0 method, which would be activated by means of the dedicated
DW_SPI_CAP_KEEMBAY_MST capability setup.
Note this will be also useful if the driver will be ever altered to
support the DW SPI slave interface.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20200920112914.26501-11-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
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| H A D | spi-dw.h | diff ffb7ca54c95b4c76ad8a9aa1b2b16d61df2a7139 Sun Sep 20 13:28:54 CEST 2020 Serge Semin <Sergey.Semin@baikalelectronics.ru> spi: dw: Add KeemBay Master capability
In a further commit we'll have to get rid of the update_cr0() callback and
define a DW SSI capability instead. Since Keem Bay master/slave
functionality is controller by the CTRL0 register bitfield, we need to
first move the master mode selection into the internal corresponding
update_cr0 method, which would be activated by means of the dedicated
DW_SPI_CAP_KEEMBAY_MST capability setup.
Note this will be also useful if the driver will be ever altered to
support the DW SPI slave interface.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20200920112914.26501-11-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
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| H A D | spi-dw-mmio.c | diff ffb7ca54c95b4c76ad8a9aa1b2b16d61df2a7139 Sun Sep 20 13:28:54 CEST 2020 Serge Semin <Sergey.Semin@baikalelectronics.ru> spi: dw: Add KeemBay Master capability
In a further commit we'll have to get rid of the update_cr0() callback and
define a DW SSI capability instead. Since Keem Bay master/slave
functionality is controller by the CTRL0 register bitfield, we need to
first move the master mode selection into the internal corresponding
update_cr0 method, which would be activated by means of the dedicated
DW_SPI_CAP_KEEMBAY_MST capability setup.
Note this will be also useful if the driver will be ever altered to
support the DW SPI slave interface.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20200920112914.26501-11-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
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