Searched hist:f684362689ddc4a4e055be438d6416cc280a1372 (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/mips/math-emu/ |
| H A D | cp1emu.c | diff f684362689ddc4a4e055be438d6416cc280a1372 Sat Apr 04 00:27:26 CEST 2015 Maciej W. Rozycki <macro@linux-mips.org> MIPS: math-emu: Set FIR feature flags for full emulation
Implement FIR feature flags in the FPU emulator according to features
supported and architecture level requirements. The W, L and F64 bits
have only been added at level #2 even though the features they refer to
were also included with the MIPS64r1 ISA and the W fixed-point format
also with the MIPS32r1 ISA.
This is only relevant for the full emulation mode and the emulated CFC1
instruction as well as ptrace(2) accesses.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| /linux/arch/mips/kernel/ |
| H A D | cpu-probe.c | diff f684362689ddc4a4e055be438d6416cc280a1372 Sat Apr 04 00:27:26 CEST 2015 Maciej W. Rozycki <macro@linux-mips.org> MIPS: math-emu: Set FIR feature flags for full emulation
Implement FIR feature flags in the FPU emulator according to features
supported and architecture level requirements. The W, L and F64 bits
have only been added at level #2 even though the features they refer to
were also included with the MIPS64r1 ISA and the W fixed-point format
also with the MIPS32r1 ISA.
This is only relevant for the full emulation mode and the emulated CFC1
instruction as well as ptrace(2) accesses.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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