Searched hist:f180bf12ac061f093abb9247505f661817973cae (Results 1 – 4 of 4) sorted by relevance
/linux/drivers/gpu/drm/nouveau/ |
H A D | nouveau_svm.h | diff f180bf12ac061f093abb9247505f661817973cae Tue Aug 07 22:13:16 CEST 2018 Jérôme Glisse <jglisse@redhat.com> drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the device memory. On platform without cache coherent bus (x86, ARM, ...) this means that CPU can not access that range directly, instead CPU will fault which will migrate the memory back to system memory.
This is behind a staging flag so that we can evolve the API.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
|
H A D | nouveau_svm.c | diff f180bf12ac061f093abb9247505f661817973cae Tue Aug 07 22:13:16 CEST 2018 Jérôme Glisse <jglisse@redhat.com> drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the device memory. On platform without cache coherent bus (x86, ARM, ...) this means that CPU can not access that range directly, instead CPU will fault which will migrate the memory back to system memory.
This is behind a staging flag so that we can evolve the API.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
|
H A D | nouveau_drm.c | diff f180bf12ac061f093abb9247505f661817973cae Tue Aug 07 22:13:16 CEST 2018 Jérôme Glisse <jglisse@redhat.com> drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the device memory. On platform without cache coherent bus (x86, ARM, ...) this means that CPU can not access that range directly, instead CPU will fault which will migrate the memory back to system memory.
This is behind a staging flag so that we can evolve the API.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
|
/linux/include/uapi/drm/ |
H A D | nouveau_drm.h | diff f180bf12ac061f093abb9247505f661817973cae Tue Aug 07 22:13:16 CEST 2018 Jérôme Glisse <jglisse@redhat.com> drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the device memory. On platform without cache coherent bus (x86, ARM, ...) this means that CPU can not access that range directly, instead CPU will fault which will migrate the memory back to system memory.
This is behind a staging flag so that we can evolve the API.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
|