Searched hist:e5bc76b0e1c54906ca744ed1a7872f4f407d5d2e (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/dma/xilinx/ |
| H A D | xdma-regs.h | diff e5bc76b0e1c54906ca744ed1a7872f4f407d5d2e Mon Dec 18 12:39:38 CET 2023 Jan Kuliga <jankul@alatek.krakow.pl> dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
According to the XDMA datasheet (PG195), the address of any descriptor
must be 32 byte aligned. The datasheet also states that a contiguous
block of descriptors must not cross a 4k address boundary. Therefore,
it is possible to ease the pressure put on the dma_pool allocator
just by requiring sufficient alignment and boundary values. Add proper
macro definition and change the values passed into the
dma_pool_create().
Signed-off-by: Jan Kuliga <jankul@alatek.krakow.pl>
Link: https://lore.kernel.org/r/20231218113943.9099-4-jankul@alatek.krakow.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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| H A D | xdma.c | diff e5bc76b0e1c54906ca744ed1a7872f4f407d5d2e Mon Dec 18 12:39:38 CET 2023 Jan Kuliga <jankul@alatek.krakow.pl> dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
According to the XDMA datasheet (PG195), the address of any descriptor
must be 32 byte aligned. The datasheet also states that a contiguous
block of descriptors must not cross a 4k address boundary. Therefore,
it is possible to ease the pressure put on the dma_pool allocator
just by requiring sufficient alignment and boundary values. Add proper
macro definition and change the values passed into the
dma_pool_create().
Signed-off-by: Jan Kuliga <jankul@alatek.krakow.pl>
Link: https://lore.kernel.org/r/20231218113943.9099-4-jankul@alatek.krakow.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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