Searched hist:e57e4ab5fc2e4e58447d13493c3e567b61359523 (Results 1 – 2 of 2) sorted by relevance
/linux/arch/arm/mach-imx/ |
H A D | cpu.c | diff e57e4ab5fc2e4e58447d13493c3e567b61359523 Mon Jul 07 11:41:26 CEST 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> ARM: i.MX: allow disabling supervisor protect via DT
The i.MX SoCs allow to setup fine grained access rights to peripherals on the AIPS bus. This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21 or in later SoC versions the Off-Platform Peripheral Access Control Register (OPACR), e.g. i.MX53. Under certain circumstances this leads to problems in which bus masters are not granted their access rights to peripherals. To be able to disable these restrictions on DT platforms, add a helper function that looks for AIPS nodes in the DT and disables them for every compatible node it finds. The compatible has to be declared in the mach-specific entry file, where this helper function should then be called.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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H A D | common.h | diff e57e4ab5fc2e4e58447d13493c3e567b61359523 Mon Jul 07 11:41:26 CEST 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> ARM: i.MX: allow disabling supervisor protect via DT
The i.MX SoCs allow to setup fine grained access rights to peripherals on the AIPS bus. This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21 or in later SoC versions the Off-Platform Peripheral Access Control Register (OPACR), e.g. i.MX53. Under certain circumstances this leads to problems in which bus masters are not granted their access rights to peripherals. To be able to disable these restrictions on DT platforms, add a helper function that looks for AIPS nodes in the DT and disables them for every compatible node it finds. The compatible has to be declared in the mach-specific entry file, where this helper function should then be called.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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