Searched hist:e47d488935ed0b2dd3d59d3ba4e13956ff6849c0 (Results 1 – 4 of 4) sorted by relevance
/linux/arch/mips/pci/ |
H A D | pci-lantiq.h | e47d488935ed0b2dd3d59d3ba4e13956ff6849c0 Wed Mar 30 09:27:49 CEST 2011 John Crispin <blogic@openwrt.org> MIPS: Lantiq: Add PCI controller support.
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work.
The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang.
Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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H A D | ops-lantiq.c | e47d488935ed0b2dd3d59d3ba4e13956ff6849c0 Wed Mar 30 09:27:49 CEST 2011 John Crispin <blogic@openwrt.org> MIPS: Lantiq: Add PCI controller support.
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work.
The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang.
Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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H A D | Makefile | diff e47d488935ed0b2dd3d59d3ba4e13956ff6849c0 Wed Mar 30 09:27:49 CEST 2011 John Crispin <blogic@openwrt.org> MIPS: Lantiq: Add PCI controller support.
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work.
The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang.
Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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/linux/arch/mips/include/asm/mach-lantiq/ |
H A D | lantiq_platform.h | e47d488935ed0b2dd3d59d3ba4e13956ff6849c0 Wed Mar 30 09:27:49 CEST 2011 John Crispin <blogic@openwrt.org> MIPS: Lantiq: Add PCI controller support.
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work.
The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang.
Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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