Searched hist:e2ab93e59bc3c029b61a7091825f193f1a66a1a1 (Results 1 – 1 of 1) sorted by relevance
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | nvidia,tegra186-mc.yaml | diff e2ab93e59bc3c029b61a7091825f193f1a66a1a1 Tue Apr 26 09:38:26 CEST 2022 Ashish Mhetre <amhetre@nvidia.com> dt-bindings: memory: tegra: Update validation for reg and reg-names
From Tegra186 onwards, memory controller support multiple channels.
"reg" items are updated with address and size of these channels.
Tegra186 has overall 5 memory controller channels. Tegra194 and Tegra234
have overall 17 memory controller channels each.
There is one "reg" entry for memory controller stream-ID registers. So
update the "reg" property's "minItems" and "maxItems" accordingly in the
Tegra186 devicetree documentation.
Also update validation for "reg-names" added for these corresponding
"reg" items. ABI change due to new bindings is intended but backward
compatibility is preserved in driver.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|