Searched hist:e277d2fc79d6abb86fafadb58dca0b9c498a9aa7 (Results 1 – 2 of 2) sorted by relevance
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| H A D | iov.c | diff e277d2fc79d6abb86fafadb58dca0b9c498a9aa7 Mon May 18 07:51:33 CEST 2009 Yu Zhao <yu.zhao@intel.com> PCI: handle Virtual Function ATS enabling
The SR-IOV spec requires that the Smallest Translation Unit and
the Invalidate Queue Depth fields in the Virtual Function ATS
capability are hardwired to 0. If a function is a Virtual Function,
then and set its Physical Function's STU before enabling the ATS.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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| H A D | pci.h | diff e277d2fc79d6abb86fafadb58dca0b9c498a9aa7 Mon May 18 07:51:33 CEST 2009 Yu Zhao <yu.zhao@intel.com> PCI: handle Virtual Function ATS enabling
The SR-IOV spec requires that the Smallest Translation Unit and
the Invalidate Queue Depth fields in the Virtual Function ATS
capability are hardwired to 0. If a function is a Virtual Function,
then and set its Physical Function's STU before enabling the ATS.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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