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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-j721s2-common-proc-board.dts | diff da61731dc7f5d7a676acd81124229b57e6fbe0ef Fri Mar 31 11:00:24 CEST 2023 Aswath Govindraju <a-govindraju@ti.com> arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0
Configure first lane to PCIe, the second lane to USB and the last two lanes
to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is
connected to PCIe.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230331090028.8373-5-r-gunasekaran@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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