Searched hist:d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/powerpc/boot/ |
| H A D | simpleboot.c | diff d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa Thu Jul 03 00:11:28 CEST 2008 John Linn <john.linn@xilinx.com> powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
The following changes add processing to initialize the Xilinx 16550 UART
in the boot wrapper for Virtex targets without firmware. Normally the
boot wrapper assumes that the serial port has already been initialized by
firmware.
The wrapper was also modified to add the 440 build.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
| H A D | wrapper | diff d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa Thu Jul 03 00:11:28 CEST 2008 John Linn <john.linn@xilinx.com> powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
The following changes add processing to initialize the Xilinx 16550 UART
in the boot wrapper for Virtex targets without firmware. Normally the
boot wrapper assumes that the serial port has already been initialized by
firmware.
The wrapper was also modified to add the 440 build.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
| H A D | Makefile | diff d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa Thu Jul 03 00:11:28 CEST 2008 John Linn <john.linn@xilinx.com> powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
The following changes add processing to initialize the Xilinx 16550 UART
in the boot wrapper for Virtex targets without firmware. Normally the
boot wrapper assumes that the serial port has already been initialized by
firmware.
The wrapper was also modified to add the 440 build.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|