Searched hist:cea3e9435e63237aa010e5868f9a38cfccec89f1 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-qserdes-txrx-v6_20.h | cea3e9435e63237aa010e5868f9a38cfccec89f1 Wed Feb 08 19:00:15 CET 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new qserdes TX RX PCIE specific offsets in a
dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-7-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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| H A D | phy-qcom-qmp.h | diff cea3e9435e63237aa010e5868f9a38cfccec89f1 Wed Feb 08 19:00:15 CET 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new qserdes TX RX PCIE specific offsets in a
dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-7-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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