Searched hist:ce2e572cfe7b2fc3f0e9da4aa7bc61a2c2c51fc7 (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/x86/include/asm/numachip/ |
| H A D | numachip_csr.h | diff ce2e572cfe7b2fc3f0e9da4aa7bc61a2c2c51fc7 Mon Sep 21 12:02:25 CEST 2015 Daniel J Blueman <daniel@numascale.com> x86/numachip: Introduce Numachip2 timer mechanisms
Add 1GHz 64-bit Numachip2 clocksource timer support for accurate
system-wide timekeeping, as core TSCs are unsynchronised.
Additionally, add a per-core clockevent mechanism that interrupts via the
platform IPI vector after a programmed period.
[ tglx: Taking it through x86 due to dependencies ]
Signed-off-by: Daniel J Blueman <daniel@numascale.com>
Acked-by: Steffen Persvold <sp@numascale.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1442829745-29311-1-git-send-email-daniel@numascale.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| /linux/drivers/clocksource/ |
| H A D | numachip.c | ce2e572cfe7b2fc3f0e9da4aa7bc61a2c2c51fc7 Mon Sep 21 12:02:25 CEST 2015 Daniel J Blueman <daniel@numascale.com> x86/numachip: Introduce Numachip2 timer mechanisms
Add 1GHz 64-bit Numachip2 clocksource timer support for accurate
system-wide timekeeping, as core TSCs are unsynchronised.
Additionally, add a per-core clockevent mechanism that interrupts via the
platform IPI vector after a programmed period.
[ tglx: Taking it through x86 due to dependencies ]
Signed-off-by: Daniel J Blueman <daniel@numascale.com>
Acked-by: Steffen Persvold <sp@numascale.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1442829745-29311-1-git-send-email-daniel@numascale.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|