Searched hist:c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 (Results 1 – 6 of 6) sorted by relevance
| /linux/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp-zcu102-revB.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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| H A D | zynqmp-zcu104-revC.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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| H A D | zynqmp-zcu104-revA.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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| H A D | zynqmp-zcu111-revA.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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| H A D | zynqmp-zcu106-revA.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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| H A D | zynqmp-zcu102-revA.dts | diff c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 Mon May 22 16:59:48 CEST 2023 Michal Simek <michal.simek@amd.com> arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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