Searched hist:c2c9c5661a48bf2e67dcb4e989003144304acd6a (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/clk/socfpga/ |
| H A D | clk-gate-s10.c | diff c2c9c5661a48bf2e67dcb4e989003144304acd6a Fri Jun 11 04:52:00 CEST 2021 Dinh Nguyen <dinguyen@kernel.org> clk: agilex/stratix10: add support for the 2nd bypass
The EMAC clocks on Stratix10/Agilex/N5X have an additional bypass that
was not being accounted for. The bypass selects between
emaca_clk/emacb_clk and boot_clk.
Because the bypass register offset is different between Stratix10 and
Agilex/N5X, it's best to create a new function to calculate the bypass.
Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | stratix10-clk.h | diff c2c9c5661a48bf2e67dcb4e989003144304acd6a Fri Jun 11 04:52:00 CEST 2021 Dinh Nguyen <dinguyen@kernel.org> clk: agilex/stratix10: add support for the 2nd bypass
The EMAC clocks on Stratix10/Agilex/N5X have an additional bypass that
was not being accounted for. The bypass selects between
emaca_clk/emacb_clk and boot_clk.
Because the bypass register offset is different between Stratix10 and
Agilex/N5X, it's best to create a new function to calculate the bypass.
Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | clk-agilex.c | diff c2c9c5661a48bf2e67dcb4e989003144304acd6a Fri Jun 11 04:52:00 CEST 2021 Dinh Nguyen <dinguyen@kernel.org> clk: agilex/stratix10: add support for the 2nd bypass
The EMAC clocks on Stratix10/Agilex/N5X have an additional bypass that
was not being accounted for. The bypass selects between
emaca_clk/emacb_clk and boot_clk.
Because the bypass register offset is different between Stratix10 and
Agilex/N5X, it's best to create a new function to calculate the bypass.
Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|