Searched hist:c14e878d4a4f6f5e1f58e83ac25363a1b80fa374 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/net/dsa/microchip/ |
| H A D | lan937x.h | diff c14e878d4a4f6f5e1f58e83ac25363a1b80fa374 Fri Jul 01 17:10:34 CEST 2022 Arun Ramadoss <arun.ramadoss@microchip.com> net: dsa: microchip: lan937x: add phylink_get_caps support
The internal phy of the LAN937x are capable of 100Mbps Full duplex. The
xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps
Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx
and Rx Flow control.
Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| H A D | lan937x_main.c | diff c14e878d4a4f6f5e1f58e83ac25363a1b80fa374 Fri Jul 01 17:10:34 CEST 2022 Arun Ramadoss <arun.ramadoss@microchip.com> net: dsa: microchip: lan937x: add phylink_get_caps support
The internal phy of the LAN937x are capable of 100Mbps Full duplex. The
xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps
Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx
and Rx Flow control.
Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| H A D | ksz_common.c | diff c14e878d4a4f6f5e1f58e83ac25363a1b80fa374 Fri Jul 01 17:10:34 CEST 2022 Arun Ramadoss <arun.ramadoss@microchip.com> net: dsa: microchip: lan937x: add phylink_get_caps support
The internal phy of the LAN937x are capable of 100Mbps Full duplex. The
xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps
Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx
and Rx Flow control.
Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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