| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxl-s805x-p241.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxbb-wetek.dtsi | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxm-rbox-pro.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxl-s905x-nexbox-a95x.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxl-s905x-p212.dtsi | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxbb-p20x.dtsi | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxm-nexbox-a1.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxbb-nanopi-k2.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gx-p23x-q20x.dtsi | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxbb-nexbox-a95x.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxl-s905x-libretech-cc.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxm-khadas-vim2.dts | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
| H A D | meson-gxbb-vega-s95.dtsi | diff adc52bf7ef1644b9ca3ee024b107167323c6d3d8 Thu Apr 18 14:27:12 CEST 2019 Jerome Brunet <jbrunet@baylibre.com> arm64: dts: meson: fix mmc v2 chips max frequencies
According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.
Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|