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| H A D | sdhci-of-esdhc.c | diff a627f025eb0534052ff451427c16750b3530634c Thu Apr 20 08:58:29 CEST 2017 yangbo lu <yangbo.lu@nxp.com> mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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