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Searched hist:a588362c0375ebed265afad9dd5a60b5739820df (Results 1 – 2 of 2) sorted by relevance

/titanic_51/usr/src/uts/sun4v/cpu/
H A Dniagara_perfctr.cdiff a588362c0375ebed265afad9dd5a60b5739820df Wed Aug 27 23:31:12 CEST 2008 Sree Vemuri <Sree.Vemuri@Sun.COM> 6735117 Performance counter does not count bank busy stalls correctly on N2 and VF based systems
6695480 cpustat on VF systems should default to l2ctl=0 when invoked without l2ctl attribute

/titanic_51/usr/src/uts/sun4v/pcbe/
H A Dniagara2_pcbe.cdiff a588362c0375ebed265afad9dd5a60b5739820df Wed Aug 27 23:31:12 CEST 2008 Sree Vemuri <Sree.Vemuri@Sun.COM> 6735117 Performance counter does not count bank busy stalls correctly on N2 and VF based systems
6695480 cpustat on VF systems should default to l2ctl=0 when invoked without l2ctl attribute